X-Git-Url: http://git.efficios.com/?a=blobdiff_plain;f=sim%2FChangeLog;h=7443e8442d9b32a0178afe61e46198674df525c9;hb=d0801dd8f22a3e739c6a7d126d45829df981794d;hp=6d0c5fdd6a8250d1dfb838c126b8928f0e5f8956;hpb=742e3a7781c7f29136ccc36673ef2c887ba2860d;p=deliverable%2Fbinutils-gdb.git diff --git a/sim/ChangeLog b/sim/ChangeLog index 6d0c5fdd6a..7443e8442d 100644 --- a/sim/ChangeLog +++ b/sim/ChangeLog @@ -1,3 +1,143 @@ +2019-09-23 Dimitar Dimitrov + + * MAINTAINERS: Add myself as PRU maintainer. + * configure: Regenerated. + * configure.tgt: Add PRU. + +2019-09-20 Alan Modra + + * ppc/emul_generic.c (emul_add_tree_options): Delete old bfd code. + +2019-09-18 Alan Modra + + * common/sim-load.c, * common/sim-utils.c, * cris/sim-if.c, + * erc32/func.c, * lm32/sim-if.c, * m32c/load.c, * m32c/trace.c, + * m68hc11/interp.c, * ppc/hw_htab.c, * ppc/hw_init.c, + * rl78/load.c, * rl78/trace.c, * rx/gdb-if.c, * rx/load.c, + * rx/trace.c: Update throughout for bfd section macro changes. + +2019-06-13 Stafford Horne + + * or1k/cpu.c: Regenerate. + * or1k/cpu.h: Regenerate. + * or1k/decode.c: Regenerate. + * or1k/decode.h: Regenerate. + * or1k/model.c: Regenerate. + * or1k/sem-switch.c: Regenerate. + * or1k/sem.c: Regenerate. + +2019-02-28 Joel Brobecker + + * MAINTAINERS: Move Mike Frysinger to past maintainers' section. + +2019-02-13 Simon Marchi + + * MAINTAINERS: Add Andrew Burgess as global maintainer. + +2019-01-03 Pavel I. Kryukov + + * sim-base.h: Add 'extern C' if header is compiled with C++. + +2018-12-06 Andrew Burgess + + * common/acinclude.m4 (enable-cgen-maint): Support passing path to + cgen source tree. + * cris/configure: Regenerate. + * frv/configure: Regenerate. + * iq2000/configure: Regenerate. + * lm32/configure: Regenerate. + * m32r/configure: Regenerate. + * or1k/configure: Regenerate. + * sh64/configure: Regenerate. + +2018-10-05 Stafford Horne + + * or1k/cpu.h: Regenerate. + * or1k/decode.c: Regenerate. + * or1k/decode.h: Regenerate. + * or1k/model.c: Regenerate. + * or1k/sem-switch.c: Regenerate. + * or1k/sem.c: Regenerate: + +2018-07-20 Maciej W. Rozycki + + * MAINTAINERS: Update my e-mail address, downgrade to MIPS I-IV + ISA maintenance. + +2018-07-19 DJ Delorie + + * MAINTAINERS (rl78, m32c, rx, v850): Remove myself as maintainer. + +2018-07-14 Stafford Horne + + * MAINTAINERS (or1k): Add myself as or1k maintainer. + +2018-06-19 Simon Marchi + + * All configure.ac: Remove AC_PREREQ. + * All configure: Re-generate. + +2018-01-22 Maciej W. Rozycki + + * MAINTAINERS: Update my company e-mail address. + +2017-12-12 Stafford Horne + Peter Gavin + + * configure: Regenerated. + * or1k/aclocal.m4: Generated. + * or1k/config.in: Generated. + * or1k/configure: Generated. + +2017-12-12 Stafford Horne + Peter Gavin + + * or1k/arch.c: Generated. + * or1k/arch.h: Generated. + * or1k/cpu.c: Generated. + * or1k/cpu.h: Generated. + * or1k/cpuall.h: Generated. + * or1k/decode.c: Generated. + * or1k/decode.h: Generated. + * or1k/model.c: Generated. + * or1k/sem-switch.c: Generated. + * or1k/sem.c: Generated. + +2017-12-12 Stafford Horne + Peter Gavin + + * configure.tgt: Add or1k sim. + * or1k/README: New file. + * or1k/Makefile.in: New file. + * or1k/configure.ac: New file. + * or1k/mloop.in: New file. + * or1k/or1k-sim.h: New file. + * or1k/or1k.c: New file. + * or1k/sim-if.c: New file. + * or1k/sim-main.h: New file. + * or1k/traps.c: New file. + +2017-11-01 James Bowman + + * ft32/interp.c (step_once): Add ft32 shortcode decoder. + +2017-10-12 James Bowman + + * ft32/interp.c (step_once): Replace FT32_FLD_K8 with K15. + +2017-10-12 James Bowman + + * MAINTAINERS (ft32): Add myself. + +2017-10-03 Jim Wilson + + * MAINTAINERS (aarch64): Update my email address. + +2017-09-06 John Baldwin + + * configure.ac: Honor existing CC_FOR_BUILD in environment. + * configure: Regenerate. + 2017-02-14 Jim Wilson * MAINTAINTERS (aarch64): Add myself.