X-Git-Url: http://git.efficios.com/?a=blobdiff_plain;f=sim%2Farm%2Farmdefs.h;h=2b5ff9b2dfa8bf611fed4fc567fef03bf65d7e93;hb=d3ecddab5fc036fb57588a9bfff73575dc419052;hp=4ad5c5f07aed6fe0903c2d1bdec07933b8670fe6;hpb=917bca4f210f0b654abbb8497dd4f8abe5bf9e9f;p=deliverable%2Fbinutils-gdb.git
diff --git a/sim/arm/armdefs.h b/sim/arm/armdefs.h
index 4ad5c5f07a..2b5ff9b2df 100644
--- a/sim/arm/armdefs.h
+++ b/sim/arm/armdefs.h
@@ -1,22 +1,23 @@
/* armdefs.h -- ARMulator common definitions: ARM6 Instruction Emulator.
Copyright (C) 1994 Advanced RISC Machines Ltd.
-
+
This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 2 of the License, or
+ the Free Software Foundation; either version 3 of the License, or
(at your option) any later version.
-
+
This program is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
-
+
You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+ along with this program; if not, see . */
+#include "config.h"
#include
#include
+#include
#define FALSE 0
#define TRUE 1
@@ -25,12 +26,10 @@
#define LOWHIGH 1
#define HIGHLOW 2
-#ifndef __STDC__
-typedef char *VoidStar;
-#endif
-
-typedef unsigned long ARMword; /* must be 32 bits wide */
-typedef unsigned long long ARMdword; /* Must be at least 64 bits wide. */
+typedef uint32_t ARMword;
+typedef int32_t ARMsword;
+typedef uint64_t ARMdword;
+typedef int64_t ARMsdword;
typedef struct ARMul_State ARMul_State;
typedef unsigned ARMul_CPInits (ARMul_State * state);
@@ -50,11 +49,29 @@ typedef unsigned ARMul_CPReads (ARMul_State * state, unsigned reg,
typedef unsigned ARMul_CPWrites (ARMul_State * state, unsigned reg,
ARMword value);
+typedef double ARMdval; /* FIXME: Must be a 64-bit floating point type. */
+typedef float ARMfval; /* FIXME: Must be a 32-bit floating point type. */
+
+typedef union
+{
+ ARMword uword[2];
+ ARMsword sword[2];
+ ARMfval fval[2];
+ ARMdword dword;
+ ARMdval dval;
+} ARM_VFP_reg;
+
+#define VFP_fval(N) (state->VFP_Reg[(N)>> 1].fval[(N) & 1])
+#define VFP_uword(N) (state->VFP_Reg[(N)>> 1].uword[(N) & 1])
+#define VFP_sword(N) (state->VFP_Reg[(N)>> 1].sword[(N) & 1])
+
+#define VFP_dval(N) (state->VFP_Reg[(N)].dval)
+#define VFP_dword(N) (state->VFP_Reg[(N)].dword)
+
struct ARMul_State
{
ARMword Emulate; /* to start and stop emulation */
unsigned EndCondition; /* reason for stopping */
- unsigned ErrorCode; /* type of illegal instruction */
ARMword Reg[16]; /* the current register file */
ARMword RegBank[7][16]; /* all the registers */
/* 40 bit accumulator. We always keep this 64 bits wide,
@@ -102,6 +119,9 @@ struct ARMul_State
ARMul_CPWrites *CPWrite[16]; /* Write CP register */
unsigned char *CPData[16]; /* Coprocessor data */
unsigned char const *CPRegWords[16]; /* map of coprocessor register sizes */
+ unsigned long LastTime; /* Value of last call to ARMul_Time() */
+ ARMword CP14R0_CCD; /* used to count 64 clock cycles with CP14 R0 bit
+ 3 set */
unsigned EventSet; /* the number of events in the queue */
unsigned long Now; /* time to the nearest cycle */
@@ -131,19 +151,15 @@ struct ARMul_State
unsigned is_v4; /* Are we emulating a v4 architecture (or higher) ? */
unsigned is_v5; /* Are we emulating a v5 architecture ? */
unsigned is_v5e; /* Are we emulating a v5e architecture ? */
+ unsigned is_v6; /* Are we emulating a v6 architecture ? */
unsigned is_XScale; /* Are we emulating an XScale architecture ? */
+ unsigned is_iWMMXt; /* Are we emulating an iWMMXt co-processor ? */
+ unsigned is_ep9312; /* Are we emulating a Cirrus Maverick co-processor ? */
unsigned verbose; /* Print various messages like the banner */
-};
-#define ResetPin NresetSig
-#define FIQPin NfiqSig
-#define IRQPin NirqSig
-#define AbortPin abortSig
-#define TransPin NtransSig
-#define BigEndPin bigendSig
-#define Prog32Pin prog32Sig
-#define Data32Pin data32Sig
-#define LateAbortPin lateabtSig
+ ARM_VFP_reg VFP_Reg[32]; /* Advanced SIMD registers. */
+ ARMword FPSCR; /* Floating Point Status Register. */
+};
/***************************************************************************\
* Properties of ARM we know about *
@@ -159,6 +175,9 @@ struct ARMul_State
#define ARM_v5_Prop 0x80
#define ARM_v5e_Prop 0x100
#define ARM_XScale_Prop 0x200
+#define ARM_ep9312_Prop 0x400
+#define ARM_iWMMXt_Prop 0x800
+#define ARM_v6_Prop 0x1000
/***************************************************************************\
* Macros to extract instruction fields *
@@ -342,6 +361,32 @@ extern ARMword ARMul_MemAccess (ARMul_State * state, ARMword, ARMword,
#define ARMul_CANT 1
#define ARMul_INC 3
+#define ARMul_CP13_R0_FIQ 0x1
+#define ARMul_CP13_R0_IRQ 0x2
+#define ARMul_CP13_R8_PMUS 0x1
+
+#define ARMul_CP14_R0_ENABLE 0x0001
+#define ARMul_CP14_R0_CLKRST 0x0004
+#define ARMul_CP14_R0_CCD 0x0008
+#define ARMul_CP14_R0_INTEN0 0x0010
+#define ARMul_CP14_R0_INTEN1 0x0020
+#define ARMul_CP14_R0_INTEN2 0x0040
+#define ARMul_CP14_R0_FLAG0 0x0100
+#define ARMul_CP14_R0_FLAG1 0x0200
+#define ARMul_CP14_R0_FLAG2 0x0400
+#define ARMul_CP14_R10_MOE_IB 0x0004
+#define ARMul_CP14_R10_MOE_DB 0x0008
+#define ARMul_CP14_R10_MOE_BT 0x000c
+#define ARMul_CP15_R1_ENDIAN 0x0080
+#define ARMul_CP15_R1_ALIGN 0x0002
+#define ARMul_CP15_R5_X 0x0400
+#define ARMul_CP15_R5_ST_ALIGN 0x0001
+#define ARMul_CP15_R5_IMPRE 0x0406
+#define ARMul_CP15_R5_MMU_EXCPT 0x0400
+#define ARMul_CP15_DBCON_M 0x0100
+#define ARMul_CP15_DBCON_E1 0x000c
+#define ARMul_CP15_DBCON_E0 0x0003
+
extern unsigned ARMul_CoProInit (ARMul_State * state);
extern void ARMul_CoProExit (ARMul_State * state);
extern void ARMul_CoProAttach (ARMul_State * state, unsigned number,
@@ -351,31 +396,22 @@ extern void ARMul_CoProAttach (ARMul_State * state, unsigned number,
ARMul_CDPs * cdp,
ARMul_CPReads * read, ARMul_CPWrites * write);
extern void ARMul_CoProDetach (ARMul_State * state, unsigned number);
+extern void XScale_check_memacc (ARMul_State * state, ARMword * address,
+ int store);
+extern void XScale_set_fsr_far (ARMul_State * state, ARMword fsr, ARMword far);
+extern int XScale_debug_moe (ARMul_State * state, int moe);
/***************************************************************************\
* Definitons of things in the host environment *
\***************************************************************************/
extern unsigned ARMul_OSInit (ARMul_State * state);
-extern void ARMul_OSExit (ARMul_State * state);
extern unsigned ARMul_OSHandleSWI (ARMul_State * state, ARMword number);
-extern ARMword ARMul_OSLastErrorP (ARMul_State * state);
-
-extern ARMword ARMul_Debug (ARMul_State * state, ARMword pc, ARMword instr);
-extern unsigned ARMul_OSException (ARMul_State * state, ARMword vector,
- ARMword pc);
-extern int rdi_log;
/***************************************************************************\
* Host-dependent stuff *
\***************************************************************************/
-#ifdef macintosh
-pascal void SpinCursor (short increment); /* copied from CursorCtl.h */
-# define HOURGLASS SpinCursor( 1 )
-# define HOURGLASS_RATE 1023 /* 2^n - 1 */
-#endif
-
extern void ARMul_UndefInstr (ARMul_State *, ARMword);
extern void ARMul_FixCPSR (ARMul_State *, ARMword, ARMword);
extern void ARMul_FixSPSR (ARMul_State *, ARMword, ARMword);