X-Git-Url: http://git.efficios.com/?a=blobdiff_plain;f=sim%2Ferc32%2Finterf.c;h=a33102460f814d59bda8484f94fa776d52c18988;hb=5cc854a862fef488bd08190eb5822ab6e2a50ef3;hp=d81511a06d5da095fc3df9a85dc32aa4852fccf3;hpb=dae477fed8cdd8063a79042f2781a983be1c728d;p=deliverable%2Fbinutils-gdb.git diff --git a/sim/erc32/interf.c b/sim/erc32/interf.c index d81511a06d..a33102460f 100644 --- a/sim/erc32/interf.c +++ b/sim/erc32/interf.c @@ -1,30 +1,26 @@ -/* - * This file is part of SIS. - * - * SIS, SPARC instruction simulator V1.6 Copyright (C) 1995 Jiri Gaisler, - * European Space Agency - * - * This program is free software; you can redistribute it and/or modify it under - * the terms of the GNU General Public License as published by the Free - * Software Foundation; either version 2 of the License, or (at your option) - * any later version. - * - * This program is distributed in the hope that it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License along with - * this program; if not, write to the Free Software Foundation, Inc., 675 - * Mass Ave, Cambridge, MA 02139, USA. - * - */ +/* This file is part of SIS (SPARC instruction simulator) + Copyright (C) 1995-2015 Free Software Foundation, Inc. + Contributed by Jiri Gaisler, European Space Agency + + This program is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . */ + +#include "config.h" #include #include #include #include -#include #include #include "sis.h" #include "libiberty.h" @@ -41,7 +37,6 @@ extern struct disassemble_info dinfo; extern struct pstate sregs; extern struct estate ebase; -extern int current_target_byte_order; extern int ctrl_c; extern int nfp; extern int ift; @@ -76,8 +71,10 @@ run_sim(sregs, icount, dis) (*sim_callback->printf_filtered) (sim_callback, "resuming at %x\n", sregs->pc); init_stdio(); - sregs->starttime = time(NULL); + sregs->starttime = get_time(); irq = 0; + if ((sregs->pc != 0) && (ebase.simtime == 0)) + boot_init(); while (!sregs->err_mode & (icount > 0)) { sregs->fhold = 0; @@ -94,9 +91,8 @@ run_sim(sregs, icount, dis) if (sregs->pc == 0 || sregs->npc == 0) printf ("bogus pc or npc\n"); #endif - mexc = memory_read(sregs->asi, sregs->pc, &sregs->inst, - 2, &sregs->hold); -#if 1 /* DELETE ME! for debugging purposes only */ + mexc = memory_iread (sregs->pc, &sregs->inst, &sregs->hold); +#if 0 /* DELETE ME! for debugging purposes only */ if (sis_verbose > 2) printf("pc %x, np %x, sp %x, fp %x, wm %x, cw %x, i %08x\n", sregs->pc, sregs->npc, @@ -124,7 +120,7 @@ run_sim(sregs, icount, dis) sim_halt(); restore_stdio(); clearerr(stdin); - return (BPT_HIT); + return BPT_HIT; } else dispatch_instruction(sregs); } @@ -141,37 +137,24 @@ run_sim(sregs, icount, dis) } } sim_halt(); - sregs->tottime += time(NULL) - sregs->starttime; + sregs->tottime += get_time() - sregs->starttime; restore_stdio(); clearerr(stdin); if (sregs->err_mode) error_mode(sregs->pc); if (sregs->err_mode) - return (ERROR); + return ERROR; if (sregs->bphit) { if (sis_verbose) (*sim_callback->printf_filtered) (sim_callback, "HW BP hit at %x\n", sregs->pc); - return (BPT_HIT); + return BPT_HIT; } if (ctrl_c) { ctrl_c = 0; - return (CTRL_C); + return CTRL_C; } - return (TIME_OUT); -} - -void -sim_set_callbacks (ptr) - host_callback *ptr; -{ - sim_callback = ptr; -} - -void -sim_size (memsize) - int memsize; -{ + return TIME_OUT; } SIM_DESC @@ -234,6 +217,9 @@ sim_open (kind, callback, abfd, argv) if ((stat + 1) < argc) { freq = strtol(argv[++stat], (char **)NULL, 0); } + } else + if (strncmp(argv[stat], "--sysroot=", sizeof("--sysroot=") - 1) == 0) { + /* Ignore until we start to support this. */ } else { (*sim_callback->printf_filtered) (sim_callback, "unknown option %s\n", @@ -262,7 +248,11 @@ sim_open (kind, callback, abfd, argv) sregs.freq = freq ? freq : 15; termsave = fcntl(0, F_GETFL, 0); INIT_DISASSEMBLE_INFO(dinfo, stdout,(fprintf_ftype)fprintf); +#ifdef HOST_LITTLE_ENDIAN + dinfo.endian = BFD_ENDIAN_LITTLE; +#else dinfo.endian = BFD_ENDIAN_BIG; +#endif reset_all(); ebase.simtime = 0; init_sim(); @@ -287,7 +277,7 @@ sim_close(sd, quitting) SIM_RC sim_load(sd, prog, abfd, from_tty) SIM_DESC sd; - char *prog; + const char *prog; bfd *abfd; int from_tty; { @@ -321,14 +311,10 @@ sim_store_register(sd, regno, value, length) unsigned char *value; int length; { - /* FIXME: Review the computation of regval. */ int regval; - if (current_target_byte_order == BIG_ENDIAN) - regval = (value[0] << 24) | (value[1] << 16) + + regval = (value[0] << 24) | (value[1] << 16) | (value[2] << 8) | value[3]; - else - regval = (value[3] << 24) | (value[2] << 16) - | (value[1] << 8) | value[0]; set_regi(&sregs, regno, regval); return length; } @@ -346,23 +332,25 @@ sim_fetch_register(sd, regno, buf, length) } int -sim_write(sd, mem, buf, length) - SIM_DESC sd; - SIM_ADDR mem; - const unsigned char *buf; - int length; +sim_write (SIM_DESC sd, SIM_ADDR mem, const unsigned char *buf, int length) { - return (sis_memory_write(mem, buf, length)); + int i, len; + + for (i = 0; i < length; i++) { + sis_memory_write ((mem + i) ^ EBT, &buf[i], 1); + } + return length; } int -sim_read(sd, mem, buf, length) - SIM_DESC sd; - SIM_ADDR mem; - unsigned char *buf; - int length; +sim_read (SIM_DESC sd, SIM_ADDR mem, unsigned char *buf, int length) { - return (sis_memory_read(mem, buf, length)); + int i, len; + + for (i = 0; i < length; i++) { + sis_memory_read ((mem + i) ^ EBT, &buf[i], 1); + } + return length; } void @@ -385,13 +373,13 @@ sim_stop_reason(sd, reason, sigrc) switch (simstat) { case CTRL_C: *reason = sim_stopped; - *sigrc = TARGET_SIGNAL_INT; + *sigrc = GDB_SIGNAL_INT; break; case OK: case TIME_OUT: case BPT_HIT: *reason = sim_stopped; - *sigrc = TARGET_SIGNAL_TRAP; + *sigrc = GDB_SIGNAL_TRAP; break; case ERROR: *sigrc = 0; @@ -464,23 +452,20 @@ sim_resume(SIM_DESC sd, int step, int siggnal) if (sis_gdb_break) flush_windows (); } -int -sim_trace (sd) - SIM_DESC sd; -{ - /* FIXME: unfinished */ - sim_resume (sd, 0, 0); - return 1; -} - void sim_do_command(sd, cmd) SIM_DESC sd; - char *cmd; + const char *cmd; { exec_cmd(&sregs, cmd); } +char ** +sim_complete_command (SIM_DESC sd, const char *text, const char *word) +{ + return NULL; +} + #if 0 /* FIXME: These shouldn't exist. */ int