X-Git-Url: http://git.efficios.com/?a=blobdiff_plain;f=sim%2Fm32r%2Fmloop.in;h=477458c785a1756a17ac3e482c1149bf4ede92ba;hb=42a4f53d2bf8938c2aeda9f52be7a20534b214a9;hp=0be16bb10633e9d8fa7699b32ec7201ad76df92d;hpb=27e232885db363fb545fd2f450e72d929e59b8f6;p=deliverable%2Fbinutils-gdb.git diff --git a/sim/m32r/mloop.in b/sim/m32r/mloop.in index 0be16bb106..477458c785 100644 --- a/sim/m32r/mloop.in +++ b/sim/m32r/mloop.in @@ -1,21 +1,21 @@ # Simulator main loop for m32r. -*- C -*- -# Copyright (C) 1996, 1997, 1998 Free Software Foundation, Inc. +# +# Copyright (C) 1996-2019 Free Software Foundation, Inc. # # This file is part of the GNU Simulators. # # This program is free software; you can redistribute it and/or modify # it under the terms of the GNU General Public License as published by -# the Free Software Foundation; either version 2, or (at your option) -# any later version. +# the Free Software Foundation; either version 3 of the License, or +# (at your option) any later version. # # This program is distributed in the hope that it will be useful, # but WITHOUT ANY WARRANTY; without even the implied warranty of # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the # GNU General Public License for more details. # -# You should have received a copy of the GNU General Public License along -# with this program; if not, write to the Free Software Foundation, Inc., -# 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. +# You should have received a copy of the GNU General Public License +# along with this program. If not, see . # Syntax: # /bin/sh mainloop.in command @@ -113,8 +113,8 @@ execute (SIM_CPU *current_cpu, SCACHE *sc, int fast_p) if (PROFILE_MODEL_P (current_cpu) && ARGBUF_PROFILE_P (abuf)) @cpu@_model_insn_before (current_cpu, 1 /*first_p*/); - TRACE_INSN_INIT (current_cpu, abuf, 1); - TRACE_INSN (current_cpu, idata, + CGEN_TRACE_INSN_INIT (current_cpu, abuf, 1); + CGEN_TRACE_INSN (current_cpu, idata, (const struct argbuf *) abuf, abuf->addr); } #if WITH_SCACHE @@ -133,7 +133,7 @@ execute (SIM_CPU *current_cpu, SCACHE *sc, int fast_p) cycles = (*idesc->timing->model_fn) (current_cpu, sc); @cpu@_model_insn_after (current_cpu, 1 /*last_p*/, cycles); } - TRACE_INSN_FINI (current_cpu, abuf, 1); + CGEN_TRACE_INSN_FINI (current_cpu, abuf, 1); } #else abort ();