drm/i915/skl: Gen9 coarse power gating
authorZhe Wang <zhe1.wang@intel.com>
Tue, 20 Jan 2015 12:23:04 +0000 (12:23 +0000)
committerDaniel Vetter <daniel.vetter@ffwll.ch>
Tue, 27 Jan 2015 08:51:00 +0000 (09:51 +0100)
commit38c2352716ec6bab1adb8e36428da907c9dfaac3
tree48563db859416cdc76fc7339e0f7390f01c3962c
parentba1c554c1fc8d0730ee9aababba7ebf5bb22381e
drm/i915/skl: Gen9 coarse power gating

Enable coarse power gating for Gen9. This feature allows render and
media engine to enter RC6 independently. Policies are configured
together with RC6. This feature will only be enabled when RC6 is
enabled.

v2: Rebase after Chris'/Mika's forcewake change (Damien)

Reviewed-by: Damien Lespiau <damien.lespiau@intel.com>
Signed-off-by: Zhe Wang <zhe1.wang@intel.com>
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
drivers/gpu/drm/i915/i915_reg.h
drivers/gpu/drm/i915/intel_pm.c
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