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(parent: 9705ad8) | patch
drm/i915/bxt: Determine BXT slice/subslice/EU info
authorJeff McGee <jeff.mcgee@intel.com>
Sat, 4 Apr 2015 01:13:16 +0000 (18:13 -0700)
committerDaniel Vetter <daniel.vetter@ffwll.ch>
Thu, 9 Apr 2015 13:57:56 +0000 (15:57 +0200)
commitdead16e2c34343f0e12ee71cd50c9398440e2556
treed4ca6ea68f79ec3bbe22c2daa3cad85ecc6a4479tree | snapshot
parent9705ad8a9684c5b4952263821e07929ca3856fd1commit | diff
drm/i915/bxt: Determine BXT slice/subslice/EU info

Modify the Gen9 SSEU info initialization logic to support
Broxton. Broxton reuses the SKL fuse registers but has at most
1 slice and 6 EU per subslice.

Signed-off-by: Jeff McGee <jeff.mcgee@intel.com>
Reviewed-by: Imre Deak <imre.deak@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
drivers/gpu/drm/i915/i915_dma.c diff | blob | blame | history
drivers/gpu/drm/i915/i915_reg.h diff | blob | blame | history
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