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drm/i915: Fix PCH SSC reference clock settings
authorKeith Packard <keithp@keithp.com>
Thu, 22 Sep 2011 19:01:57 +0000 (12:01 -0700)
committerKeith Packard <keithp@keithp.com>
Tue, 27 Sep 2011 18:12:56 +0000 (11:12 -0700)
commit199e5d79f1c988a8039fa75b736a3adcdda56abc
tree1a2b4ef5d6105b4457e3e47df20e1e1a41feca97tree | snapshot
parent72bbe58cd9568c7766cc219a779ea68a02132797commit | diff
drm/i915: Fix PCH SSC reference clock settings

The PCH refclk settings are global, so we need to look at all of the
encoders, not just the current encoder when deciding how to configure
it. Also, handle systems with more than one panel (any combination of
PCH/non-PCH eDP and LVDS).

Disable SSC clocks when no panels are connected.

Signed-off-by: Keith Packard <keithp@keithp.com>
drivers/gpu/drm/i915/intel_display.c diff | blob | blame | history
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