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RISC-V: Fix SLTI disassembly
authorAndrew Waterman <andrew@sifive.com>
Mon, 15 May 2017 15:50:57 +0000 (08:50 -0700)
committerPalmer Dabbelt <palmer@dabbelt.com>
Fri, 23 Jun 2017 16:23:58 +0000 (09:23 -0700)
commit9bdfdbf929d581cf845ffc815ae94a39d9f7b032
tree93e5c4b5b4e64ffc1a26b053b959c4c9acef0968tree | snapshot
parent94f78a777c396fa1ce2f40d34afed1b6b5012196commit | diff
RISC-V: Fix SLTI disassembly

2017-06-23  Andrew Waterman  <andrew@sifive.com>

* riscv-opc.c (riscv_opcodes): Mark I-type SLT instruction as an
alias; do not mark SLTI instruction as an alias.
opcodes/ChangeLog diff | blob | blame | history
opcodes/riscv-opc.c diff | blob | blame | history
GDB Binutils - Deliverables
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