+#as:
+#objdump: -dr
+#name: insnsc
+
+dump.o: file format elf32-ft32
+
+
+Disassembly of section .text:
+
+00000000 <.text>:
+ 0: 00 80 5a 45 455a8000 add.l \$r21,\$r21,\$r0
+ 0: R_FT32_RELAX \*ABS\*
+ 4: 02 80 5a 45 455a8002 sub.l \$r21,\$r21,\$r0
+ 4: R_FT32_RELAX \*ABS\*
+ 8: 04 80 5a 45 455a8004 and.l \$r21,\$r21,\$r0
+ 8: R_FT32_RELAX \*ABS\*
+ c: 05 80 5a 45 455a8005 or.l \$r21,\$r21,\$r0
+ c: R_FT32_RELAX \*ABS\*
+ 10: 0b 80 5a 45 455a800b bins.l \$r21,\$r21,\$r0
+ 10: R_FT32_RELAX \*ABS\*
+ 14: 10 80 5a 45 455a8010 add.l \$r21,\$r21,\$r1
+ 14: R_FT32_RELAX \*ABS\*
+ 18: 12 80 5a 45 455a8012 sub.l \$r21,\$r21,\$r1
+ 18: R_FT32_RELAX \*ABS\*
+ 1c: 14 80 5a 45 455a8014 and.l \$r21,\$r21,\$r1
+ 1c: R_FT32_RELAX \*ABS\*
+ 20: 15 80 5a 45 455a8015 or.l \$r21,\$r21,\$r1
+ 20: R_FT32_RELAX \*ABS\*
+ 24: 18 80 5a 45 455a8018 ashl.l \$r21,\$r21,\$r1
+ 24: R_FT32_RELAX \*ABS\*
+ 28: 1b 80 5a 45 455a801b bins.l \$r21,\$r21,\$r1
+ 28: R_FT32_RELAX \*ABS\*
+ 2c: 20 80 5a 45 455a8020 add.l \$r21,\$r21,\$r2
+ 2c: R_FT32_RELAX \*ABS\*
+ 30: 22 80 5a 45 455a8022 sub.l \$r21,\$r21,\$r2
+ 30: R_FT32_RELAX \*ABS\*
+ 34: 24 80 5a 45 455a8024 and.l \$r21,\$r21,\$r2
+ 34: R_FT32_RELAX \*ABS\*
+ 38: 25 80 5a 45 455a8025 or.l \$r21,\$r21,\$r2
+ 38: R_FT32_RELAX \*ABS\*
+ 3c: 2b 80 5a 45 455a802b bins.l \$r21,\$r21,\$r2
+ 3c: R_FT32_RELAX \*ABS\*
+ 40: 30 80 5a 45 455a8030 add.l \$r21,\$r21,\$r3
+ 40: R_FT32_RELAX \*ABS\*
+ 44: 32 80 5a 45 455a8032 sub.l \$r21,\$r21,\$r3
+ 44: R_FT32_RELAX \*ABS\*
+ 48: 34 80 5a 45 455a8034 and.l \$r21,\$r21,\$r3
+ 48: R_FT32_RELAX \*ABS\*
+ 4c: 35 80 5a 45 455a8035 or.l \$r21,\$r21,\$r3
+ 4c: R_FT32_RELAX \*ABS\*
+ 50: 3b 80 5a 45 455a803b bins.l \$r21,\$r21,\$r3
+ 50: R_FT32_RELAX \*ABS\*
+ 54: 40 80 5a 45 455a8040 add.l \$r21,\$r21,\$r4
+ 54: R_FT32_RELAX \*ABS\*
+ 58: 42 80 5a 45 455a8042 sub.l \$r21,\$r21,\$r4
+ 58: R_FT32_RELAX \*ABS\*
+ 5c: 44 80 5a 45 455a8044 and.l \$r21,\$r21,\$r4
+ 5c: R_FT32_RELAX \*ABS\*
+ 60: 45 80 5a 45 455a8045 or.l \$r21,\$r21,\$r4
+ 60: R_FT32_RELAX \*ABS\*
+ 64: 4b 80 5a 45 455a804b bins.l \$r21,\$r21,\$r4
+ 64: R_FT32_RELAX \*ABS\*
+ 68: 50 80 5a 45 455a8050 add.l \$r21,\$r21,\$r5
+ 68: R_FT32_RELAX \*ABS\*
+ 6c: 60 80 5a 45 455a8060 add.l \$r21,\$r21,\$r6
+ 6c: R_FT32_RELAX \*ABS\*
+ 70: 62 80 5a 45 455a8062 sub.l \$r21,\$r21,\$r6
+ 70: R_FT32_RELAX \*ABS\*
+ 74: 65 80 5a 45 455a8065 or.l \$r21,\$r21,\$r6
+ 74: R_FT32_RELAX \*ABS\*
+ 78: 70 80 5a 45 455a8070 add.l \$r21,\$r21,\$r7
+ 78: R_FT32_RELAX \*ABS\*
+ 7c: 72 80 5a 45 455a8072 sub.l \$r21,\$r21,\$r7
+ 7c: R_FT32_RELAX \*ABS\*
+ 80: 75 80 5a 45 455a8075 or.l \$r21,\$r21,\$r7
+ 80: R_FT32_RELAX \*ABS\*
+ 84: 80 80 5a 45 455a8080 add.l \$r21,\$r21,\$r8
+ 84: R_FT32_RELAX \*ABS\*
+ 88: 82 80 5a 45 455a8082 sub.l \$r21,\$r21,\$r8
+ 88: R_FT32_RELAX \*ABS\*
+ 8c: 90 80 5a 45 455a8090 add.l \$r21,\$r21,\$r9
+ 8c: R_FT32_RELAX \*ABS\*
+ 90: 92 80 5a 45 455a8092 sub.l \$r21,\$r21,\$r9
+ 90: R_FT32_RELAX \*ABS\*
+ 94: a0 80 5a 45 455a80a0 add.l \$r21,\$r21,\$r10
+ 94: R_FT32_RELAX \*ABS\*
+ 98: a2 80 5a 45 455a80a2 sub.l \$r21,\$r21,\$r10
+ 98: R_FT32_RELAX \*ABS\*
+ 9c: b0 80 5a 45 455a80b0 add.l \$r21,\$r21,\$r11
+ 9c: R_FT32_RELAX \*ABS\*
+ a0: d0 80 5a 45 455a80d0 add.l \$r21,\$r21,\$r13
+ a0: R_FT32_RELAX \*ABS\*
+ a4: d2 80 5a 45 455a80d2 sub.l \$r21,\$r21,\$r13
+ a4: R_FT32_RELAX \*ABS\*
+ a8: d5 80 5a 45 455a80d5 or.l \$r21,\$r21,\$r13
+ a8: R_FT32_RELAX \*ABS\*
+ ac: e0 80 5a 45 455a80e0 add.l \$r21,\$r21,\$r14
+ ac: R_FT32_RELAX \*ABS\*
+ b0: e2 80 5a 45 455a80e2 sub.l \$r21,\$r21,\$r14
+ b0: R_FT32_RELAX \*ABS\*
+ b4: f0 80 5a 45 455a80f0 add.l \$r21,\$r21,\$r15
+ b4: R_FT32_RELAX \*ABS\*
+ b8: f2 80 5a 45 455a80f2 sub.l \$r21,\$r21,\$r15
+ b8: R_FT32_RELAX \*ABS\*
+ bc: f5 80 5a 45 455a80f5 or.l \$r21,\$r21,\$r15
+ bc: R_FT32_RELAX \*ABS\*
+ c0: 00 81 5a 45 455a8100 add.l \$r21,\$r21,\$r16
+ c0: R_FT32_RELAX \*ABS\*
+ c4: 02 81 5a 45 455a8102 sub.l \$r21,\$r21,\$r16
+ c4: R_FT32_RELAX \*ABS\*
+ c8: 10 81 5a 45 455a8110 add.l \$r21,\$r21,\$r17
+ c8: R_FT32_RELAX \*ABS\*
+ cc: 20 81 5a 45 455a8120 add.l \$r21,\$r21,\$r18
+ cc: R_FT32_RELAX \*ABS\*
+ d0: 22 81 5a 45 455a8122 sub.l \$r21,\$r21,\$r18
+ d0: R_FT32_RELAX \*ABS\*
+ d4: 30 81 5a 45 455a8130 add.l \$r21,\$r21,\$r19
+ d4: R_FT32_RELAX \*ABS\*
+ d8: 40 81 5a 45 455a8140 add.l \$r21,\$r21,\$r20
+ d8: R_FT32_RELAX \*ABS\*
+ dc: 70 81 5a 45 455a8170 add.l \$r21,\$r21,\$r23
+ dc: R_FT32_RELAX \*ABS\*
+ e0: 80 81 5a 45 455a8180 add.l \$r21,\$r21,\$r24
+ e0: R_FT32_RELAX \*ABS\*
+ e4: 90 81 5a 45 455a8190 add.l \$r21,\$r21,\$r25
+ e4: R_FT32_RELAX \*ABS\*
+ e8: a0 81 5a 45 455a81a0 add.l \$r21,\$r21,\$r26
+ e8: R_FT32_RELAX \*ABS\*
+ ec: b0 81 5a 45 455a81b0 add.l \$r21,\$r21,\$r27
+ ec: R_FT32_RELAX \*ABS\*
+ f0: e0 81 5a 45 455a81e0 add.l \$r21,\$r21,\$r30
+ f0: R_FT32_RELAX \*ABS\*
+ f4: f0 81 5a 45 455a81f0 add.l \$r21,\$r21,\$r31
+ f4: R_FT32_RELAX \*ABS\*
+ f8: 00 c0 5a 45 455ac000 move.l \$r21,\$r21
+ f8: R_FT32_10 \*ABS\*
+ fc: 03 c0 5a 45 455ac003 ldl.l \$r21,\$r21,0
+ fc: R_FT32_10 \*ABS\*
+ 100: 0c c0 5a 45 455ac00c bexts.l \$r21,\$r21,0
+ 100: R_FT32_10 \*ABS\*
+ 104: 0d c0 5a 45 455ac00d bextu.l \$r21,\$r21,0
+ 104: R_FT32_10 \*ABS\*
+ 108: 00 c0 5a 45 455ac000 move.l \$r21,\$r21
+ 108: R_FT32_10 \*ABS\*\+0x1
+ 10c: 01 c0 5a 45 455ac001 ror.l \$r21,\$r21,0
+ 10c: R_FT32_10 \*ABS\*\+0x1
+ 110: 03 c0 5a 45 455ac003 ldl.l \$r21,\$r21,0
+ 110: R_FT32_10 \*ABS\*\+0x1
+ 114: 04 c0 5a 45 455ac004 and.l \$r21,\$r21,0
+ 114: R_FT32_10 \*ABS\*\+0x1
+ 118: 06 c0 5a 45 455ac006 xor.l \$r21,\$r21,0
+ 118: R_FT32_10 \*ABS\*\+0x1
+ 11c: 09 c0 5a 45 455ac009 lshr.l \$r21,\$r21,0
+ 11c: R_FT32_10 \*ABS\*\+0x1
+ 120: 0a c0 5a 45 455ac00a ashr.l \$r21,\$r21,0
+ 120: R_FT32_10 \*ABS\*\+0x1
+ 124: 00 c0 5a 45 455ac000 move.l \$r21,\$r21
+ 124: R_FT32_10 \*ABS\*\+0x2
+ 128: 01 c0 5a 45 455ac001 ror.l \$r21,\$r21,0
+ 128: R_FT32_10 \*ABS\*\+0x2
+ 12c: 08 c0 5a 45 455ac008 ashl.l \$r21,\$r21,0
+ 12c: R_FT32_10 \*ABS\*\+0x2
+ 130: 0a c0 5a 45 455ac00a ashr.l \$r21,\$r21,0
+ 130: R_FT32_10 \*ABS\*\+0x2
+ 134: 04 c0 5a 45 455ac004 and.l \$r21,\$r21,0
+ 134: R_FT32_10 \*ABS\*\+0x3
+ 138: 08 c0 5a 45 455ac008 ashl.l \$r21,\$r21,0
+ 138: R_FT32_10 \*ABS\*\+0x3
+ 13c: 09 c0 5a 45 455ac009 lshr.l \$r21,\$r21,0
+ 13c: R_FT32_10 \*ABS\*\+0x3
+ 140: 00 c0 5a 45 455ac000 move.l \$r21,\$r21
+ 140: R_FT32_10 \*ABS\*\+0x4
+ 144: 08 c0 5a 45 455ac008 ashl.l \$r21,\$r21,0
+ 144: R_FT32_10 \*ABS\*\+0x4
+ 148: 08 c0 5a 45 455ac008 ashl.l \$r21,\$r21,0
+ 148: R_FT32_10 \*ABS\*\+0x5
+ 14c: 04 c0 5a 45 455ac004 and.l \$r21,\$r21,0
+ 14c: R_FT32_10 \*ABS\*\+0x6
+ 150: 04 c0 5a 45 455ac004 and.l \$r21,\$r21,0
+ 150: R_FT32_10 \*ABS\*\+0x7
+ 154: 00 c0 5a 45 455ac000 move.l \$r21,\$r21
+ 154: R_FT32_10 \*ABS\*\+0x8
+ 158: 01 c0 5a 45 455ac001 ror.l \$r21,\$r21,0
+ 158: R_FT32_10 \*ABS\*\+0x8
+ 15c: 08 c0 5a 45 455ac008 ashl.l \$r21,\$r21,0
+ 15c: R_FT32_10 \*ABS\*\+0x8
+ 160: 09 c0 5a 45 455ac009 lshr.l \$r21,\$r21,0
+ 160: R_FT32_10 \*ABS\*\+0x8
+ 164: 08 c0 5a 45 455ac008 ashl.l \$r21,\$r21,0
+ 164: R_FT32_10 \*ABS\*\+0x9
+ 168: 00 c0 5a 45 455ac000 move.l \$r21,\$r21
+ 168: R_FT32_10 \*ABS\*\+0xc
+ 16c: 0a c0 5a 45 455ac00a ashr.l \$r21,\$r21,0
+ 16c: R_FT32_10 \*ABS\*\+0xc
+ 170: 04 c0 5a 45 455ac004 and.l \$r21,\$r21,0
+ 170: R_FT32_10 \*ABS\*\+0xf
+ 174: 00 c0 5a 45 455ac000 move.l \$r21,\$r21
+ 174: R_FT32_10 \*ABS\*\+0x10
+ 178: 08 c0 5a 45 455ac008 ashl.l \$r21,\$r21,0
+ 178: R_FT32_10 \*ABS\*\+0x10
+ 17c: 09 c0 5a 45 455ac009 lshr.l \$r21,\$r21,0
+ 17c: R_FT32_10 \*ABS\*\+0x10
+ 180: 0a c0 5a 45 455ac00a ashr.l \$r21,\$r21,0
+ 180: R_FT32_10 \*ABS\*\+0x10
+ 184: 0b c0 5a 45 455ac00b bins.l \$r21,\$r21,0
+ 184: R_FT32_10 \*ABS\*\+0x10
+ 188: 00 c0 5a 45 455ac000 move.l \$r21,\$r21
+ 188: R_FT32_10 \*ABS\*\+0x18
+ 18c: 02 c0 5a 45 455ac002 sub.l \$r21,\$r21,0
+ 18c: R_FT32_10 \*ABS\*\+0x18
+ 190: 00 c0 5a 45 455ac000 move.l \$r21,\$r21
+ 190: R_FT32_10 \*ABS\*\+0x1c
+ 194: 02 c0 5a 45 455ac002 sub.l \$r21,\$r21,0
+ 194: R_FT32_10 \*ABS\*\+0x1c
+ 198: 04 c0 5a 45 455ac004 and.l \$r21,\$r21,0
+ 198: R_FT32_10 \*ABS\*\+0x1f
+ 19c: 00 c0 5a 45 455ac000 move.l \$r21,\$r21
+ 19c: R_FT32_10 \*ABS\*\+0x20
+ 1a0: 02 c0 5a 45 455ac002 sub.l \$r21,\$r21,0
+ 1a0: R_FT32_10 \*ABS\*\+0x20
+ 1a4: 0b c0 5a 45 455ac00b bins.l \$r21,\$r21,0
+ 1a4: R_FT32_10 \*ABS\*\+0x20
+ 1a8: 0b c0 5a 45 455ac00b bins.l \$r21,\$r21,0
+ 1a8: R_FT32_10 \*ABS\*\+0x21
+ 1ac: 0b c0 5a 45 455ac00b bins.l \$r21,\$r21,0
+ 1ac: R_FT32_10 \*ABS\*\+0x22
+ 1b0: 00 c0 5a 45 455ac000 move.l \$r21,\$r21
+ 1b0: R_FT32_10 \*ABS\*\+0x24
+ 1b4: 02 c0 5a 45 455ac002 sub.l \$r21,\$r21,0
+ 1b4: R_FT32_10 \*ABS\*\+0x24
+ 1b8: 0b c0 5a 45 455ac00b bins.l \$r21,\$r21,0
+ 1b8: R_FT32_10 \*ABS\*\+0x24
+ 1bc: 0b c0 5a 45 455ac00b bins.l \$r21,\$r21,0
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+ 1c0: 0b c0 5a 45 455ac00b bins.l \$r21,\$r21,0
+ 1c0: R_FT32_10 \*ABS\*\+0x26
+ 1c4: 0b c0 5a 45 455ac00b bins.l \$r21,\$r21,0
+ 1c4: R_FT32_10 \*ABS\*\+0x27
+ 1c8: 00 c0 5a 45 455ac000 move.l \$r21,\$r21
+ 1c8: R_FT32_10 \*ABS\*\+0x28
+ 1cc: 02 c0 5a 45 455ac002 sub.l \$r21,\$r21,0
+ 1cc: R_FT32_10 \*ABS\*\+0x28
+ 1d0: 0b c0 5a 45 455ac00b bins.l \$r21,\$r21,0
+ 1d0: R_FT32_10 \*ABS\*\+0x2a
+ 1d4: 0b c0 5a 45 455ac00b bins.l \$r21,\$r21,0
+ 1d4: R_FT32_10 \*ABS\*\+0x2b
+ 1d8: 00 c0 5a 45 455ac000 move.l \$r21,\$r21
+ 1d8: R_FT32_10 \*ABS\*\+0x2c
+ 1dc: 02 c0 5a 45 455ac002 sub.l \$r21,\$r21,0
+ 1dc: R_FT32_10 \*ABS\*\+0x2c
+ 1e0: 00 c0 5a 45 455ac000 move.l \$r21,\$r21
+ 1e0: R_FT32_10 \*ABS\*\+0x30
+ 1e4: 00 c0 5a 45 455ac000 move.l \$r21,\$r21
+ 1e4: R_FT32_10 \*ABS\*\+0x34
+ 1e8: 03 c0 5a 45 455ac003 ldl.l \$r21,\$r21,0
+ 1e8: R_FT32_10 \*ABS\*\+0x3c
+ 1ec: 0b c0 5a 45 455ac00b bins.l \$r21,\$r21,0
+ 1ec: R_FT32_10 \*ABS\*\+0x40
+ 1f0: 03 c0 5a 45 455ac003 ldl.l \$r21,\$r21,0
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+ 1f4: R_FT32_10 \*ABS\*\+0x55
+ 1f8: 04 c0 5a 45 455ac004 and.l \$r21,\$r21,0
+ 1f8: R_FT32_10 \*ABS\*\+0x7f
+ 1fc: 00 c0 5a 45 455ac000 move.l \$r21,\$r21
+ 1fc: R_FT32_10 \*ABS\*\+0x80
+ 200: 00 c0 5a 45 455ac000 move.l \$r21,\$r21
+ 200: R_FT32_10 \*ABS\*\+0x98
+ 204: 0b c0 5a 45 455ac00b bins.l \$r21,\$r21,0
+ 204: R_FT32_10 \*ABS\*\+0xa0
+ 208: 00 c0 5a 45 455ac000 move.l \$r21,\$r21
+ 208: R_FT32_10 \*ABS\*\+0xa8
+ 20c: 00 c0 5a 45 455ac000 move.l \$r21,\$r21
+ 20c: R_FT32_10 \*ABS\*\+0xdc
+ 210: 04 c0 5a 45 455ac004 and.l \$r21,\$r21,0
+ 210: R_FT32_10 \*ABS\*\+0xff
+ 214: 03 c0 5a 45 455ac003 ldl.l \$r21,\$r21,0
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+ 218: 03 c0 5a 45 455ac003 ldl.l \$r21,\$r21,0
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+ 220: 03 c0 5a 45 455ac003 ldl.l \$r21,\$r21,0
+ 220: R_FT32_10 \*ABS\*\+0x13e
+ 224: 00 c0 5a 45 455ac000 move.l \$r21,\$r21
+ 224: R_FT32_10 \*ABS\*\+0x170
+ 228: 0b c0 5a 45 455ac00b bins.l \$r21,\$r21,0
+ 228: R_FT32_10 \*ABS\*\+0x194
+ 22c: 0b c0 5a 45 455ac00b bins.l \$r21,\$r21,0
+ 22c: R_FT32_10 \*ABS\*-0x1e0
+ 230: 0b c0 5a 45 455ac00b bins.l \$r21,\$r21,0
+ 230: R_FT32_10 \*ABS\*-0x1df
+ 234: 0b c0 5a 45 455ac00b bins.l \$r21,\$r21,0
+ 234: R_FT32_10 \*ABS\*-0x1de
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+ 238: R_FT32_10 \*ABS\*-0x1dd
+ 23c: 0b c0 5a 45 455ac00b bins.l \$r21,\$r21,0
+ 23c: R_FT32_10 \*ABS\*-0x1dc
+ 240: 0b c0 5a 45 455ac00b bins.l \$r21,\$r21,0
+ 240: R_FT32_10 \*ABS\*-0x1db
+ 244: 0b c0 5a 45 455ac00b bins.l \$r21,\$r21,0
+ 244: R_FT32_10 \*ABS\*-0x1da
+ 248: 0b c0 5a 45 455ac00b bins.l \$r21,\$r21,0
+ 248: R_FT32_10 \*ABS\*-0x1d9
+ 24c: 0b c0 5a 45 455ac00b bins.l \$r21,\$r21,0
+ 24c: R_FT32_10 \*ABS\*-0x1d8
+ 250: 0b c0 5a 45 455ac00b bins.l \$r21,\$r21,0
+ 250: R_FT32_10 \*ABS\*-0x1d7
+ 254: 0b c0 5a 45 455ac00b bins.l \$r21,\$r21,0
+ 254: R_FT32_10 \*ABS\*-0x1d5
+ 258: 0b c0 5a 45 455ac00b bins.l \$r21,\$r21,0
+ 258: R_FT32_10 \*ABS\*-0x1d1
+ 25c: 0b c0 5a 45 455ac00b bins.l \$r21,\$r21,0
+ 25c: R_FT32_10 \*ABS\*-0x1cd
+ 260: 0b c0 5a 45 455ac00b bins.l \$r21,\$r21,0
+ 260: R_FT32_10 \*ABS\*-0x1c9
+ 264: 03 c0 5a 45 455ac003 ldl.l \$r21,\$r21,0
+ 264: R_FT32_10 \*ABS\*-0x1c8
+ 268: 00 c0 5a 45 455ac000 move.l \$r21,\$r21
+ 268: R_FT32_10 \*ABS\*-0x10
+ 26c: 00 c0 5a 45 455ac000 move.l \$r21,\$r21
+ 26c: R_FT32_10 \*ABS\*-0x8
+ 270: 00 c0 5a 45 455ac000 move.l \$r21,\$r21
+ 270: R_FT32_10 \*ABS\*-0x4
+ 274: 00 c0 5a 45 455ac000 move.l \$r21,\$r21
+ 274: R_FT32_10 \*ABS\*-0x2
+ 278: 00 c0 5a 45 455ac000 move.l \$r21,\$r21
+ 278: R_FT32_10 \*ABS\*-0x1
+ 27c: 03 c0 5a 45 455ac003 ldl.l \$r21,\$r21,0
+ 27c: R_FT32_10 \*ABS\*-0x1
+ 280: 06 c0 5a 45 455ac006 xor.l \$r21,\$r21,0
+ 280: R_FT32_10 \*ABS\*-0x1
+ 284: 52 01 50 45 45500152 sub.l \$r21,\$r0,\$r21
+ 284: R_FT32_RELAX \*ABS\*
+ 288: 52 81 50 45 45508152 sub.l \$r21,\$r1,\$r21
+ 288: R_FT32_RELAX \*ABS\*
+ 28c: 52 01 51 45 45510152 sub.l \$r21,\$r2,\$r21
+ 28c: R_FT32_RELAX \*ABS\*
+ 290: 58 01 51 45 45510158 ashl.l \$r21,\$r2,\$r21
+ 290: R_FT32_RELAX \*ABS\*
+ 294: 52 81 51 45 45518152 sub.l \$r21,\$r3,\$r21
+ 294: R_FT32_RELAX \*ABS\*
+ 298: 52 01 52 45 45520152 sub.l \$r21,\$r4,\$r21
+ 298: R_FT32_RELAX \*ABS\*
+ 29c: 52 01 53 45 45530152 sub.l \$r21,\$r6,\$r21
+ 29c: R_FT32_RELAX \*ABS\*
+ 2a0: 52 81 53 45 45538152 sub.l \$r21,\$r7,\$r21
+ 2a0: R_FT32_RELAX \*ABS\*
+ 2a4: 02 c0 ea 59 59eac002 cmp.b \$r21,0
+ 2a4: R_FT32_10 \*ABS\*
+ 2a8: 02 c0 ea 59 59eac002 cmp.b \$r21,0
+ 2a8: R_FT32_10 \*ABS\*\+0x1
+ 2ac: 02 c0 ea 59 59eac002 cmp.b \$r21,0
+ 2ac: R_FT32_10 \*ABS\*\+0x2
+ 2b0: 02 c0 ea 59 59eac002 cmp.b \$r21,0
+ 2b0: R_FT32_10 \*ABS\*\+0x3
+ 2b4: 02 c0 ea 59 59eac002 cmp.b \$r21,0
+ 2b4: R_FT32_10 \*ABS\*\+0x4
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+ 2b8: R_FT32_10 \*ABS\*\+0x5
+ 2bc: 02 c0 ea 59 59eac002 cmp.b \$r21,0
+ 2bc: R_FT32_10 \*ABS\*\+0x7
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+ 2c0: R_FT32_10 \*ABS\*\+0x8
+ 2c4: 02 c0 ea 59 59eac002 cmp.b \$r21,0
+ 2c4: R_FT32_10 \*ABS\*-0x1
+ 2c8: 02 80 ea 5d 5dea8002 cmp.l \$r21,\$r0
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+ 2cc: 12 80 ea 5d 5dea8012 cmp.l \$r21,\$r1
+ 2cc: R_FT32_RELAX \*ABS\*
+ 2d0: 22 80 ea 5d 5dea8022 cmp.l \$r21,\$r2
+ 2d0: R_FT32_RELAX \*ABS\*
+ 2d4: 32 80 ea 5d 5dea8032 cmp.l \$r21,\$r3
+ 2d4: R_FT32_RELAX \*ABS\*
+ 2d8: 42 80 ea 5d 5dea8042 cmp.l \$r21,\$r4
+ 2d8: R_FT32_RELAX \*ABS\*
+ 2dc: 52 80 ea 5d 5dea8052 cmp.l \$r21,\$r5
+ 2dc: R_FT32_RELAX \*ABS\*
+ 2e0: 62 80 ea 5d 5dea8062 cmp.l \$r21,\$r6
+ 2e0: R_FT32_RELAX \*ABS\*
+ 2e4: 72 80 ea 5d 5dea8072 cmp.l \$r21,\$r7
+ 2e4: R_FT32_RELAX \*ABS\*
+ 2e8: 82 80 ea 5d 5dea8082 cmp.l \$r21,\$r8
+ 2e8: R_FT32_RELAX \*ABS\*
+ 2ec: a2 80 ea 5d 5dea80a2 cmp.l \$r21,\$r10
+ 2ec: R_FT32_RELAX \*ABS\*
+ 2f0: d2 80 ea 5d 5dea80d2 cmp.l \$r21,\$r13
+ 2f0: R_FT32_RELAX \*ABS\*
+ 2f4: e2 80 ea 5d 5dea80e2 cmp.l \$r21,\$r14
+ 2f4: R_FT32_RELAX \*ABS\*
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+ 2f8: R_FT32_RELAX \*ABS\*
+ 2fc: 02 81 ea 5d 5dea8102 cmp.l \$r21,\$r16
+ 2fc: R_FT32_RELAX \*ABS\*
+ 300: 12 81 ea 5d 5dea8112 cmp.l \$r21,\$r17
+ 300: R_FT32_RELAX \*ABS\*
+ 304: 22 81 ea 5d 5dea8122 cmp.l \$r21,\$r18
+ 304: R_FT32_RELAX \*ABS\*
+ 308: 32 81 ea 5d 5dea8132 cmp.l \$r21,\$r19
+ 308: R_FT32_RELAX \*ABS\*
+ 30c: 72 81 ea 5d 5dea8172 cmp.l \$r21,\$r23
+ 30c: R_FT32_RELAX \*ABS\*
+ 310: 02 c0 ea 5d 5deac002 cmp.l \$r21,0
+ 310: R_FT32_10 \*ABS\*
+ 314: 02 c0 ea 5d 5deac002 cmp.l \$r21,0
+ 314: R_FT32_10 \*ABS\*\+0x1
+ 318: 02 c0 ea 5d 5deac002 cmp.l \$r21,0
+ 318: R_FT32_10 \*ABS\*\+0x2
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+ 320: 02 c0 ea 5d 5deac002 cmp.l \$r21,0
+ 320: R_FT32_10 \*ABS\*\+0x4
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+ 324: R_FT32_10 \*ABS\*\+0x5
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+ 328: R_FT32_10 \*ABS\*\+0x6
+ 32c: 02 c0 ea 5d 5deac002 cmp.l \$r21,0
+ 32c: R_FT32_10 \*ABS\*\+0x7
+ 330: 02 c0 ea 5d 5deac002 cmp.l \$r21,0
+ 330: R_FT32_10 \*ABS\*\+0x8
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+ 334: R_FT32_10 \*ABS\*\+0x9
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+ 358: R_FT32_10 \*ABS\*\+0x20
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+ 364: R_FT32_10 \*ABS\*\+0x23
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+ 368: R_FT32_10 \*ABS\*\+0x24
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+ 440: R_FT32_10 \*ABS\*
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+ 444: R_FT32_10 \*ABS\*
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+ 550: R_FT32_10 \*ABS\*
+ 554: 00 40 59 45 45594000 move.l \$r21,\$r18
+ 554: R_FT32_10 \*ABS\*
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+ 558: R_FT32_10 \*ABS\*
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+ 55c: R_FT32_10 \*ABS\*
+ 560: 00 c0 5a 45 455ac000 move.l \$r21,\$r21
+ 560: R_FT32_10 \*ABS\*
+ 564: 00 40 5b 45 455b4000 move.l \$r21,\$r22
+ 564: R_FT32_10 \*ABS\*
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+ 568: R_FT32_10 \*ABS\*
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+ 56c: R_FT32_10 \*ABS\*
+ 570: 00 40 5c 45 455c4000 move.l \$r21,\$r24
+ 570: R_FT32_10 \*ABS\*\+0x4
+ 574: 00 c0 5c 45 455cc000 move.l \$r21,\$r25
+ 574: R_FT32_10 \*ABS\*
+ 578: 00 40 5d 45 455d4000 move.l \$r21,\$r26
+ 578: R_FT32_10 \*ABS\*
+ 57c: 00 c0 5d 45 455dc000 move.l \$r21,\$r27
+ 57c: R_FT32_10 \*ABS\*
+ 580: 00 c0 5e 45 455ec000 move.l \$r21,\$r29
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+ 584: 00 c0 5e 45 455ec000 move.l \$r21,\$r29
+ 584: R_FT32_10 \*ABS\*-0xc0
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