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x86-64: bndmk, bndldx, and bndstx don't allow RIP-relative addressing
author
Jan Beulich
<jbeulich@novell.com>
Thu, 13 Sep 2018 09:03:35 +0000
(11:03 +0200)
committer
Jan Beulich
<jbeulich@suse.com>
Thu, 13 Sep 2018 09:03:35 +0000
(11:03 +0200)
gas/ChangeLog
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gas/testsuite/gas/i386/x86-64-mpx.d
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gas/testsuite/gas/i386/x86-64-mpx.s
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opcodes/ChangeLog
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opcodes/i386-dis.c
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diff --git
a/gas/ChangeLog
b/gas/ChangeLog
index 84895bec800946553f30a380960dfb53f97732b7..8675e2fe75af6c4c54de046060822571c9e13ae9 100644
(file)
--- a/
gas/ChangeLog
+++ b/
gas/ChangeLog
@@
-1,3
+1,9
@@
+2018-09-13 Jan Beulich <jbeulich@suse.com>
+
+ * testsuite/gas/i386/x86-64-mpx.s: And BNDMK case with RIP-
+ relative memory operand.
+ * testsuite/gas/i386/x86-64-mpx.d: Adjust expectations.
+
2018-09-13 Nick Clifton <nickc@redhat.com>
* dwarf2dbg.c (generic_dwarf2_emit_offset): Use memset to
2018-09-13 Nick Clifton <nickc@redhat.com>
* dwarf2dbg.c (generic_dwarf2_emit_offset): Use memset to
diff --git
a/gas/testsuite/gas/i386/x86-64-mpx.d
b/gas/testsuite/gas/i386/x86-64-mpx.d
index e2a7828b69d4f9dfe8e004202da71efc475ad114..bb83adcbf5113e9728b93f7984e18e0d1367fbe2 100644
(file)
--- a/
gas/testsuite/gas/i386/x86-64-mpx.d
+++ b/
gas/testsuite/gas/i386/x86-64-mpx.d
@@
-186,4
+186,5
@@
Disassembly of section .text:
[a-f0-9]+ <bad>:
[ ]*[a-f0-9]+: 0f 1a 30 bndldx \(%rax\),\(bad\)
[ ]*[a-f0-9]+: 66 0f 1a c4 bndmov \(bad\),%bnd0
[a-f0-9]+ <bad>:
[ ]*[a-f0-9]+: 0f 1a 30 bndldx \(%rax\),\(bad\)
[ ]*[a-f0-9]+: 66 0f 1a c4 bndmov \(bad\),%bnd0
+[ ]*[a-f0-9]+: f3 0f 1b 05 90 90 90 90 bndmk \(bad\),%bnd0
#pass
#pass
diff --git
a/gas/testsuite/gas/i386/x86-64-mpx.s
b/gas/testsuite/gas/i386/x86-64-mpx.s
index 1263408f3d9518f5ec425a9e644830eb90340b27..726e35ab3547381d3bb7f0b4cf20c27da16fe6fa 100644
(file)
--- a/
gas/testsuite/gas/i386/x86-64-mpx.s
+++ b/
gas/testsuite/gas/i386/x86-64-mpx.s
@@
-221,3
+221,10
@@
bad:
.byte 0x0f
.byte 0x1a
.byte 0xc4
.byte 0x0f
.byte 0x1a
.byte 0xc4
+
+ # bndmk (bad),%bnd0
+ .byte 0xf3
+ .byte 0x0f
+ .byte 0x1b
+ .byte 0x05
+ .long 0x90909090
diff --git
a/opcodes/ChangeLog
b/opcodes/ChangeLog
index 1e59d0093b79e5fbac342c76896aee7ea5136d77..870e8fcc32043088a951035edbba11cdde952cc6 100644
(file)
--- a/
opcodes/ChangeLog
+++ b/
opcodes/ChangeLog
@@
-1,3
+1,10
@@
+2018-09-13 Jan Beulich <jbeulich@suse.com>
+
+ * i386-dis.c (Mv_bnd, v_bndmk_mode): New.
+ (mod_table): Use Mv_bnd for bndldx, bndstx, and bndmk.
+ (intel_operand_size): Handle v_bndmk_mode.
+ (OP_E_memory): Likewise. Produce (bad) when also riprel.
+
2018-09-08 John Darrington <john@darrington.wattle.id.au>
* disassemble.c (ARCH_s12z): Define if ARCH_all.
2018-09-08 John Darrington <john@darrington.wattle.id.au>
* disassemble.c (ARCH_s12z): Define if ARCH_all.
diff --git
a/opcodes/i386-dis.c
b/opcodes/i386-dis.c
index 77f2e2a3d37c1ca7c26e28f877ec6f3d8db8a5b2..930569e0f73a2544d317e4542a0fe5d9dd54e4cd 100644
(file)
--- a/
opcodes/i386-dis.c
+++ b/
opcodes/i386-dis.c
@@
-273,6
+273,7
@@
fetch_data (struct disassemble_info *info, bfd_byte *addr)
#define Mo { OP_M, o_mode }
#define Mp { OP_M, f_mode } /* 32 or 48 bit memory operand for LDS, LES etc */
#define Mq { OP_M, q_mode }
#define Mo { OP_M, o_mode }
#define Mp { OP_M, f_mode } /* 32 or 48 bit memory operand for LDS, LES etc */
#define Mq { OP_M, q_mode }
+#define Mv_bnd { OP_M, v_bndmk_mode }
#define Mx { OP_M, x_mode }
#define Mxmm { OP_M, xmm_mode }
#define Gb { OP_G, b_mode }
#define Mx { OP_M, x_mode }
#define Mxmm { OP_M, xmm_mode }
#define Gb { OP_G, b_mode }
@@
-561,6
+562,8
@@
enum
cond_jump_mode,
loop_jcxz_mode,
v_bnd_mode,
cond_jump_mode,
loop_jcxz_mode,
v_bnd_mode,
+ /* like v_bnd_mode in 32bit, no RIP-rel in 64bit mode. */
+ v_bndmk_mode,
/* operand size depends on REX prefixes. */
dq_mode,
/* registers like dq_mode, memory like w_mode. */
/* operand size depends on REX prefixes. */
dq_mode,
/* registers like dq_mode, memory like w_mode. */
@@
-11646,17
+11649,17
@@
static const struct dis386 mod_table[][2] = {
},
{
/* MOD_0F1A_PREFIX_0 */
},
{
/* MOD_0F1A_PREFIX_0 */
- { "bndldx", { Gbnd,
E
v_bnd }, 0 },
+ { "bndldx", { Gbnd,
M
v_bnd }, 0 },
{ "nopQ", { Ev }, 0 },
},
{
/* MOD_0F1B_PREFIX_0 */
{ "nopQ", { Ev }, 0 },
},
{
/* MOD_0F1B_PREFIX_0 */
- { "bndstx", {
E
v_bnd, Gbnd }, 0 },
+ { "bndstx", {
M
v_bnd, Gbnd }, 0 },
{ "nopQ", { Ev }, 0 },
},
{
/* MOD_0F1B_PREFIX_1 */
{ "nopQ", { Ev }, 0 },
},
{
/* MOD_0F1B_PREFIX_1 */
- { "bndmk", { Gbnd,
E
v_bnd }, 0 },
+ { "bndmk", { Gbnd,
M
v_bnd }, 0 },
{ "nopQ", { Ev }, 0 },
},
{
{ "nopQ", { Ev }, 0 },
},
{
@@
-15083,6
+15086,7
@@
intel_operand_size (int bytemode, int sizeflag)
oappend ("WORD PTR ");
break;
case v_bnd_mode:
oappend ("WORD PTR ");
break;
case v_bnd_mode:
+ case v_bndmk_mode:
default:
break;
}
default:
break;
}
@@
-15343,6
+15347,7
@@
OP_E_memory (int bytemode, int sizeflag)
int scale = 0;
int addr32flag = !((sizeflag & AFLAG)
|| bytemode == v_bnd_mode
int scale = 0;
int addr32flag = !((sizeflag & AFLAG)
|| bytemode == v_bnd_mode
+ || bytemode == v_bndmk_mode
|| bytemode == bnd_mode
|| bytemode == bnd_swap_mode);
const char **indexes64 = names64;
|| bytemode == bnd_mode
|| bytemode == bnd_swap_mode);
const char **indexes64 = names64;
@@
-15419,6
+15424,11
@@
OP_E_memory (int bytemode, int sizeflag)
if (address_mode == mode_64bit && !havesib)
riprel = 1;
disp = get32s ();
if (address_mode == mode_64bit && !havesib)
riprel = 1;
disp = get32s ();
+ if (riprel && bytemode == v_bndmk_mode)
+ {
+ oappend ("(bad)");
+ return;
+ }
}
break;
case 1:
}
break;
case 1:
@@
-15476,6
+15486,7
@@
OP_E_memory (int bytemode, int sizeflag)
if ((havebase || haveindex || needaddr32 || riprel)
&& (bytemode != v_bnd_mode)
if ((havebase || haveindex || needaddr32 || riprel)
&& (bytemode != v_bnd_mode)
+ && (bytemode != v_bndmk_mode)
&& (bytemode != bnd_mode)
&& (bytemode != bnd_swap_mode))
used_prefixes |= PREFIX_ADDR;
&& (bytemode != bnd_mode)
&& (bytemode != bnd_swap_mode))
used_prefixes |= PREFIX_ADDR;
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