Merge tag 'omap-fixes-b-for-3.10-rc' of git://git.kernel.org/pub/scm/linux/kernel...

More OMAP hwmod and clock fixes for v3.10-rc.  Fixes the AM33xx UART2.
Also fixes some CCF-related breakage on OMAP36xx/37xx, affecting DSS
at the very least.

Basic test logs for this branch are here:

http://www.pwsan.com/omap/testlogs/fixes_b_v3.10-rc/20130606093449/

diff --git a/arch/arm/mach-omap2/clock36xx.c b/arch/arm/mach-omap2/clock36xx.c
index 8f3bf4e509082fad0dcb412a0a21573b68e4a485..bbd6a3f717e64e5b23cce67591f374d4dcb7b2f3 100644 (file)
--- a/arch/arm/mach-omap2/clock36xx.c
+++ b/arch/arm/mach-omap2/clock36xx.c
@@ -20,11 +20,12 @@
 
 #include <linux/kernel.h>
 #include <linux/clk.h>
+#include <linux/clk-provider.h>
 #include <linux/io.h>
 
 #include "clock.h"
 #include "clock36xx.h"
-
+#define to_clk_divider(_hw) container_of(_hw, struct clk_divider, hw)
 
 /**
  * omap36xx_pwrdn_clk_enable_with_hsdiv_restore - enable clocks suffering
@@ -39,29 +40,28 @@
  */
 int omap36xx_pwrdn_clk_enable_with_hsdiv_restore(struct clk_hw *clk)
 {
-       struct clk_hw_omap *parent;
+       struct clk_divider *parent;
        struct clk_hw *parent_hw;
-       u32 dummy_v, orig_v, clksel_shift;
+       u32 dummy_v, orig_v;
        int ret;
 
        /* Clear PWRDN bit of HSDIVIDER */
        ret = omap2_dflt_clk_enable(clk);
 
        parent_hw = __clk_get_hw(__clk_get_parent(clk->clk));
-       parent = to_clk_hw_omap(parent_hw);
+       parent = to_clk_divider(parent_hw);
 
        /* Restore the dividers */
        if (!ret) {
-               clksel_shift = __ffs(parent->clksel_mask);
-               orig_v = __raw_readl(parent->clksel_reg);
+               orig_v = __raw_readl(parent->reg);
                dummy_v = orig_v;
 
                /* Write any other value different from the Read value */
-               dummy_v ^= (1 << clksel_shift);
-               __raw_writel(dummy_v, parent->clksel_reg);
+               dummy_v ^= (1 << parent->shift);
+               __raw_writel(dummy_v, parent->reg);
 
                /* Write the original divider */
-               __raw_writel(orig_v, parent->clksel_reg);
+               __raw_writel(orig_v, parent->reg);
        }
 
        return ret;

diff --git a/arch/arm/mach-omap2/omap_hwmod_33xx_data.c b/arch/arm/mach-omap2/omap_hwmod_33xx_data.c
index 075f7cc510261ee959352daf07818370b4188ab9..69337af748cc5ddb6c58c11f35b12708f3e432ab 100644 (file)
--- a/arch/arm/mach-omap2/omap_hwmod_33xx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_33xx_data.c
@@ -2007,6 +2007,13 @@ static struct omap_hwmod am33xx_uart1_hwmod = {
        },
 };
 
+/* uart2 */
+static struct omap_hwmod_dma_info uart2_edma_reqs[] = {
+       { .name = "tx", .dma_req = 28, },
+       { .name = "rx", .dma_req = 29, },
+       { .dma_req = -1 }
+};
+
 static struct omap_hwmod_irq_info am33xx_uart2_irqs[] = {
        { .irq = 73 + OMAP_INTC_START, },
        { .irq = -1 },
@@ -2018,7 +2025,7 @@ static struct omap_hwmod am33xx_uart2_hwmod = {
        .clkdm_name     = "l4ls_clkdm",
        .flags          = HWMOD_SWSUP_SIDLE_ACT,
        .mpu_irqs       = am33xx_uart2_irqs,
-       .sdma_reqs      = uart1_edma_reqs,
+       .sdma_reqs      = uart2_edma_reqs,
        .main_clk       = "dpll_per_m2_div4_ck",
        .prcm           = {
                .omap4  = {