sim: bfin: fix dsp insns IH saturation/rounding behavior

When using the IH modifier, we need to first saturate the value before
rounding it, and then further saturate it a bit more.  This makes the
sim match the hardware behavior with these insns.

Signed-off-by: Robin Getz <robin.getz@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>

diff --git a/sim/bfin/ChangeLog b/sim/bfin/ChangeLog
index aaea1e5a0c7f6cfe7f7b6967a036e94ed50ac4cb..72bd3584461d488ed7c028875ed57e596b975e4a 100644 (file)
--- a/sim/bfin/ChangeLog
+++ b/sim/bfin/ChangeLog
@@ -1,3 +1,8 @@
+2011-06-18  Robin Getz  <robin.getz@analog.com>
+
+       * bfin-sim.c (extract_mult): When mmod is M_IH, change the order
+       from round/saturate to saturate/round/saturate.
+
 2011-06-18  Robin Getz  <robin.getz@analog.com>
 
        * bfin-sim.c (saturate_s40_astat): Change ">=" to ">".

diff --git a/sim/bfin/bfin-sim.c b/sim/bfin/bfin-sim.c
index 31136a0660b1ab06d8e7e22d4720165ee020e65b..5b8d601d7d681bd8370ab28216e6c4f33758e623 100644 (file)
--- a/sim/bfin/bfin-sim.c
+++ b/sim/bfin/bfin-sim.c
@@ -1534,7 +1534,17 @@ extract_mult (SIM_CPU *cpu, bu64 res, int mmod, int MM,
       case M_W32:
        return saturate_s16 (rnd16 (res), overflow);
       case M_IH:
-       return saturate_s32 (rnd16 (res), overflow) & 0xFFFF;
+       {
+         bu32 sgn = !!(res >> 39);
+         bu16 val = rnd16 (saturate_s32 (res, overflow));
+         bu32 sgn0 = (val >> 15) & 1;
+         if (sgn == sgn0 || !val)
+           return val;
+         if (sgn)
+           return 0x8000;
+         *overflow = 1;
+         return 0x7FFF;
+       }
       case M_IS:
        return saturate_s16 (res, overflow);
       case M_FU: