2004-04-09 Chris Demetriou <cgd@broadcom.com>

        * mips.igen (check_fmt): Remove.
        (ABS.fmt, ADD.fmt, C.cond.fmta, C.cond.fmtb, CEIL.L.fmt, CEIL.W)
        (CVT.D.fmt, CVT.L.fmt, CVT.S.fmt, CVT.W.fmt, DIV.fmt, FLOOR.L.fmt)
        (FLOOR.W.fmt, MADD.fmt, MOV.fmt, MOVtf.fmt, MOVN.fmt, MOVZ.fmt)
        (MSUB.fmt, MUL.fmt, NEG.fmt, NMADD.fmt, NMSUB.fmt, RECIP.fmt)
        (ROUND.L.fmt, ROUND.W.fmt, RSQRT.fmt, SQRT.fmt, SUB.fmt)
        (TRUNC.L.fmt, TRUNC.W): Explicitly specify allowed FPU formats.
        (check_fmt_p, CEIL.L.fmt, CEIL.W, DIV.fmt, FLOOR.L.fmt)
        (FLOOR.W.fmt, RECIP.fmt, ROUND.L.fmt, ROUND.W.fmt, RSQRT.fmt)
        (SQRT.fmt, TRUNC.L.fmt, TRUNC.W): Remove all uses of check_fmt.
        (C.cnd.fmta): Remove incorrect call to check_fmt_p.

diff --git a/sim/mips/ChangeLog b/sim/mips/ChangeLog
index a91b13725d8eeafdcd7105ff7fe2e94d3cda246a..0c4fd8a017ef8f57752d3e936d3d854d1eb65f91 100644 (file)
--- a/sim/mips/ChangeLog
+++ b/sim/mips/ChangeLog
@@ -1,3 +1,17 @@
+2004-04-09  Chris Demetriou  <cgd@broadcom.com>
+
+       * mips.igen (check_fmt): Remove.
+       (ABS.fmt, ADD.fmt, C.cond.fmta, C.cond.fmtb, CEIL.L.fmt, CEIL.W)
+       (CVT.D.fmt, CVT.L.fmt, CVT.S.fmt, CVT.W.fmt, DIV.fmt, FLOOR.L.fmt)
+       (FLOOR.W.fmt, MADD.fmt, MOV.fmt, MOVtf.fmt, MOVN.fmt, MOVZ.fmt)
+       (MSUB.fmt, MUL.fmt, NEG.fmt, NMADD.fmt, NMSUB.fmt, RECIP.fmt)
+       (ROUND.L.fmt, ROUND.W.fmt, RSQRT.fmt, SQRT.fmt, SUB.fmt)
+       (TRUNC.L.fmt, TRUNC.W): Explicitly specify allowed FPU formats.
+       (check_fmt_p, CEIL.L.fmt, CEIL.W, DIV.fmt, FLOOR.L.fmt)
+       (FLOOR.W.fmt, RECIP.fmt, ROUND.L.fmt, ROUND.W.fmt, RSQRT.fmt)
+       (SQRT.fmt, TRUNC.L.fmt, TRUNC.W): Remove all uses of check_fmt.
+       (C.cnd.fmta): Remove incorrect call to check_fmt_p.
+
 2004-04-09  Chris Demetriou  <cgd@broadcom.com>
 
        * sb1.igen (check_sbx): New function.

diff --git a/sim/mips/mips.igen b/sim/mips/mips.igen
index 95ec575c26fcfec6135485b09ea5d0b1746d8a38..b6a40857f58b1fe15c4bac50d79e7c0caf15f3a3 100644 (file)
--- a/sim/mips/mips.igen
+++ b/sim/mips/mips.igen
@@ -3643,23 +3643,6 @@
 // ReservedInstruction exception if not.
 //
 
-// check_fmt checks that the format is single or double.
-:function:::void:check_fmt:int fmt, instruction_word insn
-*mipsI:
-*mipsII:
-*mipsIII:
-*mipsIV:
-*mipsV:
-*mips32:
-*mips64:
-*vr4100:
-*vr5000:
-*r3900:
-{
-  if ((fmt != fmt_single) && (fmt != fmt_double))
-    SignalException (ReservedInstruction, insn);
-}
-
 // check_fmt_p checks that the format is single, double, or paired single.
 :function:::void:check_fmt_p:int fmt, instruction_word insn
 *mipsI:
@@ -3673,7 +3656,8 @@
 {
   /* None of these ISAs support Paired Single, so just fall back to
      the single/double check.  */
-  check_fmt (SD_, fmt, insn);
+  if ((fmt != fmt_single) && (fmt != fmt_double))
+    SignalException (ReservedInstruction, insn);
 }
 
 :function:::void:check_fmt_p:int fmt, instruction_word insn
@@ -3780,7 +3764,7 @@
 }
 
 
-010001,10,3.FMT,00000,5.FS,5.FD,000101:COP1:32,f::ABS.fmt
+010001,10,3.FMT!2!3!4!5!7,00000,5.FS,5.FD,000101:COP1:32,f::ABS.fmt
 "abs.%s<FMT> f<FD>, f<FS>"
 *mipsI:
 *mipsII:
@@ -3801,7 +3785,7 @@
 
 
 
-010001,10,3.FMT,5.FT,5.FS,5.FD,000000:COP1:32,f::ADD.fmt
+010001,10,3.FMT!2!3!4!5!7,5.FT,5.FS,5.FD,000000:COP1:32,f::ADD.fmt
 "add.%s<FMT> f<FD>, f<FS>, f<FT>"
 *mipsI:
 *mipsII:
@@ -3902,7 +3886,7 @@
 }
 
 
-010001,10,3.FMT,5.FT,5.FS,3.0,00,11,4.COND:COP1:32,f::C.cond.fmta
+010001,10,3.FMT!2!3!4!5!6!7,5.FT,5.FS,3.0,00,11,4.COND:COP1:32,f::C.cond.fmta
 "c.%s<COND>.%s<FMT> f<FS>, f<FT>"
 *mipsI:
 *mipsII:
@@ -3910,12 +3894,11 @@
 {
   int fmt = FMT;
   check_fpu (SD_);
-  check_fmt_p (SD_, fmt, instruction_0);
   Compare (ValueFPR (FS, fmt), ValueFPR (FT, fmt), fmt, COND, 0);
   TRACE_ALU_RESULT (ValueFCR (31));
 }
 
-010001,10,3.FMT,5.FT,5.FS,3.CC,00,11,4.COND:COP1:32,f::C.cond.fmtb
+010001,10,3.FMT!2!3!4!5!7,5.FT,5.FS,3.CC,00,11,4.COND:COP1:32,f::C.cond.fmtb
 "c.%s<COND>.%s<FMT> f<FS>, f<FT>":CC == 0
 "c.%s<COND>.%s<FMT> <CC>, f<FS>, f<FT>"
 *mipsIV:
@@ -3934,7 +3917,7 @@
 }
 
 
-010001,10,3.FMT,00000,5.FS,5.FD,001010:COP1:64,f::CEIL.L.fmt
+010001,10,3.FMT!2!3!4!5!6!7,00000,5.FS,5.FD,001010:COP1:64,f::CEIL.L.fmt
 "ceil.l.%s<FMT> f<FD>, f<FS>"
 *mipsIII:
 *mipsIV:
@@ -3946,13 +3929,12 @@
 {
   int fmt = FMT;
   check_fpu (SD_);
-  check_fmt (SD_, fmt, instruction_0);
   StoreFPR (FD, fmt_long, Convert (FP_RM_TOPINF, ValueFPR (FS, fmt), fmt,
            fmt_long));
 }
 
 
-010001,10,3.FMT,00000,5.FS,5.FD,001110:COP1:32,f::CEIL.W
+010001,10,3.FMT!2!3!4!5!6!7,00000,5.FS,5.FD,001110:COP1:32,f::CEIL.W
 "ceil.w.%s<FMT> f<FD>, f<FS>"
 *mipsII:
 *mipsIII:
@@ -3966,7 +3948,6 @@
 {
   int fmt = FMT;
   check_fpu (SD_);
-  check_fmt (SD_, fmt, instruction_0);
   StoreFPR (FD, fmt_word, Convert (FP_RM_TOPINF, ValueFPR (FS, fmt), fmt,
            fmt_word));
 }
@@ -4064,7 +4045,7 @@
 //
 // FIXME: Does not correctly differentiate between mips*
 //
-010001,10,3.FMT,00000,5.FS,5.FD,100001:COP1:32,f::CVT.D.fmt
+010001,10,3.FMT!1!2!3!6!7,00000,5.FS,5.FD,100001:COP1:32,f::CVT.D.fmt
 "cvt.d.%s<FMT> f<FD>, f<FS>"
 *mipsI:
 *mipsII:
@@ -4086,7 +4067,7 @@
 }
 
 
-010001,10,3.FMT,00000,5.FS,5.FD,100101:COP1:64,f::CVT.L.fmt
+010001,10,3.FMT!2!3!4!5!6!7,00000,5.FS,5.FD,100101:COP1:64,f::CVT.L.fmt
 "cvt.l.%s<FMT> f<FD>, f<FS>"
 *mipsIII:
 *mipsIV:
@@ -4120,7 +4101,7 @@
 //
 // FIXME: Does not correctly differentiate between mips*
 //
-010001,10,3.FMT!6,00000,5.FS,5.FD,100000:COP1:32,f::CVT.S.fmt
+010001,10,3.FMT!0!2!3!6!7,00000,5.FS,5.FD,100000:COP1:32,f::CVT.S.fmt
 "cvt.s.%s<FMT> f<FD>, f<FS>"
 *mipsI:
 *mipsII:
@@ -4164,7 +4145,7 @@
 }
 
 
-010001,10,3.FMT!6,00000,5.FS,5.FD,100100:COP1:32,f::CVT.W.fmt
+010001,10,3.FMT!2!3!4!5!6!7,00000,5.FS,5.FD,100100:COP1:32,f::CVT.W.fmt
 "cvt.w.%s<FMT> f<FD>, f<FS>"
 *mipsI:
 *mipsII:
@@ -4186,7 +4167,7 @@
 }
 
 
-010001,10,3.FMT,5.FT,5.FS,5.FD,000011:COP1:32,f::DIV.fmt
+010001,10,3.FMT!2!3!4!5!6!7,5.FT,5.FS,5.FD,000011:COP1:32,f::DIV.fmt
 "div.%s<FMT> f<FD>, f<FS>, f<FT>"
 *mipsI:
 *mipsII:
@@ -4201,7 +4182,6 @@
 {
   int fmt = FMT;
   check_fpu (SD_);
-  check_fmt (SD_, fmt, instruction_0);
   StoreFPR (FD, fmt, Divide (ValueFPR (FS, fmt), ValueFPR (FT, fmt), fmt));
 }
 
@@ -4283,7 +4263,7 @@
 }
 
 
-010001,10,3.FMT,00000,5.FS,5.FD,001011:COP1:64,f::FLOOR.L.fmt
+010001,10,3.FMT!2!3!4!5!6!7,00000,5.FS,5.FD,001011:COP1:64,f::FLOOR.L.fmt
 "floor.l.%s<FMT> f<FD>, f<FS>"
 *mipsIII:
 *mipsIV:
@@ -4295,13 +4275,12 @@
 {
   int fmt = FMT;
   check_fpu (SD_);
-  check_fmt (SD_, fmt, instruction_0);
   StoreFPR (FD, fmt_long, Convert (FP_RM_TOMINF, ValueFPR (FS, fmt), fmt,
            fmt_long));
 }
 
 
-010001,10,3.FMT,00000,5.FS,5.FD,001111:COP1:32,f::FLOOR.W.fmt
+010001,10,3.FMT!2!3!4!5!6!7,00000,5.FS,5.FD,001111:COP1:32,f::FLOOR.W.fmt
 "floor.w.%s<FMT> f<FD>, f<FS>"
 *mipsII:
 *mipsIII:
@@ -4315,7 +4294,6 @@
 {
   int fmt = FMT;
   check_fpu (SD_);
-  check_fmt (SD_, fmt, instruction_0);
   StoreFPR (FD, fmt_word, Convert (FP_RM_TOMINF, ValueFPR (FS, fmt), fmt,
            fmt_word));
 }
@@ -4408,7 +4386,7 @@
 
 
 
-010011,5.FR,5.FT,5.FS,5.FD,100,3.FMT:COP1X:64,f::MADD.fmt
+010011,5.FR,5.FT,5.FS,5.FD,100,3.FMT!2!3!4!5!7:COP1X:64,f::MADD.fmt
 "madd.%s<FMT> f<FD>, f<FR>, f<FS>, f<FT>"
 *mipsIV:
 *mipsV:
@@ -4453,7 +4431,7 @@
 }
 
 
-010001,10,3.FMT,00000,5.FS,5.FD,000110:COP1:32,f::MOV.fmt
+010001,10,3.FMT!2!3!4!5!7,00000,5.FS,5.FD,000110:COP1:32,f::MOV.fmt
 "mov.%s<FMT> f<FD>, f<FS>"
 *mipsI:
 *mipsII:
@@ -4491,7 +4469,7 @@
 
 // MOVF.fmt
 // MOVT.fmt
-010001,10,3.FMT,3.CC,0,1.TF,5.FS,5.FD,010001:COP1:32,f::MOVtf.fmt
+010001,10,3.FMT!2!3!4!5!7,3.CC,0,1.TF,5.FS,5.FD,010001:COP1:32,f::MOVtf.fmt
 "mov%s<TF>.%s<FMT> f<FD>, f<FS>, <CC>"
 *mipsIV:
 *mipsV:
@@ -4520,7 +4498,7 @@
 }
 
 
-010001,10,3.FMT,5.RT,5.FS,5.FD,010011:COP1:32,f::MOVN.fmt
+010001,10,3.FMT!2!3!4!5!7,5.RT,5.FS,5.FD,010011:COP1:32,f::MOVN.fmt
 "movn.%s<FMT> f<FD>, f<FS>, r<RT>"
 *mipsIV:
 *mipsV:
@@ -4543,7 +4521,7 @@
 
 
 
-010001,10,3.FMT,5.RT,5.FS,5.FD,010010:COP1:32,f::MOVZ.fmt
+010001,10,3.FMT!2!3!4!5!7,5.RT,5.FS,5.FD,010010:COP1:32,f::MOVZ.fmt
 "movz.%s<FMT> f<FD>, f<FS>, r<RT>"
 *mipsIV:
 *mipsV:
@@ -4559,7 +4537,7 @@
 }
 
 
-010011,5.FR,5.FT,5.FS,5.FD,101,3.FMT:COP1X:64,f::MSUB.fmt
+010011,5.FR,5.FT,5.FS,5.FD,101,3.FMT!2!3!4!5!7:COP1X:64,f::MSUB.fmt
 "msub.%s<FMT> f<FD>, f<FR>, f<FS>, f<FT>"
 *mipsIV:
 *mipsV:
@@ -4604,7 +4582,7 @@
 }
 
 
-010001,10,3.FMT,5.FT,5.FS,5.FD,000010:COP1:32,f::MUL.fmt
+010001,10,3.FMT!2!3!4!5!7,5.FT,5.FS,5.FD,000010:COP1:32,f::MUL.fmt
 "mul.%s<FMT> f<FD>, f<FS>, f<FT>"
 *mipsI:
 *mipsII:
@@ -4624,7 +4602,7 @@
 }
 
 
-010001,10,3.FMT,00000,5.FS,5.FD,000111:COP1:32,f::NEG.fmt
+010001,10,3.FMT!2!3!4!5!7,00000,5.FS,5.FD,000111:COP1:32,f::NEG.fmt
 "neg.%s<FMT> f<FD>, f<FS>"
 *mipsI:
 *mipsII:
@@ -4644,7 +4622,7 @@
 }
 
 
-010011,5.FR,5.FT,5.FS,5.FD,110,3.FMT:COP1X:64,f::NMADD.fmt
+010011,5.FR,5.FT,5.FS,5.FD,110,3.FMT!2!3!4!5!7:COP1X:64,f::NMADD.fmt
 "nmadd.%s<FMT> f<FD>, f<FR>, f<FS>, f<FT>"
 *mipsIV:
 *mipsV:
@@ -4660,7 +4638,7 @@
 }
 
 
-010011,5.FR,5.FT,5.FS,5.FD,111,3.FMT:COP1X:64,f::NMSUB.fmt
+010011,5.FR,5.FT,5.FS,5.FD,111,3.FMT!2!3!4!5!7:COP1X:64,f::NMSUB.fmt
 "nmsub.%s<FMT> f<FD>, f<FR>, f<FS>, f<FT>"
 *mipsIV:
 *mipsV:
@@ -4743,7 +4721,7 @@
 }
 
 
-010001,10,3.FMT,00000,5.FS,5.FD,010101:COP1:32,f::RECIP.fmt
+010001,10,3.FMT!2!3!4!5!6!7,00000,5.FS,5.FD,010101:COP1:32,f::RECIP.fmt
 "recip.%s<FMT> f<FD>, f<FS>"
 *mipsIV:
 *mipsV:
@@ -4752,12 +4730,11 @@
 {
   int fmt = FMT;
   check_fpu (SD_);
-  check_fmt (SD_, fmt, instruction_0);
   StoreFPR (FD, fmt, Recip (ValueFPR (FS, fmt), fmt));
 }
 
 
-010001,10,3.FMT,00000,5.FS,5.FD,001000:COP1:64,f::ROUND.L.fmt
+010001,10,3.FMT!2!3!4!5!6!7,00000,5.FS,5.FD,001000:COP1:64,f::ROUND.L.fmt
 "round.l.%s<FMT> f<FD>, f<FS>"
 *mipsIII:
 *mipsIV:
@@ -4769,13 +4746,12 @@
 {
   int fmt = FMT;
   check_fpu (SD_);
-  check_fmt (SD_, fmt, instruction_0);
   StoreFPR (FD, fmt_long, Convert (FP_RM_NEAREST, ValueFPR (FS, fmt), fmt,
            fmt_long));
 }
 
 
-010001,10,3.FMT,00000,5.FS,5.FD,001100:COP1:32,f::ROUND.W.fmt
+010001,10,3.FMT!2!3!4!5!6!7,00000,5.FS,5.FD,001100:COP1:32,f::ROUND.W.fmt
 "round.w.%s<FMT> f<FD>, f<FS>"
 *mipsII:
 *mipsIII:
@@ -4789,13 +4765,12 @@
 {
   int fmt = FMT;
   check_fpu (SD_);
-  check_fmt (SD_, fmt, instruction_0);
   StoreFPR (FD, fmt_word, Convert (FP_RM_NEAREST, ValueFPR (FS, fmt), fmt,
            fmt_word));
 }
 
 
-010001,10,3.FMT,00000,5.FS,5.FD,010110:COP1:32,f::RSQRT.fmt
+010001,10,3.FMT!2!3!4!5!6!7,00000,5.FS,5.FD,010110:COP1:32,f::RSQRT.fmt
 "rsqrt.%s<FMT> f<FD>, f<FS>"
 *mipsIV:
 *mipsV:
@@ -4804,7 +4779,6 @@
 {
   int fmt = FMT;
   check_fpu (SD_);
-  check_fmt (SD_, fmt, instruction_0);
   StoreFPR (FD, fmt, RSquareRoot (ValueFPR (FS, fmt), fmt));
 }
 
@@ -4865,7 +4839,7 @@
 }
 
 
-010001,10,3.FMT,00000,5.FS,5.FD,000100:COP1:32,f::SQRT.fmt
+010001,10,3.FMT!2!3!4!5!6!7,00000,5.FS,5.FD,000100:COP1:32,f::SQRT.fmt
 "sqrt.%s<FMT> f<FD>, f<FS>"
 *mipsII:
 *mipsIII:
@@ -4879,12 +4853,11 @@
 {
   int fmt = FMT;
   check_fpu (SD_);
-  check_fmt (SD_, fmt, instruction_0);
   StoreFPR (FD, fmt,  (SquareRoot (ValueFPR (FS, fmt), fmt)));
 }
 
 
-010001,10,3.FMT,5.FT,5.FS,5.FD,000001:COP1:32,f::SUB.fmt
+010001,10,3.FMT!2!3!4!5!7,5.FT,5.FS,5.FD,000001:COP1:32,f::SUB.fmt
 "sub.%s<FMT> f<FD>, f<FS>, f<FT>"
 *mipsI:
 *mipsII:
@@ -4989,7 +4962,7 @@
 }
 
 
-010001,10,3.FMT,00000,5.FS,5.FD,001001:COP1:64,f::TRUNC.L.fmt
+010001,10,3.FMT!2!3!4!5!6!7,00000,5.FS,5.FD,001001:COP1:64,f::TRUNC.L.fmt
 "trunc.l.%s<FMT> f<FD>, f<FS>"
 *mipsIII:
 *mipsIV:
@@ -5001,13 +4974,12 @@
 {
   int fmt = FMT;
   check_fpu (SD_);
-  check_fmt (SD_, fmt, instruction_0);
   StoreFPR (FD, fmt_long, Convert (FP_RM_TOZERO, ValueFPR (FS, fmt), fmt,
            fmt_long));
 }
 
 
-010001,10,3.FMT,00000,5.FS,5.FD,001101:COP1:32,f::TRUNC.W
+010001,10,3.FMT!2!3!4!5!6!7,00000,5.FS,5.FD,001101:COP1:32,f::TRUNC.W
 "trunc.w.%s<FMT> f<FD>, f<FS>"
 *mipsII:
 *mipsIII:
@@ -5021,7 +4993,6 @@
 {
   int fmt = FMT;
   check_fpu (SD_);
-  check_fmt (SD_, fmt, instruction_0);
   StoreFPR (FD, fmt_word, Convert (FP_RM_TOZERO, ValueFPR (FS, fmt), fmt,
            fmt_word));
 }