drm/nouveau/bar: switch to gpuobj accessor macros

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/bar/gf100.c b/drivers/gpu/drm/nouveau/nvkm/subdev/bar/gf100.c
index 09e36b64d889d91202a3d474e5ca6456cfbef520..b997d8d128c539dfc99392b63cc4d021ad928ffb 100644 (file)
--- a/drivers/gpu/drm/nouveau/nvkm/subdev/bar/gf100.c
+++ b/drivers/gpu/drm/nouveau/nvkm/subdev/bar/gf100.c
@@ -122,10 +122,12 @@ gf100_bar_ctor_vm(struct gf100_bar *bar, struct gf100_bar_vm *bar_vm,
        if (ret)
                return ret;
 
-       nv_wo32(bar_vm->mem, 0x0200, lower_32_bits(bar_vm->pgd->addr));
-       nv_wo32(bar_vm->mem, 0x0204, upper_32_bits(bar_vm->pgd->addr));
-       nv_wo32(bar_vm->mem, 0x0208, lower_32_bits(bar_len - 1));
-       nv_wo32(bar_vm->mem, 0x020c, upper_32_bits(bar_len - 1));
+       nvkm_kmap(bar_vm->mem);
+       nvkm_wo32(bar_vm->mem, 0x0200, lower_32_bits(bar_vm->pgd->addr));
+       nvkm_wo32(bar_vm->mem, 0x0204, upper_32_bits(bar_vm->pgd->addr));
+       nvkm_wo32(bar_vm->mem, 0x0208, lower_32_bits(bar_len - 1));
+       nvkm_wo32(bar_vm->mem, 0x020c, upper_32_bits(bar_len - 1));
+       nvkm_done(bar_vm->mem);
        return 0;
 }
 

diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/bar/nv50.c b/drivers/gpu/drm/nouveau/nvkm/subdev/bar/nv50.c
index a47d64d3b0fd3a3516d2710c855651e02cbf18bc..6909e52a6d8d73a620d1c69defa3e5f798c3b694 100644 (file)
--- a/drivers/gpu/drm/nouveau/nvkm/subdev/bar/nv50.c
+++ b/drivers/gpu/drm/nouveau/nvkm/subdev/bar/nv50.c
@@ -166,13 +166,15 @@ nv50_bar_ctor(struct nvkm_object *parent, struct nvkm_object *engine,
        if (ret)
                return ret;
 
-       nv_wo32(bar->bar3, 0x00, 0x7fc00000);
-       nv_wo32(bar->bar3, 0x04, lower_32_bits(limit));
-       nv_wo32(bar->bar3, 0x08, lower_32_bits(start));
-       nv_wo32(bar->bar3, 0x0c, upper_32_bits(limit) << 24 |
-                                 upper_32_bits(start));
-       nv_wo32(bar->bar3, 0x10, 0x00000000);
-       nv_wo32(bar->bar3, 0x14, 0x00000000);
+       nvkm_kmap(bar->bar3);
+       nvkm_wo32(bar->bar3, 0x00, 0x7fc00000);
+       nvkm_wo32(bar->bar3, 0x04, lower_32_bits(limit));
+       nvkm_wo32(bar->bar3, 0x08, lower_32_bits(start));
+       nvkm_wo32(bar->bar3, 0x0c, upper_32_bits(limit) << 24 |
+                                  upper_32_bits(start));
+       nvkm_wo32(bar->bar3, 0x10, 0x00000000);
+       nvkm_wo32(bar->bar3, 0x14, 0x00000000);
+       nvkm_done(bar->bar3);
 
        /* BAR1 */
        start = 0x0000000000ULL;
@@ -193,13 +195,15 @@ nv50_bar_ctor(struct nvkm_object *parent, struct nvkm_object *engine,
        if (ret)
                return ret;
 
-       nv_wo32(bar->bar1, 0x00, 0x7fc00000);
-       nv_wo32(bar->bar1, 0x04, lower_32_bits(limit));
-       nv_wo32(bar->bar1, 0x08, lower_32_bits(start));
-       nv_wo32(bar->bar1, 0x0c, upper_32_bits(limit) << 24 |
-                                 upper_32_bits(start));
-       nv_wo32(bar->bar1, 0x10, 0x00000000);
-       nv_wo32(bar->bar1, 0x14, 0x00000000);
+       nvkm_kmap(bar->bar1);
+       nvkm_wo32(bar->bar1, 0x00, 0x7fc00000);
+       nvkm_wo32(bar->bar1, 0x04, lower_32_bits(limit));
+       nvkm_wo32(bar->bar1, 0x08, lower_32_bits(start));
+       nvkm_wo32(bar->bar1, 0x0c, upper_32_bits(limit) << 24 |
+                                  upper_32_bits(start));
+       nvkm_wo32(bar->bar1, 0x10, 0x00000000);
+       nvkm_wo32(bar->bar1, 0x14, 0x00000000);
+       nvkm_done(bar->bar1);
 
        bar->base.alloc = nvkm_bar_alloc;
        bar->base.kmap = nv50_bar_kmap;