gas:
authorJoseph Myers <joseph@codesourcery.com>
Thu, 3 Aug 2006 15:57:04 +0000 (15:57 +0000)
committerJoseph Myers <joseph@codesourcery.com>
Thu, 3 Aug 2006 15:57:04 +0000 (15:57 +0000)
* config/tc-arm.c (enum operand_parse_code): Add OP_RIWC_RIWG.
(parse_operands): Handle it.
(insns): Use it for tmcr and tmrc.

gas/testsuite:
* gas/arm/iwmmxt.s: Test tmcr and tmrc with wcgr registers.
* gas/arm/iwmmxt.d: Update.

gas/ChangeLog
gas/config/tc-arm.c
gas/testsuite/ChangeLog
gas/testsuite/gas/arm/iwmmxt.d
gas/testsuite/gas/arm/iwmmxt.s

index 593d5f826944ec2f513ad459a1ea3e01825de396..278a5917300e69868d518701f864ed671b9ff9cc 100644 (file)
@@ -1,3 +1,9 @@
+2006-08-03  Joseph Myers  <joseph@codesourcery.com>
+
+       * config/tc-arm.c (enum operand_parse_code): Add OP_RIWC_RIWG.
+       (parse_operands): Handle it.
+       (insns): Use it for tmcr and tmrc.
+
 2006-08-02  Petr Salinger  <Petr.Salinger@seznam.cz>
 
        PR binutils/2983
index 87240977e89eb1779cb8fd3deb683d37761b2a9e..408d95fc04213009c5a78db1925ec73357b5ae34 100644 (file)
@@ -5370,6 +5370,7 @@ enum operand_parse_code
   OP_RR_EXi,   /* ARM register or expression with imm prefix */
   OP_RF_IF,    /* FPA register or immediate */
   OP_RIWR_RIWC, /* iWMMXt R or C reg */
+  OP_RIWC_RIWG, /* iWMMXt wC or wCG reg */
 
   /* Optional operands.         */
   OP_oI7b,      /* immediate, prefix optional, 0 .. 7 */
@@ -5760,6 +5761,21 @@ parse_operands (char *str, const unsigned char *pattern)
          }
          break;
 
+       case OP_RIWC_RIWG:
+         {
+           struct reg_entry *rege = arm_reg_parse_multi (&str);
+           if (!rege
+               || (rege->type != REG_TYPE_MMXWC
+                   && rege->type != REG_TYPE_MMXWCG))
+             {
+               inst.error = _("iWMMXt control register expected");
+               goto failure;
+             }
+           inst.operands[i].reg = rege->number;
+           inst.operands[i].isreg = 1;
+         }
+         break;
+
          /* Misc */
        case OP_CPSF:    val = parse_cps_flags (&str);          break;
        case OP_ENDI:    val = parse_endian_specifier (&str);   break;
@@ -15712,7 +15728,7 @@ static const struct asm_opcode insns[] =
  cCE(tinsrb,   e600010, 3, (RIWR, RR, I7),         iwmmxt_tinsr),
  cCE(tinsrh,   e600050, 3, (RIWR, RR, I7),         iwmmxt_tinsr),
  cCE(tinsrw,   e600090, 3, (RIWR, RR, I7),         iwmmxt_tinsr),
- cCE(tmcr,     e000110, 2, (RIWC, RR),             rn_rd),
+ cCE(tmcr,     e000110, 2, (RIWC_RIWG, RR),        rn_rd),
  cCE(tmcrr,    c400000, 3, (RIWR, RR, RR),         rm_rd_rn),
  cCE(tmia,     e200010, 3, (RIWR, RR, RR),         iwmmxt_tmia),
  cCE(tmiaph,   e280010, 3, (RIWR, RR, RR),         iwmmxt_tmia),
@@ -15723,7 +15739,7 @@ static const struct asm_opcode insns[] =
  cCE(tmovmskb, e100030, 2, (RR, RIWR),             rd_rn),
  cCE(tmovmskh, e500030, 2, (RR, RIWR),             rd_rn),
  cCE(tmovmskw, e900030, 2, (RR, RIWR),             rd_rn),
- cCE(tmrc,     e100110, 2, (RR, RIWC),             rd_rn),
+ cCE(tmrc,     e100110, 2, (RR, RIWC_RIWG),        rd_rn),
  cCE(tmrrc,    c500000, 3, (RR, RR, RIWR),         rd_rn_rm),
  cCE(torcb,    e13f150, 1, (RR),                   iwmmxt_tandorc),
  cCE(torch,    e53f150, 1, (RR),                   iwmmxt_tandorc),
index 466ca6d39fb3f266dfb89d04e78b0f8a38c03e21..8acc4ff4bc2b095b019f47641785dcd0b51911f2 100644 (file)
@@ -1,3 +1,8 @@
+2006-08-03  Joseph Myers  <joseph@codesourcery.com>
+
+       * gas/arm/iwmmxt.s: Test tmcr and tmrc with wcgr registers.
+       * gas/arm/iwmmxt.d: Update.
+
 2006-08-01  H.J. Lu  <hongjiu.lu@intel.com>
 
        * gas/i386/nops-2-i386.d: Updated.
index 494199d2bc458b36e5c18c10248b5cb4183e7538..85f4ac2e84e4fa0bd129289b3264e9eb99f74c36 100644 (file)
@@ -166,6 +166,6 @@ Disassembly of section .text:
 0+278 <[^>]*> 0e9540ea[        ]+wunpckilweq[  ]+wr4, wr5, wr10
 0+27c <[^>]*> 1e143005[        ]+wxorne[       ]+wr3, wr4, wr5
 0+280 <[^>]*> ae377007[        ]+wandnge[      ]+wr7, wr7, wr7
-0+284 <[^>]*> e1a00000[        ]+nop[  ]+\(mov r0,r0\)
-0+288 <[^>]*> e1a00000[        ]+nop[  ]+\(mov r0,r0\)
+0+284 <[^>]*> ee080110[        ]+tmcr[         ]+wcgr0, r0
+0+288 <[^>]*> ee1a1110[        ]+tmrc[         ]+r1, wcgr2
 0+28c <[^>]*> e1a00000[        ]+nop[  ]+\(mov r0,r0\)
index 0ebbad5cd3c7d8b3db47a15db748bf3a4272519e..42bbb7ab4ceb311227e600e6c3cd4f5998b67d55 100644 (file)
@@ -203,7 +203,8 @@ iwmmxt:
 
        wzeroge         wr7
 
+       tmcr            wcgr0, r0
+       tmrc            r1, wcgr2
+
        @ a.out-required section size padding
        nop
-       nop
-       nop
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