drm/radeon/dpm: add a helper to encode pcie lane setting
authorAlex Deucher <alexander.deucher@amd.com>
Wed, 15 May 2013 21:25:03 +0000 (17:25 -0400)
committerAlex Deucher <alexander.deucher@amd.com>
Fri, 30 Aug 2013 20:30:26 +0000 (16:30 -0400)
convert from number of lanes to register setting.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/radeon/r600_dpm.c
drivers/gpu/drm/radeon/r600_dpm.h

index 34ea5d6ee4be779ced8b7c4893e608f4e5c92e0d..89c46c55f93d5d08d8a3f56e24d60be03b9e6f2a 100644 (file)
@@ -1246,3 +1246,13 @@ u16 r600_get_pcie_lane_support(struct radeon_device *rdev,
                return 16;
        }
 }
+
+u8 r600_encode_pci_lane_width(u32 lanes)
+{
+       u8 encoded_lanes[] = { 0, 1, 2, 0, 3, 0, 0, 0, 4, 0, 0, 0, 5, 0, 0, 0, 6 };
+
+       if (lanes > 16)
+               return 0;
+
+       return encoded_lanes[lanes];
+}
index 71d5d93c371ba25721f43571de014572519a9ef9..8dc1fbd9dbf143f5bba92376327a223b1ed56ecf 100644 (file)
@@ -227,5 +227,6 @@ enum radeon_pcie_gen r600_get_pcie_gen_support(struct radeon_device *rdev,
 u16 r600_get_pcie_lane_support(struct radeon_device *rdev,
                               u16 asic_lanes,
                               u16 default_lanes);
+u8 r600_encode_pci_lane_width(u32 lanes);
 
 #endif
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