return IRQ_NONE;
}
-static struct irqaction at91sam926x_pit_irq = {
- .name = "at91_tick",
- .flags = IRQF_SHARED | IRQF_TIMER | IRQF_IRQPOLL,
- .handler = at91sam926x_pit_interrupt,
-};
-
/*
* Set up both clocksource and clockevent support.
*/
-static void __init at91sam926x_pit_common_init(void)
+static void __init at91sam926x_pit_common_init(unsigned int pit_irq)
{
unsigned long pit_rate;
unsigned bits;
clocksource_register_hz(&pit_clk, pit_rate);
/* Set up irq handler */
- ret = setup_irq(at91sam926x_pit_irq.irq, &at91sam926x_pit_irq);
+ ret = request_irq(pit_irq, at91sam926x_pit_interrupt,
+ IRQF_SHARED | IRQF_TIMER | IRQF_IRQPOLL,
+ "at91_tick", pit_base_addr);
if (ret)
panic(pr_fmt("Unable to setup IRQ\n"));
if (!irq)
panic(pr_fmt("Unable to get IRQ from DT\n"));
- at91sam926x_pit_irq.irq = irq;
-
- at91sam926x_pit_common_init();
+ at91sam926x_pit_common_init(irq);
}
CLOCKSOURCE_OF_DECLARE(at91sam926x_pit, "atmel,at91sam9260-pit",
at91sam926x_pit_dt_init);
if (IS_ERR(mck))
panic(pr_fmt("Unable to get mck clk\n"));
- at91sam926x_pit_irq.irq = NR_IRQS_LEGACY + AT91_ID_SYS;
-
- at91sam926x_pit_common_init();
+ at91sam926x_pit_common_init(NR_IRQS_LEGACY + AT91_ID_SYS);
}
void __init at91sam926x_ioremap_pit(u32 addr)