Added new field to v850_opcode structure.

diff --git a/include/opcode/ChangeLog b/include/opcode/ChangeLog
index a6cc43e1215fb62b55e58c0e3600aa40f25a4863..e1363fa0d0989edba5e08ed30fda83ecef6c884c 100644 (file)
--- a/include/opcode/ChangeLog
+++ b/include/opcode/ChangeLog
@@ -1,3 +1,14 @@
+Mon Sep 15 18:28:37 1997  Nick Clifton  <nickc@cygnus.com>
+
+       * v850.h (struct v850_opcode): Add processors field.
+       (PROCESSOR_V850, PROCESSOR_ALL): New bit constants.
+start-sanitize-v850e
+       (PROCESSOR_V850E, PROCESSOR_NOT_V850): New bit constants.
+end-sanitize-v850e
+start-sanitize-v850eq
+       (PROCESSOR_V850EQ): New bit constants.
+end-sanitize-v850eq
+
 start-sanitize-d30v
 Mon Sep 15 11:29:43 1997  Ken Raeburn  <raeburn@cygnus.com>
 

diff --git a/include/opcode/v850.h b/include/opcode/v850.h
index a9b8590319f9717427f72b26d38451714376a19f..c2205e000cbbad5684b04bb2522ed726ae1ab3ff 100644 (file)
--- a/include/opcode/v850.h
+++ b/include/opcode/v850.h
@@ -45,8 +45,25 @@ struct v850_opcode
 
   /* Which (if any) operand is a memory operand.  */
   unsigned int memop;
+
+  /* Target processor(s).  A bit field of processors which support
+     this instruction.  Note a bit field is used as some instructions
+     are available on multiple, different processor types, whereas
+     other instructions are only available on one specific type.  */
+  unsigned int processors;
 };
 
+/* Values for the processors field in the v850_opcode structure.  */
+#define PROCESSOR_V850         (1 << 0)                /* Just the V850.  */
+#define PROCESSOR_ALL          -1                      /* Any processor.  */
+/* start-sanitize-v850e */
+#define PROCESSOR_V850E                (1 << 1)                /* Just the V850E. */
+#define PROCESSOR_NOT_V850     (~ PROCESSOR_V850)      /* Any processor except the V850.  */
+/* end-sanitize-v850e */
+/* start-sanitize-v850eq */
+#define PROCESSOR_V850EQ       (1 << 2)                /* Just the V850EQ. */
+/* start-sanitize-v850eq */
+
 /* The table itself is sorted by major opcode number, and is otherwise
    in the order in which the disassembler should consider
    instructions.  */