net: fec: correct the MDIO clock source
authorNimrod Andy <B38611@freescale.com>
Tue, 20 May 2014 05:23:09 +0000 (13:23 +0800)
committerDavid S. Miller <davem@davemloft.net>
Thu, 22 May 2014 19:03:05 +0000 (15:03 -0400)
Since imx serials FEC/ENET MDIO clock source is internal ipg clock,
and "ahb" clock is defined as FEC/ENET bus clock, so the patch just
correct the fec driver MDIO clock source.

Signed-off-by: Fugang Duan <B38611@freescale.com>
Acked-by: Frank Li <frank.li@freescale.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
drivers/net/ethernet/freescale/fec_main.c

index 99fb0dcc547b5cba9117ae4319b0f530c774f0e4..cb5c987bee3932d924210094a0c5d0518b153aaa 100644 (file)
@@ -1407,7 +1407,7 @@ static int fec_enet_mii_init(struct platform_device *pdev)
         * Reference Manual has an error on this, and gets fixed on i.MX6Q
         * document.
         */
-       fep->phy_speed = DIV_ROUND_UP(clk_get_rate(fep->clk_ahb), 5000000);
+       fep->phy_speed = DIV_ROUND_UP(clk_get_rate(fep->clk_ipg), 5000000);
        if (id_entry->driver_data & FEC_QUIRK_ENET_MAC)
                fep->phy_speed--;
        fep->phy_speed <<= 1;
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