+Tue Oct 28 12:29:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
+
+ * sim-core.c: Do not generate sim_core_*_word.
+
+ * sim-n-core.h (sim_core_trace_N): Add line_nr argument.
+ (sim_core_write_aligned_N, sim_core_read_aligned_N): Update.
+
+ * sim-core.h (sim_core_read_unaligned_word,
+ sim_core_read_aligned_word, sim_core_read_word,
+ sim_core_write_unaligned_word, sim_core_write_aligned_word,
+ sim_core_write_word): Change to macros that map onto sim_core_*_N.
+
Mon Oct 27 11:25:10 1997 Doug Evans <devans@canuck.cygnus.com>
* sim-n-endian.h: Add TAGS entrys for 16 byte versions.
#include "sim-n-core.h"
#undef N
-#define N word
-#include "sim-n-core.h"
-#undef N
-
#endif
DECLARE_SIM_CORE_WRITE_N(aligned,4)
DECLARE_SIM_CORE_WRITE_N(aligned,8)
DECLARE_SIM_CORE_WRITE_N(aligned,16)
-DECLARE_SIM_CORE_WRITE_N(aligned,word)
DECLARE_SIM_CORE_WRITE_N(unaligned,1)
DECLARE_SIM_CORE_WRITE_N(unaligned,2)
DECLARE_SIM_CORE_WRITE_N(unaligned,4)
DECLARE_SIM_CORE_WRITE_N(unaligned,8)
DECLARE_SIM_CORE_WRITE_N(unaligned,16)
-DECLARE_SIM_CORE_WRITE_N(unaligned,word)
+
#define sim_core_write_1 sim_core_write_aligned_1
#define sim_core_write_2 sim_core_write_aligned_2
#define sim_core_write_4 sim_core_write_aligned_4
#define sim_core_write_16 sim_core_write_aligned_16
+#define sim_core_write_unaligned_word XCONCAT2(sim_core_write_unaligned_,WITH_TARGET_WORD_BITSIZE)
+#define sim_core_write_aligned_word XCONCAT2(sim_core_write_aligned_,WITH_TARGET_WORD_BITSIZE)
+#define sim_core_write_word XCONCAT2(sim_core_write_,WITH_TARGET_WORD_BITSIZE)
+
#undef DECLARE_SIM_CORE_WRITE_N
DECLARE_SIM_CORE_READ_N(aligned,4)
DECLARE_SIM_CORE_READ_N(aligned,8)
DECLARE_SIM_CORE_READ_N(aligned,16)
-DECLARE_SIM_CORE_READ_N(aligned,word)
DECLARE_SIM_CORE_READ_N(unaligned,1)
DECLARE_SIM_CORE_READ_N(unaligned,2)
DECLARE_SIM_CORE_READ_N(unaligned,4)
DECLARE_SIM_CORE_READ_N(unaligned,8)
DECLARE_SIM_CORE_READ_N(unaligned,16)
-DECLARE_SIM_CORE_READ_N(unaligned,word)
#define sim_core_read_1 sim_core_read_aligned_1
#define sim_core_read_2 sim_core_read_aligned_2
#define sim_core_read_8 sim_core_read_aligned_8
#define sim_core_read_16 sim_core_read_aligned_16
+#define sim_core_read_unaligned_word XCONCAT2(sim_core_read_unaligned_,WITH_TARGET_WORD_BITSIZE)
+#define sim_core_read_aligned_word XCONCAT2(sim_core_read_aligned_,WITH_TARGET_WORD_BITSIZE)
+#define sim_core_read_word XCONCAT2(sim_core_read_,WITH_TARGET_WORD_BITSIZE)
+
#undef DECLARE_SIM_CORE_READ_N
#endif
STATIC_SIM_CORE(void)
sim_core_trace_N (sim_cpu *cpu,
sim_cia cia,
+ int line_nr,
char *transfer,
sim_core_maps map,
address_word addr,
#if (N == 16)
trace_printf (CPU_STATE (cpu), cpu,
"sim-n-core.h:%d: %s-%d %s:0x%08lx -> 0x%08lx%08lx%08lx%08lx\n",
- __LINE__,
+ line_nr,
transfer, sizeof (unsigned_N),
sim_core_map_to_str (map),
(unsigned long) addr,
#if (N == 8)
trace_printf (CPU_STATE (cpu), cpu,
"sim-n-core.h:%d: %s-%d %s:0x%08lx -> 0x%08lx%08lx\n",
- __LINE__,
+ line_nr,
transfer, sizeof (unsigned_N),
sim_core_map_to_str (map),
(unsigned long) addr,
#if (N == 4)
trace_printf (CPU_STATE (cpu), cpu,
"sim-n-core.h:%d: %s-%d %s:0x%08lx -> 0x%0*lx\n",
- __LINE__,
+ line_nr,
transfer, sizeof (unsigned_N),
sim_core_map_to_str (map),
(unsigned long) addr,
val = T2H_N (*(unsigned_N*) sim_core_translate (mapping, addr));
PROFILE_COUNT_CORE (cpu, addr, sizeof (unsigned_N), map);
if (TRACE_P (cpu, TRACE_CORE_IDX))
- sim_core_trace_N (cpu, __LINE__, "read", map, addr, val);
+ sim_core_trace_N (cpu, cia, __LINE__, "read", map, addr, val);
return val;
}
*(unsigned_N*) sim_core_translate (mapping, addr) = H2T_N (val);
PROFILE_COUNT_CORE (cpu, addr, sizeof (unsigned_N), map);
if (TRACE_P (cpu, TRACE_CORE_IDX))
- sim_core_trace_N (cpu, __LINE__, "write", map, addr, val);
+ sim_core_trace_N (cpu, cia, __LINE__, "write", map, addr, val);
}
/* TAGS: sim_core_write_unaligned_1 sim_core_write_unaligned_2 */