+2016-03-10 Mickael Guene <mickael.guene@st.com>
+
+ PR gas/19744
+ * config/tc-arm.c (do_arit): Protect against bad relocations usage.
+ (do_mov): Likewise.
+ (do_t_add_sub): Allow pcrop relocations for Thumb-2 targets.
+ (do_t_mov_cmp): Likewise.
+ (do_t_add_sub): Protect against bad relocations usage.
+ (do_t_mov_cmp): Likewise.
+
2016-03-09 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
* config/tc-arm.c (neon_alignment_bit): Rename do_align to
#define BAD_RANGE _("branch out of range")
#define BAD_FP16 _("selected processor does not support fp16 instruction")
#define UNPRED_REG(R) _("using " R " results in unpredictable behaviour")
+#define THUMB1_RELOC_ONLY _("relocation valid in thumb1 code only")
static struct hash_control * arm_ops_hsh;
static struct hash_control * arm_cond_hsh;
static void
do_arit (void)
{
+ constraint (inst.reloc.type >= BFD_RELOC_ARM_THUMB_ALU_ABS_G0_NC
+ && inst.reloc.type <= BFD_RELOC_ARM_THUMB_ALU_ABS_G3_NC ,
+ THUMB1_RELOC_ONLY);
if (!inst.operands[1].present)
inst.operands[1].reg = inst.operands[0].reg;
inst.instruction |= inst.operands[0].reg << 12;
static void
do_mov (void)
{
+ constraint (inst.reloc.type >= BFD_RELOC_ARM_THUMB_ALU_ABS_G0_NC
+ && inst.reloc.type <= BFD_RELOC_ARM_THUMB_ALU_ABS_G3_NC ,
+ THUMB1_RELOC_ONLY);
inst.instruction |= inst.operands[0].reg << 12;
encode_arm_shifter_operand (1);
}
inst.instruction |= (Rd << 4) | Rs;
if (inst.reloc.type < BFD_RELOC_ARM_THUMB_ALU_ABS_G0_NC
|| inst.reloc.type > BFD_RELOC_ARM_THUMB_ALU_ABS_G3_NC)
- inst.reloc.type = BFD_RELOC_ARM_THUMB_ADD;
- if (inst.size_req != 2)
- inst.relax = opcode;
+ {
+ if (inst.size_req == 2)
+ inst.reloc.type = BFD_RELOC_ARM_THUMB_ADD;
+ else
+ inst.relax = opcode;
+ }
}
else
constraint (inst.size_req == 2, BAD_HIREG);
if (inst.size_req == 4
|| (inst.size_req != 2 && !opcode))
{
+ constraint (inst.reloc.type >= BFD_RELOC_ARM_THUMB_ALU_ABS_G0_NC
+ && inst.reloc.type <= BFD_RELOC_ARM_THUMB_ALU_ABS_G3_NC ,
+ THUMB1_RELOC_ONLY);
if (Rd == REG_PC)
{
constraint (add, BAD_PC);
{
inst.instruction = THUMB_OP16 (opcode);
inst.instruction |= Rn << 8;
- if (inst.size_req == 2)
+ if (inst.reloc.type < BFD_RELOC_ARM_THUMB_ALU_ABS_G0_NC
+ || inst.reloc.type > BFD_RELOC_ARM_THUMB_ALU_ABS_G3_NC)
{
- if (inst.reloc.type < BFD_RELOC_ARM_THUMB_ALU_ABS_G0_NC
- || inst.reloc.type > BFD_RELOC_ARM_THUMB_ALU_ABS_G3_NC)
+ if (inst.size_req == 2)
inst.reloc.type = BFD_RELOC_ARM_THUMB_IMM;
+ else
+ inst.relax = opcode;
}
- else
- inst.relax = opcode;
}
else
{
+ constraint (inst.reloc.type >= BFD_RELOC_ARM_THUMB_ALU_ABS_G0_NC
+ && inst.reloc.type <= BFD_RELOC_ARM_THUMB_ALU_ABS_G3_NC ,
+ THUMB1_RELOC_ONLY);
+
inst.instruction = THUMB_OP32 (inst.instruction);
inst.instruction = (inst.instruction & 0xe1ffffff) | 0x10000000;
inst.instruction |= Rn << r0off;
+2016-03-10 Mickael Guene <mickael.guene@st.com>
+
+ PR gas/19744
+ * gas/arm/adds-thumb1-reloc-local-armv7-m.s: New.
+ * gas/arm/adds-thumb1-reloc-local-armv7-m.d: New.
+ * gas/arm/movs-thumb1-reloc-local-armv7-m.s: New.
+ * gas/arm/movs-thumb1-reloc-local-armv7-m.d: New.
+
2016-02-16 Claudiu Zissulescu <claziss@synopsys.com>
* gas/cfi/cfi-arc-1.d: New file.
--- /dev/null
+#objdump: -dr --prefix-addresses --show-raw-insn
+#skip: *-*-*coff *-*-pe *-*-wince *-*-*aout* *-*-netbsd *-*-riscix*
+#name: ADDS relocations against local symbols for armv7-m
+
+.*: +file format .*arm.*
+
+Disassembly of section .text:
+0[0-9a-f]+ <[^>]+> 3000 adds r0, #0
+ 0: R_ARM_THM_ALU_ABS_G3_NC bar
+0[0-9a-f]+ <[^>]+> 3000 adds r0, #0
+ 2: R_ARM_THM_ALU_ABS_G2_NC bar
+0[0-9a-f]+ <[^>]+> 3000 adds r0, #0
+ 4: R_ARM_THM_ALU_ABS_G1_NC bar
+0[0-9a-f]+ <[^>]+> 3000 adds r0, #0
+ 6: R_ARM_THM_ALU_ABS_G0_NC bar
+#...
--- /dev/null
+.arch armv7-m
+.text
+.syntax unified
+.thumb
+foo:
+adds r0, #:upper8_15:#bar
+adds r0, #:upper0_7:#bar
+adds r0, #:lower8_15:#bar
+adds r0, #:lower0_7:#bar
+
+.space 0x10000
+
+bar:
--- /dev/null
+#objdump: -dr --prefix-addresses --show-raw-insn
+#skip: *-*-*coff *-*-pe *-*-wince *-*-*aout* *-*-netbsd *-*-riscix*
+#name: MOVS relocations against local symbols for armv7-m
+
+.*: +file format .*arm.*
+
+Disassembly of section .text:
+0[0-9a-f]+ <[^>]+> 2000 movs r0, #0
+ 0: R_ARM_THM_ALU_ABS_G3_NC bar
+0[0-9a-f]+ <[^>]+> 2000 movs r0, #0
+ 2: R_ARM_THM_ALU_ABS_G2_NC bar
+0[0-9a-f]+ <[^>]+> 2000 movs r0, #0
+ 4: R_ARM_THM_ALU_ABS_G1_NC bar
+0[0-9a-f]+ <[^>]+> 2000 movs r0, #0
+ 6: R_ARM_THM_ALU_ABS_G0_NC bar
+#...
--- /dev/null
+.arch armv7-m
+.text
+.syntax unified
+.thumb
+foo:
+movs r0, #:upper8_15:#bar
+movs r0, #:upper0_7:#bar
+movs r0, #:lower8_15:#bar
+movs r0, #:lower0_7:#bar
+
+.space 0x10000
+
+bar:
+2016-03-10 Mickael Guene <mickael.guene@st.com>
+
+ PR gas/19744
+ * testsuite/ld-arm/arm-elf.exp: New tests.
+ * testsuite/ld-arm/thumb1-adds-armv7-m.s: New.
+ * testsuite/ld-arm/thumb1-movs-armv7-m.s: New.
+
2016-03-10 Nick Clifton <nickc@redhat.com>
* scripttempl/elf32msp430.sc (.rodata): Remove spurious LONG(0).
{"ADDS thumb1 relocations" "-static -T arm.ld" "" "" {thumb1-adds.s}
{{objdump -dw thumb1-adds.d}}
"thumb1-adds"}
+ {"MOVS thumb1 relocations for armv7-m target" "-static -T arm.ld" "" "" {thumb1-movs-armv7-m.s}
+ {{objdump -dw thumb1-movs.d}}
+ "thumb1-movs"}
+ {"ADDS thumb1 relocations for armv7-m target" "-static -T arm.ld" "" "" {thumb1-adds-armv7-m.s}
+ {{objdump -dw thumb1-adds.d}}
+ "thumb1-adds"}
}
run_ld_link_tests $armelftests_common_1
--- /dev/null
+ .text
+ .arch armv7-m
+ .syntax unified
+ .global _start
+ .thumb_func
+ .type _start, %function
+_start:
+ .thumb_func
+ .type thumb1, %function
+thumb1:
+ adds r0, #:upper8_15:#thumb3
+ adds r1, #:upper0_7:#thumb3
+ adds r2, #:lower8_15:#thumb1
+ adds r3, #:lower0_7:#thumb1
+ adds r4, #:lower0_7:#thumb3
+ adds r5, #:lower8_15:#thumb3
+ adds r6, #:upper0_7:#thumb1
+ adds r7, #:upper8_15:#thumb1
+ .thumb_func
+ .type thumb2, %function
+thumb2:
+ adds r0, #:upper8_15:#thumb3
+ adds r1, #:upper0_7:#(var2 + 1)
+ adds r2, #:lower8_15:#(thumb3 + 255)
+ adds r3, #:lower0_7:#(var1 + 0xaa)
+ adds r7, #:upper8_15:#var1 + 4
+ adds r6, #:upper0_7:#thumb3
+ adds r5, #:lower8_15:#var2 + 0xff
+ adds r4, #:lower0_7:#var2 - (-2)
+var1:
+ .byte 1
+var2:
+ .byte 2
+
+ .section .far, "ax", %progbits
+ .thumb_func
+ .type thumb3, %function
+thumb3:
+ adds r0, #:upper8_15:#thumb1
+ adds r1, #:upper0_7:#thumb2
+ adds r2, #:lower8_15:#thumb3
+ adds r3, #:lower0_7:#thumb1
+
--- /dev/null
+ .text
+ .arch armv7-m
+ .syntax unified
+ .global _start
+ .thumb_func
+ .type _start, %function
+_start:
+ .thumb_func
+ .type thumb1, %function
+thumb1:
+ movs r0, #:upper8_15:#thumb3
+ movs r1, #:upper0_7:#thumb3
+ movs r2, #:lower8_15:#thumb1
+ movs r3, #:lower0_7:#thumb1
+ movs r4, #:lower0_7:#thumb3
+ movs r5, #:lower8_15:#thumb3
+ movs r6, #:upper0_7:#thumb1
+ movs r7, #:upper8_15:#thumb1
+ .thumb_func
+ .type thumb2, %function
+thumb2:
+ movs r0, #:upper8_15:#(thumb3 + 0)
+ movs r1, #:upper0_7:#(thumb2 + 1)
+ movs r2, #:lower8_15:#(var1 + 255)
+ movs r3, #:lower0_7:#var1
+ movs r7, #:upper8_15:#var1 + 4
+ movs r6, #:upper0_7:#var2
+ movs r5, #:lower8_15:#var2 + 0xff
+ movs r4, #:lower0_7:#var2 - (-1)
+var1:
+ .byte 1
+var2:
+ .byte 2
+
+ .section .far, "ax", %progbits
+ .thumb_func
+ .type thumb3, %function
+thumb3:
+ movs r0, #:upper8_15:#thumb1
+ movs r1, #:upper0_7:#thumb2
+ movs r2, #:lower8_15:#thumb3
+ movs r3, #:lower0_7:#thumb1
+