Delete MIPS_DEFAULT_FPU from config/mips/*.h

diff --git a/gdb/ChangeLog b/gdb/ChangeLog
index a6ac185a6a85f0d8ec95482a1bb29fc1166140f1..e5f23c261115cf382657da144a6e98eec027cc37 100644 (file)
--- a/gdb/ChangeLog
+++ b/gdb/ChangeLog
@@ -1,3 +1,16 @@
+Thu Jun  8 14:23:12 2000  Andrew Cagney  <cagney@b1.cygnus.com>
+
+       * config/mips/tm-vr4xxxel.h, config/mips/tm-vr4xxx.h,
+       config/mips/tm-vr4100.h, config/mips/tm-tx39l.h,
+       config/mips/tm-tx39.h: Delete definition of
+       MIPS_DEFAULT_FPU. Enable multi-arch.
+       * mips-tdep.c: (mips_gdbarch_init): The bfd_mach_mips3900 has no
+       FPU.
+       
+       * config/mips/tm-mips.h (MIPS_FPU_SINGLE_REGSIZE): 
+       (MIPS_FPU_DOUBLE_REGSIZE): Move from here.
+       * mips-tdep.c: To here.  Change to an enum.
+
 Wed Jun  7 18:27:51 2000  Andrew Cagney  <cagney@b1.cygnus.com>
 
        * configure.in (DEFAULT_BFD_ARCH, DEFAULT_BFD_VEC): Use config.bfd

diff --git a/gdb/config/mips/tm-mips.h b/gdb/config/mips/tm-mips.h
index 4aa77f33b16c7dfecb12dbde89fd3344015d20a4..ff951138d19e9f4230b81bd9035c467ae3568372 100644 (file)
--- a/gdb/config/mips/tm-mips.h
+++ b/gdb/config/mips/tm-mips.h
@@ -129,11 +129,6 @@ extern breakpoint_from_pc_fn mips_breakpoint_from_pc;
 #define MIPS_REGSIZE 4
 #endif
 
-/* The sizes of floating point registers.  */
-
-#define MIPS_FPU_SINGLE_REGSIZE 4
-#define MIPS_FPU_DOUBLE_REGSIZE 8
-
 /* Number of machine registers */
 
 #ifndef NUM_REGS

diff --git a/gdb/config/mips/tm-tx39.h b/gdb/config/mips/tm-tx39.h
index 520db7b6b5f7c09d6b07c6584e2733e7f38cfbda..c1d9cf70b578a493beeaf1c1191d3ed299af05ca 100644 (file)
--- a/gdb/config/mips/tm-tx39.h
+++ b/gdb/config/mips/tm-tx39.h
@@ -17,8 +17,8 @@
    Foundation, Inc., 59 Temple Place - Suite 330,
    Boston, MA 02111-1307, USA.  */
 
+#define GDB_MULTI_ARCH 1
 #define MIPS_EABI 1
-#define MIPS_DEFAULT_FPU_TYPE MIPS_FPU_NONE
 
 #include "mips/tm-bigmips.h"
 

diff --git a/gdb/config/mips/tm-tx39l.h b/gdb/config/mips/tm-tx39l.h
index 30ba78ad0ba0d1e051c6b4c53dca81bd9f89a9a3..802e41b7af155037c0fdefdcce3045fe5f4520e0 100644 (file)
--- a/gdb/config/mips/tm-tx39l.h
+++ b/gdb/config/mips/tm-tx39l.h
@@ -17,8 +17,8 @@
    Foundation, Inc., 59 Temple Place - Suite 330,
    Boston, MA 02111-1307, USA.  */
 
+#define GDB_MULTI_ARCH 1
 #define MIPS_EABI 1
-#define MIPS_DEFAULT_FPU_TYPE MIPS_FPU_NONE
 
 #include "mips/tm-mips.h"
 

diff --git a/gdb/config/mips/tm-vr4100.h b/gdb/config/mips/tm-vr4100.h
index 9c876192d0b8d168895594744c283e944d5e4204..faf0a963a07f3194088df11ba83dd61e17d9b573 100644 (file)
--- a/gdb/config/mips/tm-vr4100.h
+++ b/gdb/config/mips/tm-vr4100.h
@@ -18,7 +18,6 @@
    Boston, MA 02111-1307, USA.  */
 
 #define MIPS_EABI 1
-#define MIPS_DEFAULT_FPU_TYPE MIPS_FPU_NONE
 #define TARGET_PTR_BIT 64
 
 #include "mips/tm-bigmips64.h"

diff --git a/gdb/config/mips/tm-vr4xxx.h b/gdb/config/mips/tm-vr4xxx.h
index 2878227cd98f40c98759d1f966a4569a5b87cbe7..7d2a78ac531bd483a635ad2b3ae772446df036a6 100644 (file)
--- a/gdb/config/mips/tm-vr4xxx.h
+++ b/gdb/config/mips/tm-vr4xxx.h
@@ -18,6 +18,5 @@
    Boston, MA 02111-1307, USA.  */
 
 #define GDB_MULTI_ARCH 1
-#define MIPS_DEFAULT_FPU_TYPE MIPS_FPU_DOUBLE
 
 #include "mips/tm-bigmips64.h"

diff --git a/gdb/config/mips/tm-vr4xxxel.h b/gdb/config/mips/tm-vr4xxxel.h
index c9eedc37131d8f979a31b0da98642b10806e5a32..1347af76144d3f21242a2398f57f2462690b9986 100644 (file)
--- a/gdb/config/mips/tm-vr4xxxel.h
+++ b/gdb/config/mips/tm-vr4xxxel.h
@@ -18,6 +18,5 @@
    Boston, MA 02111-1307, USA.  */
 
 #define GDB_MULTI_ARCH 1
-#define MIPS_DEFAULT_FPU_TYPE MIPS_FPU_DOUBLE
 
 #include "mips/tm-mips64.h"

diff --git a/gdb/mips-tdep.c b/gdb/mips-tdep.c
index cf9ac59fadd87614711c39ded113af53e9be139e..971b04ab794df9444595b32203d462321cff7839 100644 (file)
--- a/gdb/mips-tdep.c
+++ b/gdb/mips-tdep.c
@@ -40,6 +40,14 @@
 #include "elf-bfd.h"
 
 
+/* The sizes of floating point registers.  */
+
+enum
+{
+  MIPS_FPU_SINGLE_REGSIZE = 4,
+  MIPS_FPU_DOUBLE_REGSIZE = 8
+};
+
 /* All the possible MIPS ABIs. */
 
 enum mips_abi
@@ -4030,6 +4038,7 @@ mips_gdbarch_init (info, arches)
           && info.bfd_arch_info->arch == bfd_arch_mips)
     switch (info.bfd_arch_info->mach)
       {
+      case bfd_mach_mips3900:
       case bfd_mach_mips4100:
       case bfd_mach_mips4111:
        tdep->mips_fpu_type = MIPS_FPU_NONE;