Use notarget and noskip, like the ld testsuite.
* testsuite/gas/aarch64/codealign.d,
* testsuite/gas/aarch64/litpool.d,
* testsuite/gas/aarch64/mapmisc.d,
* testsuite/gas/aarch64/mapping.d,
* testsuite/gas/aarch64/mapping2.d,
* testsuite/gas/aarch64/mapping3.d,
* testsuite/gas/aarch64/mapping4.d,
* testsuite/gas/all/align.d,
* testsuite/gas/all/fill-1.d,
* testsuite/gas/all/incbin.d,
* testsuite/gas/all/redef2.d,
* testsuite/gas/all/redef3.d,
* testsuite/gas/all/relax.d,
* testsuite/gas/all/sleb128-2.d,
* testsuite/gas/all/sleb128-4.d,
* testsuite/gas/all/sleb128-5.d,
* testsuite/gas/all/sleb128-7.d,
* testsuite/gas/all/sleb128-9.d,
* testsuite/gas/all/weakref1.d,
* testsuite/gas/all/weakref1g.d,
* testsuite/gas/all/weakref1l.d,
* testsuite/gas/all/weakref1u.d,
* testsuite/gas/all/weakref1w.d,
* testsuite/gas/arm/abs12.d,
* testsuite/gas/arm/arch4t.d,
* testsuite/gas/arm/arch7.d,
* testsuite/gas/arm/arch7a-mp.d,
* testsuite/gas/arm/arch7em.d,
* testsuite/gas/arm/archv8m-main-dsp-5.d,
* testsuite/gas/arm/armv8a-automatic-hlt.d,
* testsuite/gas/arm/armv8a-automatic-lda.d,
* testsuite/gas/arm/attr-syntax.d,
* testsuite/gas/arm/automatic-bw.d,
* testsuite/gas/arm/automatic-cbz.d,
* testsuite/gas/arm/automatic-clrex.d,
* testsuite/gas/arm/automatic-lda.d,
* testsuite/gas/arm/automatic-ldaex.d,
* testsuite/gas/arm/automatic-ldaexb.d,
* testsuite/gas/arm/automatic-ldrex.d,
* testsuite/gas/arm/automatic-ldrexd.d,
* testsuite/gas/arm/automatic-movw.d,
* testsuite/gas/arm/automatic-sdiv.d,
* testsuite/gas/arm/automatic-strexb.d,
* testsuite/gas/arm/barrier-thumb.d,
* testsuite/gas/arm/barrier.d,
* testsuite/gas/arm/bignum1.d,
* testsuite/gas/arm/blx-bad.d,
* testsuite/gas/arm/blx-local.s,
* testsuite/gas/arm/crc32-armv8-a-bad.d,
* testsuite/gas/arm/crc32-armv8-a.d,
* testsuite/gas/arm/crc32-armv8-r-bad.d,
* testsuite/gas/arm/crc32-armv8-r.d,
* testsuite/gas/arm/eabi_attr_1.d,
* testsuite/gas/arm/fp-save.d,
* testsuite/gas/arm/local_function.d,
* testsuite/gas/arm/local_label_coff.d,
* testsuite/gas/arm/local_label_wince.d,
* testsuite/gas/arm/mapping.d,
* testsuite/gas/arm/mapping2.d,
* testsuite/gas/arm/mapping3.d,
* testsuite/gas/arm/mapping4.d,
* testsuite/gas/arm/mapshort-elf.d,
* testsuite/gas/arm/mask_1-armv8-a.d,
* testsuite/gas/arm/mask_1-armv8-r.d,
* testsuite/gas/arm/mrs-msr-thumb-v6t2.d,
* testsuite/gas/arm/mrs-msr-thumb-v7-m.d,
* testsuite/gas/arm/mrs-msr-thumb-v7e-m.d,
* testsuite/gas/arm/nomapping.d,
* testsuite/gas/arm/pic.d,
* testsuite/gas/arm/pic_vxworks.d,
* testsuite/gas/arm/plt-1.d,
* testsuite/gas/arm/reloc-bad.d,
* testsuite/gas/arm/reloc-fdpic.d,
* testsuite/gas/arm/t2-branch-global.d,
* testsuite/gas/arm/thumb.d,
* testsuite/gas/arm/thumb2_ldr_immediate_armv6.d,
* testsuite/gas/arm/thumb2_ldr_immediate_highregs_armv6t2.d,
* testsuite/gas/arm/thumb2_pool.d,
* testsuite/gas/arm/thumb2_vpool.d,
* testsuite/gas/arm/thumb2_vpool_be.d,
* testsuite/gas/arm/thumb32.d,
* testsuite/gas/arm/thumbver.d,
* testsuite/gas/arm/tls.d,
* testsuite/gas/arm/tls_vxworks.d,
* testsuite/gas/arm/undefined_coff.d,
* testsuite/gas/arm/unwind.d,
* testsuite/gas/arm/unwind_vxworks.d,
* testsuite/gas/arm/v4bx.d,
* testsuite/gas/arm/vfma1.d,
* testsuite/gas/arm/vldm-arm.d,
* testsuite/gas/arm/weakdef-1.d,
* testsuite/gas/arm/weakdef-2.d,
* testsuite/gas/arm/wince.d,
* testsuite/gas/arm/wince_inst.d,
* testsuite/gas/elf/bignums.d,
* testsuite/gas/elf/common5a.d,
* testsuite/gas/elf/common5b.d,
* testsuite/gas/elf/common5c.d,
* testsuite/gas/elf/common5d.d,
* testsuite/gas/elf/dwarf2-1.d,
* testsuite/gas/elf/dwarf2-10.d,
* testsuite/gas/elf/dwarf2-11.d,
* testsuite/gas/elf/dwarf2-12.d,
* testsuite/gas/elf/dwarf2-13.d,
* testsuite/gas/elf/dwarf2-14.d,
* testsuite/gas/elf/dwarf2-15.d,
* testsuite/gas/elf/dwarf2-16.d,
* testsuite/gas/elf/dwarf2-17.d,
* testsuite/gas/elf/dwarf2-18.d,
* testsuite/gas/elf/dwarf2-2.d,
* testsuite/gas/elf/dwarf2-3.d,
* testsuite/gas/elf/dwarf2-4.d,
* testsuite/gas/elf/dwarf2-5.d,
* testsuite/gas/elf/dwarf2-6.d,
* testsuite/gas/elf/dwarf2-7.d,
* testsuite/gas/elf/dwarf2-8.d,
* testsuite/gas/elf/dwarf2-9.d,
* testsuite/gas/elf/group0c.d,
* testsuite/gas/elf/group1a.d,
* testsuite/gas/elf/group2.d,
* testsuite/gas/elf/groupautoa.d,
* testsuite/gas/elf/ifunc-1.d,
* testsuite/gas/elf/section11.d,
* testsuite/gas/elf/section4.d,
* testsuite/gas/elf/section7.d,
* testsuite/gas/elf/syms.d,
* testsuite/gas/elf/symver.d,
* testsuite/gas/i386/iamcu-1.d,
* testsuite/gas/i386/iamcu-2.d,
* testsuite/gas/i386/iamcu-3.d,
* testsuite/gas/i386/iamcu-4.d,
* testsuite/gas/i386/iamcu-5.d,
* testsuite/gas/i386/ilp32/rex.d,
* testsuite/gas/i386/k1om.d,
* testsuite/gas/i386/l1om.d,
* testsuite/gas/i386/rex.d,
* testsuite/gas/mach-o/sections-3.d,
* testsuite/gas/macros/irp.d,
* testsuite/gas/macros/repeat.d,
* testsuite/gas/macros/rept.d,
* testsuite/gas/macros/semi.d,
* testsuite/gas/macros/test2.d,
* testsuite/gas/macros/test3.d,
* testsuite/gas/macros/vararg.d,
* testsuite/gas/mips/jal-svr4pic-local.d,
* testsuite/gas/mips/micromips@jal-svr4pic-local.d,
* testsuite/gas/mips/mips1@jal-svr4pic-local.d,
* testsuite/gas/mips/r3000@jal-svr4pic-local.d,
* testsuite/gas/ppc/machine.d,
* testsuite/lib/gas-defs.exp (run_dump_test): Replace not-target
and not-skip with notarget and noskip.
+2018-09-15 Alan Modra <amodra@gmail.com>
+
+ * testsuite/gas/aarch64/codealign.d,
+ * testsuite/gas/aarch64/litpool.d,
+ * testsuite/gas/aarch64/mapmisc.d,
+ * testsuite/gas/aarch64/mapping.d,
+ * testsuite/gas/aarch64/mapping2.d,
+ * testsuite/gas/aarch64/mapping3.d,
+ * testsuite/gas/aarch64/mapping4.d,
+ * testsuite/gas/all/align.d,
+ * testsuite/gas/all/fill-1.d,
+ * testsuite/gas/all/incbin.d,
+ * testsuite/gas/all/redef2.d,
+ * testsuite/gas/all/redef3.d,
+ * testsuite/gas/all/relax.d,
+ * testsuite/gas/all/sleb128-2.d,
+ * testsuite/gas/all/sleb128-4.d,
+ * testsuite/gas/all/sleb128-5.d,
+ * testsuite/gas/all/sleb128-7.d,
+ * testsuite/gas/all/sleb128-9.d,
+ * testsuite/gas/all/weakref1.d,
+ * testsuite/gas/all/weakref1g.d,
+ * testsuite/gas/all/weakref1l.d,
+ * testsuite/gas/all/weakref1u.d,
+ * testsuite/gas/all/weakref1w.d,
+ * testsuite/gas/arm/abs12.d,
+ * testsuite/gas/arm/arch4t.d,
+ * testsuite/gas/arm/arch7.d,
+ * testsuite/gas/arm/arch7a-mp.d,
+ * testsuite/gas/arm/arch7em.d,
+ * testsuite/gas/arm/archv8m-main-dsp-5.d,
+ * testsuite/gas/arm/armv8a-automatic-hlt.d,
+ * testsuite/gas/arm/armv8a-automatic-lda.d,
+ * testsuite/gas/arm/attr-syntax.d,
+ * testsuite/gas/arm/automatic-bw.d,
+ * testsuite/gas/arm/automatic-cbz.d,
+ * testsuite/gas/arm/automatic-clrex.d,
+ * testsuite/gas/arm/automatic-lda.d,
+ * testsuite/gas/arm/automatic-ldaex.d,
+ * testsuite/gas/arm/automatic-ldaexb.d,
+ * testsuite/gas/arm/automatic-ldrex.d,
+ * testsuite/gas/arm/automatic-ldrexd.d,
+ * testsuite/gas/arm/automatic-movw.d,
+ * testsuite/gas/arm/automatic-sdiv.d,
+ * testsuite/gas/arm/automatic-strexb.d,
+ * testsuite/gas/arm/barrier-thumb.d,
+ * testsuite/gas/arm/barrier.d,
+ * testsuite/gas/arm/bignum1.d,
+ * testsuite/gas/arm/blx-bad.d,
+ * testsuite/gas/arm/blx-local.s,
+ * testsuite/gas/arm/crc32-armv8-a-bad.d,
+ * testsuite/gas/arm/crc32-armv8-a.d,
+ * testsuite/gas/arm/crc32-armv8-r-bad.d,
+ * testsuite/gas/arm/crc32-armv8-r.d,
+ * testsuite/gas/arm/eabi_attr_1.d,
+ * testsuite/gas/arm/fp-save.d,
+ * testsuite/gas/arm/local_function.d,
+ * testsuite/gas/arm/local_label_coff.d,
+ * testsuite/gas/arm/local_label_wince.d,
+ * testsuite/gas/arm/mapping.d,
+ * testsuite/gas/arm/mapping2.d,
+ * testsuite/gas/arm/mapping3.d,
+ * testsuite/gas/arm/mapping4.d,
+ * testsuite/gas/arm/mapshort-elf.d,
+ * testsuite/gas/arm/mask_1-armv8-a.d,
+ * testsuite/gas/arm/mask_1-armv8-r.d,
+ * testsuite/gas/arm/mrs-msr-thumb-v6t2.d,
+ * testsuite/gas/arm/mrs-msr-thumb-v7-m.d,
+ * testsuite/gas/arm/mrs-msr-thumb-v7e-m.d,
+ * testsuite/gas/arm/nomapping.d,
+ * testsuite/gas/arm/pic.d,
+ * testsuite/gas/arm/pic_vxworks.d,
+ * testsuite/gas/arm/plt-1.d,
+ * testsuite/gas/arm/reloc-bad.d,
+ * testsuite/gas/arm/reloc-fdpic.d,
+ * testsuite/gas/arm/t2-branch-global.d,
+ * testsuite/gas/arm/thumb.d,
+ * testsuite/gas/arm/thumb2_ldr_immediate_armv6.d,
+ * testsuite/gas/arm/thumb2_ldr_immediate_highregs_armv6t2.d,
+ * testsuite/gas/arm/thumb2_pool.d,
+ * testsuite/gas/arm/thumb2_vpool.d,
+ * testsuite/gas/arm/thumb2_vpool_be.d,
+ * testsuite/gas/arm/thumb32.d,
+ * testsuite/gas/arm/thumbver.d,
+ * testsuite/gas/arm/tls.d,
+ * testsuite/gas/arm/tls_vxworks.d,
+ * testsuite/gas/arm/undefined_coff.d,
+ * testsuite/gas/arm/unwind.d,
+ * testsuite/gas/arm/unwind_vxworks.d,
+ * testsuite/gas/arm/v4bx.d,
+ * testsuite/gas/arm/vfma1.d,
+ * testsuite/gas/arm/vldm-arm.d,
+ * testsuite/gas/arm/weakdef-1.d,
+ * testsuite/gas/arm/weakdef-2.d,
+ * testsuite/gas/arm/wince.d,
+ * testsuite/gas/arm/wince_inst.d,
+ * testsuite/gas/elf/bignums.d,
+ * testsuite/gas/elf/common5a.d,
+ * testsuite/gas/elf/common5b.d,
+ * testsuite/gas/elf/common5c.d,
+ * testsuite/gas/elf/common5d.d,
+ * testsuite/gas/elf/dwarf2-1.d,
+ * testsuite/gas/elf/dwarf2-10.d,
+ * testsuite/gas/elf/dwarf2-11.d,
+ * testsuite/gas/elf/dwarf2-12.d,
+ * testsuite/gas/elf/dwarf2-13.d,
+ * testsuite/gas/elf/dwarf2-14.d,
+ * testsuite/gas/elf/dwarf2-15.d,
+ * testsuite/gas/elf/dwarf2-16.d,
+ * testsuite/gas/elf/dwarf2-17.d,
+ * testsuite/gas/elf/dwarf2-18.d,
+ * testsuite/gas/elf/dwarf2-2.d,
+ * testsuite/gas/elf/dwarf2-3.d,
+ * testsuite/gas/elf/dwarf2-4.d,
+ * testsuite/gas/elf/dwarf2-5.d,
+ * testsuite/gas/elf/dwarf2-6.d,
+ * testsuite/gas/elf/dwarf2-7.d,
+ * testsuite/gas/elf/dwarf2-8.d,
+ * testsuite/gas/elf/dwarf2-9.d,
+ * testsuite/gas/elf/group0c.d,
+ * testsuite/gas/elf/group1a.d,
+ * testsuite/gas/elf/group2.d,
+ * testsuite/gas/elf/groupautoa.d,
+ * testsuite/gas/elf/ifunc-1.d,
+ * testsuite/gas/elf/section11.d,
+ * testsuite/gas/elf/section4.d,
+ * testsuite/gas/elf/section7.d,
+ * testsuite/gas/elf/syms.d,
+ * testsuite/gas/elf/symver.d,
+ * testsuite/gas/i386/iamcu-1.d,
+ * testsuite/gas/i386/iamcu-2.d,
+ * testsuite/gas/i386/iamcu-3.d,
+ * testsuite/gas/i386/iamcu-4.d,
+ * testsuite/gas/i386/iamcu-5.d,
+ * testsuite/gas/i386/ilp32/rex.d,
+ * testsuite/gas/i386/k1om.d,
+ * testsuite/gas/i386/l1om.d,
+ * testsuite/gas/i386/rex.d,
+ * testsuite/gas/mach-o/sections-3.d,
+ * testsuite/gas/macros/irp.d,
+ * testsuite/gas/macros/repeat.d,
+ * testsuite/gas/macros/rept.d,
+ * testsuite/gas/macros/semi.d,
+ * testsuite/gas/macros/test2.d,
+ * testsuite/gas/macros/test3.d,
+ * testsuite/gas/macros/vararg.d,
+ * testsuite/gas/mips/jal-svr4pic-local.d,
+ * testsuite/gas/mips/micromips@jal-svr4pic-local.d,
+ * testsuite/gas/mips/mips1@jal-svr4pic-local.d,
+ * testsuite/gas/mips/r3000@jal-svr4pic-local.d,
+ * testsuite/gas/ppc/machine.d,
+ * testsuite/lib/gas-defs.exp (run_dump_test): Replace not-target
+ and not-skip with notarget and noskip.
+
2018-09-15 Alan Modra <amodra@gmail.com>
* testsuite/gas/mri/char.d: Don't objcopy to srec, objdump instead.
#objdump: --section-headers
# Minimum code alignment should be set.
# This test is only valid on ELF based ports.
-#not-target: *-*-pe *-*-wince
+#notarget: *-*-pe *-*-wince
.*: +file format.*aarch64.*
#objdump: -d
#name: AArch64 Bignums in Literal Pool (PR 16688)
# This test is only valid on ELF based ports.
-#not-target: *-*-*coff *-*-pe *-*-wince *-*-*aout* *-*-netbsd *-*-riscix*
+#notarget: *-*-*coff *-*-pe *-*-wince *-*-*aout* *-*-netbsd *-*-riscix*
.*: +file format.*aarch64.*
#name: AArch64 Mapping Symbols for miscellaneous directives
#source: mapmisc.s
# This test is only valid on ELF based ports.
-#not-target: *-*-*coff *-*-pe *-*-wince *-*-*aout* *-*-netbsd *-*-riscix*
+#notarget: *-*-*coff *-*-pe *-*-wince *-*-*aout* *-*-netbsd *-*-riscix*
.*: +file format .*aarch64.*
#objdump: --syms --special-syms
#name: AArch64 Mapping Symbols
# This test is only valid on ELF based ports.
-#not-target: *-*-pe *-*-wince
+#notarget: *-*-pe *-*-wince
# Test the generation of AArch64 ELF Mapping Symbols
#objdump: --syms --special-syms
#name: AArch64 Mapping Symbols Test 2
# This test is only valid on ELF based ports.
-#not-target: *-*-pe *-*-wince
+#notarget: *-*-pe *-*-wince
.*: +file format.*aarch64.*
#objdump: --syms --special-syms
#name: AArch64 Mapping Symbols Test 3
# This test is only valid on ELF based ports.
-#not-target: *-*-*coff *-*-pe *-*-wince *-*-*aout* *-*-netbsd *-*-riscix*
+#notarget: *-*-*coff *-*-pe *-*-wince *-*-*aout* *-*-netbsd *-*-riscix*
.*: +file format.*aarch64.*
#objdump: --syms --special-syms
#name: AArch64 Mapping Symbols Test 4
# This test is only valid on ELF based ports.
-#not-target: *-*-*coff *-*-pe *-*-wince *-*-*aout* *-*-netbsd *-*-riscix*
+#notarget: *-*-*coff *-*-pe *-*-wince *-*-*aout* *-*-netbsd *-*-riscix*
.*: +file format.*aarch64.*
# even if the user requested that they filled with zeros.
# RISC-V handles alignment via relaxation and therefor won't have object files
# with the expected alignment.
-#not-target: m32c-* riscv*-* rx-*
+#notarget: m32c-* riscv*-* rx-*
# Test the alignment pseudo-op.
#objdump: -s -j .data -j "\$DATA\$"
#name: fill test with forward labels
-#not-target: tic4x-*-* tic54x-*-*
+#notarget: tic4x-*-* tic54x-*-*
.*: +file format .*
#as: -I$srcdir/$subdir
#objdump: -s -j .text
#name: incbin
-#not-target: m32c-*
+#notarget: m32c-*
# Test the incbin pseudo-op
#objdump: -rs -j .data -j "\$DATA\$"
#name: .equ redefinitions (2)
-#not-target: *-*-darwin*
+#notarget: *-*-darwin*
.*: .*
#objdump: -rsj .data
#name: .equ redefinitions (3)
-#not-target: *-*darwin*
+#notarget: *-*darwin*
.*: .*
# RISC-V doesn't support .sleb operands that are the difference of two symbols
# because symbol values are not known until after linker relaxation has been
# performed.
-#not-target : riscv*-*-*
+#notarget : riscv*-*-*
.*: .*
# RISC-V doesn't support .sleb operands that are the difference of two symbols
# because symbol values are not known until after linker relaxation has been
# performed.
-#not-target : riscv*-*-*
+#notarget : riscv*-*-*
.*: .*
# RISC-V doesn't support .sleb operands that are the difference of two symbols
# because symbol values are not known until after linker relaxation has been
# performed.
-#not-target: riscv*-*-*
+#notarget: riscv*-*-*
.*: .*
# RISC-V doesn't support .sleb operands that are the difference of two symbols
# because symbol values are not known until after linker relaxation has been
# performed.
-#not-target : riscv*-*-*
+#notarget : riscv*-*-*
.*: .*
# RISC-V doesn't support .sleb operands that are the difference of two symbols
# because symbol values are not known until after linker relaxation has been
# performed.
-#not-target: riscv*-*-*
+#notarget: riscv*-*-*
.*: .*
#name: undefined symbols in sleb128 directive
#source: sleb128-9.s
#error-output: sleb128-9.l
-#not-target: riscv*-*
+#notarget: riscv*-*
# pdp11 lacks .long
# darwin (mach-o) reverses the order of relocs.
# the following must be present in all weakref1*.d
-#not-target: alpha*-*-osf* *-*-ecoff pdp11-*-aout *-*-darwin*
+#notarget: alpha*-*-osf* *-*-ecoff pdp11-*-aout *-*-darwin*
#...
RELOCATION RECORDS FOR \[(\.text|\$CODE\$)\]:
#nm: --defined-only --extern-only
#name: weakref tests, global syms
#source: weakref1.s
-# see weakref1.d for comments on the not-targets
+# see weakref1.d for comments on the notargets
# ecoff (OSF/alpha) lacks .weak support
# pdp11 lacks .long
-#not-target: alpha*-*-osf* *-*-ecoff pdp11-*-aout
+#notarget: alpha*-*-osf* *-*-ecoff pdp11-*-aout
# the rest of this file is generated with the following script:
# # script begin
#name: weakref tests, local syms
#source: weakref1.s
# aix drops local symbols
-# see weakref1.d for comments on the other not-targets
-#not-target: *-*-aix* alpha*-*-osf* *-*-ecoff pdp11-*-aout
+# see weakref1.d for comments on the other notargets
+#notarget: *-*-aix* alpha*-*-osf* *-*-ecoff pdp11-*-aout
# the rest of this file is generated with the following script:
# # script begin
#name: weakref tests, strong undefined syms
#source: weakref1.s
# aout turns undefined into *ABS* symbols.
-# see weakref1.d for comments on the other not-targets
-#not-target: *-*-*aout ns32k-*-netbsd alpha*-*-osf* *-*-ecoff
+# see weakref1.d for comments on the other notargets
+#notarget: *-*-*aout ns32k-*-netbsd alpha*-*-osf* *-*-ecoff
# the rest of this file is generated with the following script:
# # script begin
#nm: --undefined-only
#name: weakref tests, weak undefined syms
#source: weakref1.s
-# see weakref1.d for comments on the not-targets
-#not-target: alpha*-*-osf* *-*-ecoff pdp11-*-aout
+# see weakref1.d for comments on the notargets
+#notarget: alpha*-*-osf* *-*-ecoff pdp11-*-aout
# the rest of this file is generated with the following script:
# # script begin
#objdump: -dr
-#not-skip: *-vxworks
+#noskip: *-vxworks
.*: file format .*
# as: -march=armv4t
# objdump: -dr --prefix-addresses --show-raw-insn
# EABI targets have their own variant.
-# not-target: *-*-*eabi* *-*-symbianelf *-*-nacl*
+# notarget: *-*-*eabi* *-*-symbianelf *-*-nacl*
.*: +file format .*arm.*
#name: ARM V7 instructions
#as: -march=armv7r
#objdump: -dr --prefix-addresses --show-raw-insn
-#not-target: *-*-pe *-*-wince
+#notarget: *-*-pe *-*-wince
.*: +file format .*arm.*
#as: -march=armv7-a+mp
#objdump: -dr --prefix-addresses --show-raw-insn
#source: arch7ar-mp.s
-#not-target: *-*-pe *-*-wince
+#notarget: *-*-pe *-*-wince
.*: +file format .*arm.*
# name: 32-bit Thumb DSP instructions
# as: -march=armv7e-m
# objdump: -dr --prefix-addresses --show-raw-insn
-#not-target: *-*-pe *-*-wince
+#notarget: *-*-pe *-*-wince
.*: +file format .*arm.*
#source: arch7em.s
#as: -march=armv8-m.main+dsp
#objdump: -dr --prefix-addresses --show-raw-insn
-#not-target: *-*-pe *-*-wince
+#notarget: *-*-pe *-*-wince
.*: +file format .*arm.*
# readelf: -A
# This test is only valid on ELF based ports.
-#not-target: *-*-pe *-*-wince
+#notarget: *-*-pe *-*-wince
Attribute Section: aeabi
File Attributes
Tag_CPU_arch: v8
# readelf: -A
# This test is only valid on ELF based ports.
-#not-target: *-*-pe *-*-wince
+#notarget: *-*-pe *-*-wince
Attribute Section: aeabi
File Attributes
Tag_CPU_arch: v8
#source: attr-syntax.s
-#not-target: *-*-pe
+#notarget: *-*-pe
#as:
#error: :1: Error: Attribute name not recognised: made_up_tag.*:3: Error: expected <tag> , <value>.*:5: Error: expected <tag> , <value>
# readelf: -A
# This test is only valid on ELF based ports.
-#not-target: *-*-pe *-*-wince
+#notarget: *-*-pe *-*-wince
Attribute Section: aeabi
File Attributes
Tag_CPU_arch: v6T2
# readelf: -A
# This test is only valid on ELF based ports.
-#not-target: *-*-pe *-*-wince
+#notarget: *-*-pe *-*-wince
Attribute Section: aeabi
File Attributes
Tag_CPU_arch: v6T2
# readelf: -A
# This test is only valid on ELF based ports.
-#not-target: *-*-pe *-*-wince
+#notarget: *-*-pe *-*-wince
Attribute Section: aeabi
File Attributes
Tag_CPU_arch: v6T2
# readelf: -A
# This test is only valid on ELF based ports.
-#not-target: *-*-pe *-*-wince
+#notarget: *-*-pe *-*-wince
Attribute Section: aeabi
File Attributes
Tag_CPU_arch: v8
# readelf: -A
# This test is only valid on ELF based ports.
-#not-target: *-*-pe *-*-wince
+#notarget: *-*-pe *-*-wince
Attribute Section: aeabi
File Attributes
Tag_CPU_arch: v8
# readelf: -A
# This test is only valid on ELF based ports.
-#not-target: *-*-pe *-*-wince
+#notarget: *-*-pe *-*-wince
Attribute Section: aeabi
File Attributes
Tag_CPU_arch: v8
# readelf: -A
# This test is only valid on ELF based ports.
-#not-target: *-*-pe *-*-wince
+#notarget: *-*-pe *-*-wince
Attribute Section: aeabi
File Attributes
Tag_CPU_arch: v6T2
# readelf: -A
# This test is only valid on ELF based ports.
-#not-target: *-*-pe *-*-wince
+#notarget: *-*-pe *-*-wince
Attribute Section: aeabi
File Attributes
Tag_CPU_arch: v6T2
# readelf: -A
# This test is only valid on ELF based ports.
-#not-target: *-*-pe *-*-wince
+#notarget: *-*-pe *-*-wince
Attribute Section: aeabi
File Attributes
Tag_CPU_arch: v6T2
# readelf: -A
# This test is only valid on ELF based ports.
-#not-target: *-*-pe *-*-wince
+#notarget: *-*-pe *-*-wince
Attribute Section: aeabi
File Attributes
Tag_CPU_arch: v7
# readelf: -A
# This test is only valid on ELF based ports.
-#not-target: *-*-pe *-*-wince
+#notarget: *-*-pe *-*-wince
Attribute Section: aeabi
File Attributes
Tag_CPU_arch: v6T2
#source: barrier.s
#as: -mcpu=cortex-a8 -mthumb
# This test is only valid on ELF based ports.
-#not-target: *-*-pe *-*-wince
+#notarget: *-*-pe *-*-wince
# Test Barrier Instruction Operands
#name: Barrier Instruction Operands
#as: -mcpu=cortex-a8
# This test is only valid on ELF based ports.
-#not-target: *-*-pe *-*-wince
+#notarget: *-*-pe *-*-wince
# Test Barrier Instruction Operands
# as:
# objdump: --full-contents
# This test is only valid on ELF based ports.
-#not-target: *-*-pe *-*-wince
+#notarget: *-*-pe *-*-wince
.*: +file format .*arm.*
#objdump: -drw --show-raw-insn
#name: BLX encoding
# This test is only valid on ELF based ports.
-#not-target: *-*-pe *-*-wince
+#notarget: *-*-pe *-*-wince
.*: file format .*arm.*
# objdump: -fdrw --prefix-addresses --show-raw-insn
-# not-target: *-*-pe
+# notarget: *-*-pe
.text
.arch armv5t
#source: crc32-armv8-ar-bad.s
#as: -march=armv8-a+crc
#stderr: crc32-bad.l
-#not-target: *-*-pe *-*-wince
+#notarget: *-*-pe *-*-wince
.*: +file format .*arm.*
#name: ARMv8-A CRC32 instructions
#source: crc32-armv8-ar.s
#as: -march=armv8-a+crc
-#not-target: *-*-pe *-*-wince
+#notarget: *-*-pe *-*-wince
.*: *file format .*arm.*
#source: crc32-armv8-ar-bad.s
#as: -march=armv8-r+crc
#stderr: crc32-bad.l
-#not-target: *-*-pe *-*-wince
+#notarget: *-*-pe *-*-wince
.*: +file format .*arm.*
#name: ARMv8-R CRC32 instructions
#source: crc32-armv8-ar.s
#as: -march=armv8-r+crc
-#not-target: *-*-pe *-*-wince
+#notarget: *-*-pe *-*-wince
.*: *file format .*arm.*
# as: -meabi=4
# readelf: -A
# This test is only valid on ELF based ports.
-#not-target: *-*-pe *-*-wince
+#notarget: *-*-pe *-*-wince
Attribute Section: aeabi
File Attributes
Tag_CPU_name: "ARM1136JF-S"
#objdump: -dr --prefix-addresses --show-raw-insn
#name: PR5712 - saving FP registers
-#not-target: *-*-pe *-*-wince
+#notarget: *-*-pe *-*-wince
#as: -mfpu=fpa
.*: *file format .*arm.*
#objdump: -r
#name: Relocations against local function symbols
# This test is only valid on ELF based ports.
-#not-target: *-*-pe *-*-wince *-*-vxworks
+#notarget: *-*-pe *-*-wince *-*-vxworks
.*: file format.*
#name: ARM local label relocs to section symbol relocs (COFF)
# This test is only valid on COFF based targets, except Windows CE.
# There are ELF and Windows CE versions of this test.
-#not-skip: *-unknown-pe
+#noskip: *-unknown-pe
# Check if relocations against local symbols are converted to
# relocations against section symbols.
#name: ARM local label relocs to section symbol relocs (WinCE)
# This test is only valid on Windows CE.
# There are ELF and COFF versions of this test.
-#not-skip: *-*-wince *-wince-*
+#noskip: *-*-wince *-wince-*
# Check if relocations against local symbols are converted to
# relocations against section symbols.
#objdump: --syms --special-syms
#name: ARM Mapping Symbols
# This test is only valid on ELF based ports.
-#not-target: *-*-pe *-*-wince
+#notarget: *-*-pe *-*-wince
# Test the generation of ARM ELF Mapping Symbols
#objdump: --syms --special-syms
#name: ARM Mapping Symbols Test 2
# This test is only valid on ELF based ports.
-#not-target: *-*-pe *-*-wince
+#notarget: *-*-pe *-*-wince
.*: +file format.*arm.*
#objdump: --syms --special-syms
#name: ARM Mapping Symbols Test 3
# This test is only valid on ELF based ports.
-#not-target: *-*-pe *-*-wince
+#notarget: *-*-pe *-*-wince
.*: +file format.*arm.*
#objdump: --syms --special-syms
#name: ARM Mapping Symbols Test 4
# This test is only valid on ELF based ports.
-#not-target: *-*-pe *-*-wince
+#notarget: *-*-pe *-*-wince
.*: +file format.*arm.*
#objdump: --syms --special-syms -d
#name: ARM Mapping Symbols for .short (ELF version)
# This test is only valid on ELF based ports.
-#not-target: *-*-pe *-*-wince *-*-*eabi* *-*-symbianelf *-*-linux-* *-*-vxworks *-*-elf *-*-nacl*
+#notarget: *-*-pe *-*-wince *-*-*eabi* *-*-symbianelf *-*-linux-* *-*-vxworks *-*-elf *-*-nacl*
#source: mapshort.s
# Test the generation and use of ARM ELF Mapping Symbols
#source: mask_1-armv8-ar.s
#as: -march=armv8-a
# This test is only valid on ELF based ports.
-#not-target: *-*-pe *-*-wince
+#notarget: *-*-pe *-*-wince
# Test VFMA instruction disassembly
#source: mask_1-armv8-ar.s
#as: -march=armv8-r
# This test is only valid on ELF based ports.
-#not-target: *-*-pe *-*-wince
+#notarget: *-*-pe *-*-wince
# Test VFMA instruction disassembly
#objdump: -dr --prefix-addresses --show-raw-insn
#name: MRS/MSR test, architecture v6t2, Thumb mode
# This test is only valid on ELF based ports.
-#not-target: *-*-pe *-*-wince
+#notarget: *-*-pe *-*-wince
.*: file format .*
#objdump: -dr --prefix-addresses --show-raw-insn
#name: MRS/MSR test, architecture v7-M, Thumb mode
# This test is only valid on ELF based ports.
-#not-target: *-*-pe *-*-wince
+#notarget: *-*-pe *-*-wince
.*: file format .*
#objdump: -dr --prefix-addresses --show-raw-insn
#name: MRS/MSR test, architecture v7e-M, Thumb mode
# This test is only valid on ELF based ports.
-#not-target: *-*-pe *-*-wince
+#notarget: *-*-pe *-*-wince
.*: file format .*
#nm: -n
#name: ARM Mapping Symbols Ignored
# This test is only valid on ELF based ports.
-#not-target: *-*-pe *-*-wince
+#notarget: *-*-pe *-*-wince
# Check ARM ELF Mapping Symbols are ignored properly
0+0 t sym1
#objdump: -dr --prefix-addresses --show-raw-insn
#name: PIC
# This test is only valid on ELF based ports.
-#not-target: *-*-pe *-*-wince
+#notarget: *-*-pe *-*-wince
# VxWorks needs a special variant of this file.
#skip: *-*-vxworks*
#objdump: -dr --prefix-addresses --show-raw-insn
#name: PIC
#source: pic.s
-#not-skip: *-*-vxworks*
+#noskip: *-*-vxworks*
# Test generation of PIC
# as:
# objdump: -dr
# This test is only valid on ELF based ports.
-#not-target: *-*-pe *-*-wince *-*-vxworks
+#notarget: *-*-pe *-*-wince *-*-vxworks
.*: +file format .*arm.*
#name: Invalid relocations
#error-output: reloc-bad.l
-#not-target: *-*-vxworks
+#notarget: *-*-vxworks
#objdump: -dr --show-raw-insn
#name: FDPIC relocations
# This test is only valid on ELF based ports.
-#not-skip: arm*-*-uclinuxfdpiceabi
+#noskip: arm*-*-uclinuxfdpiceabi
.*: +file format .*arm.*
#name: Thumb-2 branch to constant address
#This test is only valid on ELF based ports.
-#not-target: *-*-pe *-*-wince
+#notarget: *-*-pe *-*-wince
#objdump: -rd
# objdump: -dr --prefix-addresses --show-raw-insn
# The arm-aout and arm-pe ports do not support Thumb branch relocations.
# EABI targets have their own variant.
-# not-target: *-*-pe *-*-*eabi* *-*-symbianelf *-*-nacl*
+# notarget: *-*-pe *-*-*eabi* *-*-symbianelf *-*-nacl*
.*: +file format .*arm.*
# name: Ldr immediate on armv6
# as: -march=armv6
# objdump: -dr --prefix-addresses --show-raw-insn
-# not-target: *-*-pe *-*-wince
+# notarget: *-*-pe *-*-wince
.*: +file format .*arm.*
# name: Ldr small immediate high registers on armv6t2
# as: -march=armv6t2
# objdump: -dr --prefix-addresses --show-raw-insn
-# not-target: *-*-pe *-*-wince
+# notarget: *-*-pe *-*-wince
.*: +file format .*arm.*
# as: -march=armv6t2
# objdump: -dr --prefix-addresses --show-raw-insn
# This test is only valid on ELF based ports.
-#not-target: *-*-pe *-*-wince *-*-vxworks
+#notarget: *-*-pe *-*-wince *-*-vxworks
.*: +file format .*arm.*
# as: -march=armv6t2 -EL
# objdump: -dr --prefix-addresses --show-raw-insn
# This test is only valid on ELF based ports.
-#not-target: *-*-pe *-*-wince
+#notarget: *-*-pe *-*-wince
#name: Thumb2 vldr with immediate constant
.*: +file format .*arm.*
# as: -march=armv6t2 -mbig-endian
# objdump: -dr --prefix-addresses --show-raw-insn
# This test is only valid on ELF based ports.
-#not-target: *-*-pe *-*-wince
+#notarget: *-*-pe *-*-wince
#name: Thumb2 vldr with immediate constant
#source: thumb2_vpool.s
# as: -march=armv6zkt2
# objdump: -dr --prefix-addresses --show-raw-insn
# The arm-aout and arm-pe ports do not support Thumb branch relocations.
-# not-target: *-*-pe
+# notarget: *-*-pe
# stderr: thumb32.l
.*: +file format .*arm.*
# as: -meabi=4
# readelf: -s
# This test is only valid on ELF based ports.
-#not-target: *-*-pe *-*-wince
+#notarget: *-*-pe *-*-wince
Symbol table '\.symtab' contains .* entries:
+Num: +Value +Size +Type +Bind +Vis +Ndx +Name
#objdump: -dr
#name: TLS
# This test is only valid on ELF based ports.
-#not-target: *-*-pe *-*-wince
+#notarget: *-*-pe *-*-wince
# VxWorks needs a special variant of this file.
#skip: *-*-vxworks*
#objdump: -dr
#name: TLS
# This test is only valid on ELF based ports.
-#not-target: *-*-pe *-*-wince
+#notarget: *-*-pe *-*-wince
# This is the VxWorks variant of this file.
#source: tls.s
-#not-skip: *-*-vxworks*
+#noskip: *-*-vxworks*
# Test generation of TLS relocations
#name: Undefined local label error
# COFF and aout based ports, except Windows CE,
# use a different naming convention for local labels.
-#not-skip: *-unknown-pe
+#noskip: *-unknown-pe
#error-output: undefined_coff.l
#objdump: -sr
#name: Unwind table generation
# This test is only valid on ELF based ports.
-#not-target: *-*-pe *-*-wince
+#notarget: *-*-pe *-*-wince
# VxWorks needs a special variant of this file.
#skip: *-*-vxworks*
#name: Unwind table generation
# This is the VxWorks variant of this file.
#source: unwind.s
-#not-skip: *-*-vxworks*
+#noskip: *-*-vxworks*
.*: file format.*
# objdump: -dr --prefix-addresses --show-raw-insn
# as: -meabi=4 --fix-v4bx
# This test is only valid on ELF based ports.
-#not-target: *-*-pe *-*-wince
+#notarget: *-*-pe *-*-wince
.*: +file format .*arm.*
#name: VFMA decoding
#as: -mcpu=arm7m
# This test is only valid on ELF based ports.
-#not-target: *-*-pe *-*-wince
+#notarget: *-*-pe *-*-wince
# Test VFMA instruction disassembly
# source: vldm.s
# objdump: -dr --prefix-addresses --show-raw-insn
# This test is only valid on ELF based ports.
-#not-target: *-*-pe *-*-wince
+#notarget: *-*-pe *-*-wince
.*: +file format .*arm.*
# as:
# objdump: -dr
# This test is only valid on ELF based ports.
-#not-target: *-*-pe *-*-wince *-*-vxworks
+#notarget: *-*-pe *-*-wince *-*-vxworks
.*: +file format .*arm.*
# as:
# error-output: weakdef-2.l
# This test is only valid on ELF based ports.
-#not-target: *-*-pe *-*-wince
+#notarget: *-*-pe *-*-wince
#name: ARM WinCE basic tests
#as: -mcpu=arm7m -EL -mccs
#source: wince.s
-#not-skip: *-wince-*
+#noskip: *-wince-*
# Some WinCE specific tests.
#as: -mcpu=arm7m -EL
#source: inst.s
# inst.d is used for non-WinCE targets.
-#not-skip: *-wince-*
+#noskip: *-wince-*
# This file is the same as inst.d except that the BL
# instructions have not had a -8 bias inserted.
#readelf: -x .data
#name: bignum byte values
-#not-target: rx-*
+#notarget: rx-*
# The RX target sometimes calls its data section D_1.
#
# Test that 8-bit and 16-bit constants can be specified via bignums.
#source: common5a.s
#as:
#error-output: common5a.l
-#not-target: alpha-*-*
+#notarget: alpha-*-*
# The Alpha target uses its own .set pseudo-insn.
#source: common5b.s
#as:
#error-output: common5b.l
-#not-target: alpha-*-*
+#notarget: alpha-*-*
# The Alpha target uses its own .set pseudo-insn.
#source: common5c.s
#as:
#error-output: common5a.l
-#not-target: alpha-*-*
+#notarget: alpha-*-*
# The Alpha target uses its own .set pseudo-insn.
#source: common5d.s
#as:
#error-output: common5b.l
-#not-target: alpha-*-*
+#notarget: alpha-*-*
# The Alpha target uses its own .set pseudo-insn.
#as: --compress-debug-sections
#readelf: -w
#name: DWARF2 1
-#not-target: ia64-*-* m68hc1*-*-* m681*-*-*
+#notarget: ia64-*-* m68hc1*-*-* m681*-*-*
Contents of the .[z]?debug_info section:
#error-output: dwarf2-10.l
# The mep target tries to relay code sections which breaks symbolic view computations.
# The tile targets require 8-byte instructions, but the test only simulates 4-byte instructions.
-#not-target: mep-* tile*-*
+#notarget: mep-* tile*-*
# The am33 avr cr16 crx ft32 mn10 msp430 nds32 pru rl78 and xtensa targets do not evaluate the subtraction of symbols at assembly time.
# The riscv targets do not support the subtraction of symbols.
# The tile targets require 8-byte instructions, but the test only simulates 4-byte instructions.
-#not-target: am3*-* avr-* cr16-* crx-* ft32*-* m32c-* mn10*-* msp430-* nds32*-* pru-* riscv*-* rl78-* tile*-* xtensa-*
+#notarget: am3*-* avr-* cr16-* crx-* ft32*-* m32c-* mn10*-* msp430-* nds32*-* pru-* riscv*-* rl78-* tile*-* xtensa-*
Contents of the \.debug_line section:
# The am33 avr cr16 crx ft32 mn10 msp430 nds32 pru rl78 and xtensa targets do not evaluate the subtraction of symbols at assembly time.
# The riscv targets do not support the subtraction of symbols.
# The tile targets require 8-byte instructions, but the test only simulates 4-byte instructions.
-#not-target: am3*-* avr-* cr16-* crx-* ft32-* mn10*-* msp430-* nds32*-* pru-* riscv*-* rl78-* tile*-* xtensa-*
+#notarget: am3*-* avr-* cr16-* crx-* ft32-* mn10*-* msp430-* nds32*-* pru-* riscv*-* rl78-* tile*-* xtensa-*
Hex dump of section '\.rodata':
# The am33 avr cr16 crx ft32 mn10 msp430 nds32 pru rl78 and xtensa targets do not evaluate the subtraction of symbols at assembly time.
# The riscv targets do not support the subtraction of symbols.
# The tile targets require 8-byte instructions, but the test only simulates 4-byte instructions.
-#not-target: am3*-* avr-* cr16-* crx-* ft32*-* mn10*-* msp430-* nds32*-* pru-* riscv*-* rl78-* tile*-* xtensa-*
+#notarget: am3*-* avr-* cr16-* crx-* ft32*-* mn10*-* msp430-* nds32*-* pru-* riscv*-* rl78-* tile*-* xtensa-*
Hex dump of section '\.rodata':
0x00000000 01 *.*
# The am33 avr cr16 crx mn10 ft32 msp430 nds32 pru rl78 and xtensa targets do not evaluate the subtraction of symbols at assembly time
# The riscv targets do not support the subtraction of symbols.
# The tile targets require 8-byte instructions, but the test only simulates 4-byte instructions.
-#not-target: am3*-* avr-* cr16-* crx-* ft32*-* mn10*-* msp430-* nds32*-* pru-* riscv*-* rl78-* tile*-* xtensa-*
+#notarget: am3*-* avr-* cr16-* crx-* ft32*-* mn10*-* msp430-* nds32*-* pru-* riscv*-* rl78-* tile*-* xtensa-*
Hex dump of section '\.rodata':
0x00000000 01 *.*
# The am33 avr cr16 crx ft32 mn10 msp430 nds32 pru rl78 and xtensa targets do not evaluate the subtraction of symbols at assembly time.
# The riscv targets do not support the subtraction of symbols.
# The tile targets require 8-byte instructions, but the test only simulates 4-byte instructions.
-#not-target: am3*-* avr-* cr16-* crx-* ft32*-* mn10*-* msp430-* nds32*-* pru-* riscv*-* rl78-* tile*-* xtensa-*
+#notarget: am3*-* avr-* cr16-* crx-* ft32*-* mn10*-* msp430-* nds32*-* pru-* riscv*-* rl78-* tile*-* xtensa-*
Hex dump of section '\.rodata':
0x00000000 01 *.*
# The mep target tries to relay code sections which breaks symbolic view computations.
# The riscv targets do not support the subtraction of symbols.
# The tile targets require 8-byte instructions, but the test only simulates 4-byte instructions.
-#not-target: am3*-* avr-* cr16-* crx-* ft32*-* mep-* mn10*-* msp430-* nds32*-* pru-* riscv*-* rl78-* tile*-* xtensa-*
+#notarget: am3*-* avr-* cr16-* crx-* ft32*-* mep-* mn10*-* msp430-* nds32*-* pru-* riscv*-* rl78-* tile*-* xtensa-*
Hex dump of section '\.rodata':
0x00000000 01 *.*
# The mep target tries to relay code sections which breaks symbolic view computations.
# The riscv targets do not support the subtraction of symbols.
# The tile targets require 8-byte instructions, but the test only simulates 4-byte instructions.
-#not-target: am3*-* avr-* cr16-* crx-* ft32*-* mep-* mn10*-* msp430-* nds32*-* pru-* riscv*-* rl78-* tile*-* xtensa-*
+#notarget: am3*-* avr-* cr16-* crx-* ft32*-* mep-* mn10*-* msp430-* nds32*-* pru-* riscv*-* rl78-* tile*-* xtensa-*
Hex dump of section '\.rodata':
0x00000000 00 *.*
# The am33 avr cr16 crx ft32 mn10 msp430 nds32 pru rl78 and xtensa targets do not evaluate the subtraction of symbols at assembly time.
# The riscv targets do not support the subtraction of symbols.
# The tile targets require 8-byte instructions, but the test only simulates 4-byte instructions.
-#not-target: am3*-* avr-* cr16-* crx-* ft32*-* mn10*-* msp430-* nds32*-* pru-* riscv*-* rl78-* tile*-* xtensa-*
+#notarget: am3*-* avr-* cr16-* crx-* ft32*-* mn10*-* msp430-* nds32*-* pru-* riscv*-* rl78-* tile*-* xtensa-*
Hex dump of section '\.rodata':
0x00000000 0100 *.*
#as: --compress-debug-sections
#readelf: -w
#name: DWARF2 2
-#not-target: ia64-*-* m68hc1*-*-* m681*-*-*
+#notarget: ia64-*-* m68hc1*-*-* m681*-*-*
Contents of the .[z]?debug_info section:
#readelf: -wl
#name: DWARF2 3
-#not-target: ft32*-* ia64-*-* h8300-*-*
+#notarget: ft32*-* ia64-*-* h8300-*-*
Raw dump of debug contents of section \.z?debug_line:
#as: --compress-debug-sections
#readelf: -w
#name: DWARF2 4
-#not-target: ia64-*-*
+#notarget: ia64-*-*
Contents of the .[z]?debug_abbrev section:
# The mep target tries to relay code sections which breaks symbolic view computations.
# The riscv targets do not support the subtraction of symbols.
# The tile targets require 8-byte instructions, but the test only simulates 4-byte instructions.
-#not-target: am3*-* avr-* cr16-* crx-* ft32*-* mep-* mn10*-* msp430-* nds32*-* pru-* riscv*-* rl78-* rx-* tile*-* xtensa-*
+#notarget: am3*-* avr-* cr16-* crx-* ft32*-* mep-* mn10*-* msp430-* nds32*-* pru-* riscv*-* rl78-* rx-* tile*-* xtensa-*
Hex dump of section '\.rodata':
0x00000000 01010201 010203 *.*
#readelf: -wlL
#name: DWARF2 6
# These targets either do not support or do not evaluate the subtraction of symbols at assembly time.
-#not-target: am3*-* avr-* cr16-* crx-* mn10*-* msp430-* nds32*-* pru-* riscv*-* rl78-* xtensa-*
+#notarget: am3*-* avr-* cr16-* crx-* mn10*-* msp430-* nds32*-* pru-* riscv*-* rl78-* xtensa-*
Raw dump of debug contents of section .debug_line:
# The am33 avr cr16 crx ft32 mn10 msp430 nds32 pru rl78 and xtensa targets do not evaluate the subtraction of symbols at assembly time.
# The riscv targets do not support the subtraction of symbols.
# The tile targets require 8-byte instructions, but the test only simulates 4-byte instructions.
-#not-target: am3*-* avr-* cr16-* crx-* ft32*-* mn10*-* msp430-* nds32*-* pru-* riscv*-* rl78-* tile*-* xtensa-*
+#notarget: am3*-* avr-* cr16-* crx-* ft32*-* mn10*-* msp430-* nds32*-* pru-* riscv*-* rl78-* tile*-* xtensa-*
Hex dump of section '\.rodata':
0x00000000 01 *.*
#name: DWARF2 8
#error-output: dwarf2-8.l
# The tile targets require 8-byte instructions, but the test only simulates 4-byte instructions.
-#not-target: tile*-*
+#notarget: tile*-*
#name: DWARF2 9
#error-output: dwarf2-9.l
# The tile targets require 8-byte instructions, but the test only simulates 4-byte instructions.
-#not-target: tile*-*
+#notarget: tile*-*
#readelf: -sW
#name: group section name
#source: group0.s
-#not-target: *-*-solaris*
+#notarget: *-*-solaris*
#...
.*NOTYPE[ ]+LOCAL[ ]+DEFAULT[ ]+[0-9]+[ ]+\.foo_group
#name: group section with multiple sections of same name
#source: group1.s
# The RX port uses non-standard section names.
-#not-target: rx-*
+#notarget: rx-*
#...
[ ]*\[.*\][ ]+\.group[ ]+GROUP.*
#name: debug info in group section and non-group section with same name
#source: group2.s
# The RX port uses non-standard section names.
-#not-target: rx-*
+#notarget: rx-*
#...
[ ]*\[.*\][ ]+\.group[ ]+GROUP.*
#name: automatic section group a
#source: groupauto.s
# The RX port uses non-standard section names.
-#not-target: rx-*
+#notarget: rx-*
#...
[ ]*\[.*\][ ]+\.group[ ]+GROUP.*
#readelf: -s
#name: .set with IFUNC
-#not-target: alpha*
+#notarget: alpha*
#...
[ ]+[0-9]+:[ ]+[0-9a-f]+[ ]+[0-9]+[ ]+IFUNC[ ]+GLOBAL[ ]+DEFAULT[ ]+[1-9] __GI_foo
#skip: rx-*-*
# RISC-V handles alignment via linker relaxation, so object files don't have
# the expected alignment.
-#not-target: riscv*-*-*
+#notarget: riscv*-*-*
#...
\[ .\] .text[ ]+PROGBITS[ ]+0+00 0+[0-9a-f]+ 0+0(1|4|5) 00 AX 0 0 16
#readelf: --sections
#name: label arithmetic with multiple same-name sections
# The RX port uses non-standard section names.
-#not-target: rx-*
+#notarget: rx-*
#...
[ ]*\[.*\][ ]+\.group[ ]+GROUP.*
#name: elf section7
# .pushsection always creates the named section, but the
# test harness translates ".text" into "P" for the RX...
-#not-target: rx-*
+#notarget: rx-*
.*: +file format .*
#readelf: -S -s -p .strtab
#name: Multibyte symbol names
# The following targets use an unusual .set syntax...
-#not-target: alpha*-*-* h8300-*-*
+#notarget: alpha*-*-* h8300-*-*
#...
Section Headers:
#objdump: --syms
#name: ELF symbol versioning
-#not-target: hppa64*-*-hpux*
+#notarget: hppa64*-*-hpux*
#
# The #... and #pass are there to match extra symbols inserted by
# some toolchains, eg the mips-elf port will add .reginfo and .ptrd
#as: -J -march=iamcu
#objdump: -dw
-#not-target: *-*-nacl*
+#notarget: *-*-nacl*
.*: +file format elf32-iamcu.*
#as: -J -march=iamcu
#objdump: -dw
-#not-target: *-*-nacl*
+#notarget: *-*-nacl*
.*: +file format elf32-iamcu.*
#as: -J -march=iamcu+nop
#objdump: -dw
-#not-target: *-*-nacl*
+#notarget: *-*-nacl*
.*: +file format elf32-iamcu.*
#as: -J -march=iamcu+sse2+387
#objdump: -dw
-#not-target: *-*-nacl*
+#notarget: *-*-nacl*
.*: +file format elf32-iamcu.*
#as: -J -march=iamcu -I${srcdir}/$subdir
#objdump: -dw
-#not-target: *-*-nacl*
+#notarget: *-*-nacl*
.*: +file format elf32-iamcu.*
#source: ../rex.s
#objdump: -dw
#name: x86-64 (ILP32) manual rex prefix use
-#not-target: x86_64-*-elf*
+#notarget: x86_64-*-elf*
.*: +file format .*
#as: -J -march=k1om
#objdump: -dw
#name: k1om
-#not-target: *-*-nacl*
+#notarget: *-*-nacl*
.*: +file format elf64-k1om.*
#as: -J -march=l1om
#objdump: -dw --insn-width=7
#name: l1om
-#not-target: *-*-nacl*
+#notarget: *-*-nacl*
.*: +file format elf64-l1om.*
#objdump: -dw
#name: x86-64 manual rex prefix use
-#not-target: x86_64-*-elf*
+#notarget: x86_64-*-elf*
.*: +file format .*
#objdump: -P section
-#not-target: x86_64-*-darwin*
+#notarget: x86_64-*-darwin*
.*: +file format mach-o.*
#...
Section: __symbol_stub __TEXT.*\(bfdname: .symbol_stub\)
#objdump: -r
#name: macro irp
#darwin (mach-o) reverses relocs.
-#not-target: *-*-darwin* nds32*-*-*
+#notarget: *-*-darwin* nds32*-*-*
.*: +file format .*
#objdump: -r
#name: nested irp/irpc/rept
# darwin (mach-o) reverse relocs.
-#not-target: *-*-darwin*
+#notarget: *-*-darwin*
.*: +file format .*
#objdump: -r
#name: macro rept
#darwin (mach-o) reverses relocs.
-#not-target: *-*-darwin* nds32*-*-*
+#notarget: *-*-darwin* nds32*-*-*
.*: +file format .*
#objdump: -s -j .text
#name: semi
-#not-target: m32c-*
+#notarget: m32c-*
.*: .*
#objdump: -r
#name: macro test 2
# darwin(mach-o) reverses the order of relocs.
-#not-target: *-*-darwin*
+#notarget: *-*-darwin*
.*: +file format .*
#objdump: -r
#name: macro test 3
-#not-target: nds32*-*-*
+#notarget: nds32*-*-*
.*: +file format .*
#objdump: -r
#name: macro vararg
# darwin (mach-o) reverses relocs.
-#not-target: *-*-darwin*
+#notarget: *-*-darwin*
.*: +file format .*
#objdump: -dr --prefix-addresses --show-raw-insn
#name: MIPS JALR relocation against local symbol
#as: -32
-#not-target: *-*-irix*
+#notarget: *-*-irix*
.*: +file format .*mips.*
#objdump: -dr --prefix-addresses --show-raw-insn
#name: MIPS JALR relocation against local symbol
#as: -32
-#not-target: *-*-irix*
+#notarget: *-*-irix*
#source: jal-svr4pic-local.s
.*: +file format .*mips.*
#objdump: -dr --prefix-addresses --show-raw-insn
#name: MIPS JALR relocation against local symbol
#as: -32
-#not-target: *-*-irix*
+#notarget: *-*-irix*
#source: jal-svr4pic-local.s
.*: +file format .*mips.*
#objdump: -dr --prefix-addresses --show-raw-insn
#name: MIPS JALR relocation against local symbol
#as: -32
-#not-target: *-*-irix*
+#notarget: *-*-irix*
#source: jal-svr4pic-local.s
#dump: mips1@jal-svr4pic-local.d
#objdump: -s -j .text
#name: PowerPC .machine test
-#not-target: *-*-pe *-*-winnt* *-*-cygwin*
+#notarget: *-*-pe *-*-winnt* *-*-cygwin*
.*
# of them, the test will be run, otherwise it will be marked
# unsupported.
#
-# not-target: GLOB|PROC ...
+# notarget: GLOB|PROC ...
# Do not run this test on a specified list of targets. Again, each
# glob in the space-separated list is passed to "istarget" and each
# proc is called as a TCL procedure, and the test is run if it
# unsupported.
#
# skip: GLOB|PROC ...
-# not-skip: GLOB|PROC ...
-# These are exactly the same as "not-target" and "target",
+# noskip: GLOB|PROC ...
+# These are exactly the same as "notarget" and "target",
# respectively, except that they do nothing at all if the check
# fails. They should only be used in groups, to construct a single
# test which is run on all targets but with variant options or
set opts(error-output) {}
set opts(warning) {}
set opts(target) {}
- set opts(not-target) {}
+ set opts(notarget) {}
set opts(skip) {}
- set opts(not-skip) {}
+ set opts(noskip) {}
set opts(xfail) {}
set opts(section-subst) {}
}
# Handle skipping the test on specified targets.
- # You can have both skip/not-skip and target/not-target, but you can't
- # have both skip and not-skip, or target and not-target, in the same file.
+ # You can have both skip/noskip and target/notarget, but you can't
+ # have both skip and noskip, or target and notarget, in the same file.
if { $opts(skip) != "" } then {
- if { $opts(not-skip) != "" } then {
- perror "$testname: mixing skip and not-skip directives is invalid"
+ if { $opts(noskip) != "" } then {
+ perror "$testname: mixing skip and noskip directives is invalid"
unresolved $testname
return
}
if {[match_target $glob]} { return }
}
}
- if { $opts(not-skip) != "" } then {
+ if { $opts(noskip) != "" } then {
set skip 1
- foreach glob $opts(not-skip) {
+ foreach glob $opts(noskip) {
if {[match_target $glob]} {
set skip 0
break
if {$skip} { return }
}
if { $opts(target) != "" } then {
- if { $opts(not-target) != "" } then {
- perror "$testname: mixing target and not-target directives is invalid"
+ if { $opts(notarget) != "" } then {
+ perror "$testname: mixing target and notarget directives is invalid"
unresolved $testname
return
}
return
}
}
- if { $opts(not-target) != "" } then {
- foreach glob $opts(not-target) {
+ if { $opts(notarget) != "" } then {
+ foreach glob $opts(notarget) {
if {[match_target $glob]} {
unsupported $testname
return
projects / deliverable / binutils-gdb.git / commitdiff
