RISC-V: Add riscv-*-* configure support, and minor cleanup.

	bfd/
	* config.bfd (riscv32*-*-*): Renamed from riscv32-*-*.
	(riscv64*-*-*): Likewise.
	(riscv-*-*): Add as an alias for riscv32*-*-*.

	ld/
	* configure.tgt (riscv-*-*): Add as an alias for riscv32*-*-*.

diff --git a/bfd/ChangeLog b/bfd/ChangeLog
index 36e12e785dc56ffcd744cede6d8dc288e7791221..650258ef8b905e1ba51daa91bf037cd05445ffb9 100644 (file)
--- a/bfd/ChangeLog
+++ b/bfd/ChangeLog
@@ -1,3 +1,9 @@
+2018-07-05  Jim Wilson  <jimw@sifive.com>
+
+       * config.bfd (riscv32*-*-*): Renamed from riscv32-*-*.
+       (riscv64*-*-*): Likewise.
+       (riscv-*-*): Add as an alias for riscv32*-*-*.
+
 2018-07-05  H.J. Lu  <hongjiu.lu@intel.com>
 
        PR ld/23372

diff --git a/bfd/config.bfd b/bfd/config.bfd
index f8ca72b332396939c7c04a8774ce4c54f5a82d42..6391f35684edae49b150068fdff90ef33672cbbc 100644 (file)
--- a/bfd/config.bfd
+++ b/bfd/config.bfd
@@ -1174,12 +1174,12 @@ case "${targ}" in
     ;;
 
 #ifdef BFD64
-  riscv32-*-*)
+  riscv-*-* | riscv32*-*-*)
     targ_defvec=riscv_elf32_vec
     targ_selvecs="riscv_elf32_vec riscv_elf64_vec"
     want64=true
     ;;
-  riscv64-*-*)
+  riscv64*-*-*)
     targ_defvec=riscv_elf64_vec
     targ_selvecs="riscv_elf32_vec riscv_elf64_vec"
     want64=true

diff --git a/ld/ChangeLog b/ld/ChangeLog
index e3fc4e84409ce484dcd19185dbfea997307552b5..b9bfc2b1f76c02d9da8358fcc0d75b28ea17fbf4 100644 (file)
--- a/ld/ChangeLog
+++ b/ld/ChangeLog
@@ -1,3 +1,7 @@
+2018-07-05  Jim Wilson  <jimw@sifive.com>
+
+       * configure.tgt (riscv-*-*): Add as an alias for riscv32*-*-*.
+
 2018-07-05  Maciej W. Rozycki  <macro@mips.com>
 
        * testsuite/ld-mips-elf/mips-elf.exp: Replace remaining calls to

diff --git a/ld/configure.tgt b/ld/configure.tgt
index 3386c3d928711e484cfe2dd87afc49f6bf308dbb..fad8b2e5c846d6d50402ea678b10315e05323732 100644 (file)
--- a/ld/configure.tgt
+++ b/ld/configure.tgt
@@ -632,7 +632,8 @@ pru*-*-*)           targ_emul=pruelf ;;
 riscv32*-*-linux*)     targ_emul=elf32lriscv
                        targ_extra_emuls="elf32lriscv_ilp32f elf32lriscv_ilp32 elf64lriscv elf64lriscv_lp64f elf64lriscv_lp64"
                        targ_extra_libpath=$targ_extra_emuls ;;
-riscv32*-*-*)          targ_emul=elf32lriscv
+riscv-*-* | riscv32*-*-*)
+                       targ_emul=elf32lriscv
                        targ_extra_emuls="elf64lriscv"
                        targ_extra_libpath=$targ_extra_emuls ;;
 riscv64*-*-linux*)     targ_emul=elf64lriscv