ASoC: Support CLK_DSP in WM8903
authorMark Brown <broonie@opensource.wolfsonmicro.com>
Wed, 22 Apr 2009 19:04:44 +0000 (20:04 +0100)
committerMark Brown <broonie@opensource.wolfsonmicro.com>
Wed, 22 Apr 2009 20:37:24 +0000 (21:37 +0100)
CLK_DSP provides a master clock for the DAC and ADC related functionality
on the device.

Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
sound/soc/codecs/wm8903.c

index a3a489da008f4c08f3047418ecb57e1e5d1e46df..27c8b94c0551c3579c69f75161f482546ebb06b0 100644 (file)
@@ -846,6 +846,7 @@ SND_SOC_DAPM_PGA("Right Speaker PGA", WM8903_POWER_MANAGEMENT_5, 0, 0,
 
 SND_SOC_DAPM_SUPPLY("Charge Pump", WM8903_CHARGE_PUMP_0, 0, 0,
                    wm8903_cp_event, SND_SOC_DAPM_POST_PMU),
+SND_SOC_DAPM_SUPPLY("CLK_DSP", WM8903_CLOCK_RATES_2, 1, 0, NULL, 0),
 };
 
 static const struct snd_soc_dapm_route intercon[] = {
@@ -891,7 +892,12 @@ static const struct snd_soc_dapm_route intercon[] = {
        { "Right Input PGA", NULL, "Right Input Mode Mux" },
 
        { "ADCL", NULL, "Left Input PGA" },
+       { "ADCL", NULL, "CLK_DSP" },
        { "ADCR", NULL, "Right Input PGA" },
+       { "ADCR", NULL, "CLK_DSP" },
+
+       { "DACL", NULL, "CLK_DSP" },
+       { "DACR", NULL, "CLK_DSP" },
 
        { "Left Output Mixer", "Left Bypass Switch", "Left Input PGA" },
        { "Left Output Mixer", "Right Bypass Switch", "Right Input PGA" },
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