Fix RL78 disassembly of DE+offset addressing to always show the offset, even when...
authorVinay Kumar <vinay.g@kpit.com>
Tue, 27 Oct 2015 15:24:40 +0000 (15:24 +0000)
committerNick Clifton <nickc@redhat.com>
Tue, 27 Oct 2015 15:24:40 +0000 (15:24 +0000)
PR binutils/19159
opcodes * rl78-decode.opc (MOV): Added offset to DE register in index
addressing mode.
* rl78-decode.c: Regenerate.

test * gas/rl78/pr19159.s: New test source file.
* gas/rl78/pr19159.d: New test case.
* gas/rl78/rl78.exp: Run the new test.

gas/testsuite/ChangeLog
gas/testsuite/gas/rl78/pr19157.d
gas/testsuite/gas/rl78/pr19159.d [new file with mode: 0644]
gas/testsuite/gas/rl78/pr19159.s [new file with mode: 0644]
gas/testsuite/gas/rl78/rl78.exp
opcodes/ChangeLog
opcodes/rl78-decode.c
opcodes/rl78-decode.opc

index 08303ee5432e1e9249b19928bdd2a63c5877eb1a..02b82dfd8f48cc0c7cab3fcb518e1ed5a2338894 100644 (file)
@@ -1,3 +1,10 @@
+2015-10-27  Nick Clifton  <nickc@redhat.com>
+
+       PR binutils/19159
+       * gas/rl78/pr19159.s: New test source file.
+       * gas/rl78/pr19159.d: New test case.
+       * gas/rl78/rl78.exp: Run the new test.
+
 2015-10-27  Nick Clifton  <nickc@redhat.com>
 
        PR binutils/19158
index 9bbbc100bd8f1241da32139ed9a0b5b3e64c49ca..541645760e11e88bfec450cfe30c3fcd2d838364 100644 (file)
@@ -1,5 +1,5 @@
 #objdump: -d --prefix-addresses --show-raw-insn
-#name: PR19157: RL78: zero offset omitted
+#name: PR19157: RL78: zero offset omitted in stack based addressing
 
 .*: +file format .*rl78.*
 
diff --git a/gas/testsuite/gas/rl78/pr19159.d b/gas/testsuite/gas/rl78/pr19159.d
new file mode 100644 (file)
index 0000000..f9bfd24
--- /dev/null
@@ -0,0 +1,15 @@
+#objdump: -d --prefix-addresses --show-raw-insn
+#name: PR19159: RL78: zero offset omitted in DE based addressing
+
+.*: +file format .*rl78.*
+
+Disassembly of section .text:
+0x0+000 89[     ]+mov[  ]+a, \[de\]
+0x0+001 8a 00[  ]+mov[  ]+a, \[de\+0\]
+0x0+003 8a 01[  ]+mov[  ]+a, \[de\+1\]
+0x0+005 99[     ]+mov[  ]+\[de], a
+0x0+006 9a 00[  ]+mov[  ]+\[de\+0\], a
+0x0+008 9a 01[  ]+mov[  ]+\[de\+1\], a
+0x0+00a a9[     ]+movw[         ]+ax, \[de\]
+0x0+00b aa 00[  ]+movw[         ]+ax, \[de\+0\]
+0x0+00d aa 01[  ]+movw[         ]+ax, \[de\+1\]
diff --git a/gas/testsuite/gas/rl78/pr19159.s b/gas/testsuite/gas/rl78/pr19159.s
new file mode 100644 (file)
index 0000000..b4be196
--- /dev/null
@@ -0,0 +1,13 @@
+       .text
+
+       mov a, [de]
+       mov a, [de + 0]
+       mov a, [de + 1]
+       mov [de], a
+       mov [de + 0], a
+       mov [de + 1], a
+       movw ax, [de]
+       movw ax, [de + 0]
+       movw ax, [de + 1]
+
+       .end
index 2ec02097a44ca02b2599c57d6f277afe70841306..e3d2c40fc224920a4bcce2f02e5dad992773f7ff 100644 (file)
@@ -21,4 +21,5 @@
 if [expr [istarget "rl78-*-*"]]  then {
     run_dump_test "pr19157"
     run_dump_test "pr19158"
+    run_dump_test "pr19159"
 }
index dc285c14dcacccc87c5575e2f50efa71db89cab8..d0f77716a71f45065e75960a571732687ce72fd3 100644 (file)
@@ -1,3 +1,10 @@
+2015-10-27  Vinay  <Vinay.G@kpit.com>
+
+       PR binutils/19159
+       * rl78-decode.opc (MOV): Added offset to DE register in index
+       addressing mode.
+       * rl78-decode.c: Regenerate.
+
 2015-10-27  Vinay Kumar  <vinay.g@kpit.com>
 
        PR binutils/19158
index 902e5fbb4965c6ffee8491afdab483ca0ae98150..fd1fd77ee7d188ec0b5c23f6bcc4af78e97d075c 100644 (file)
@@ -2537,14 +2537,14 @@ rl78_decode_opcode (unsigned long pc AU,
             break;
           case 0xaf:
               {
-                /** 0110 0001 1010 1111                xch     %0, %e                        */
+                /** 0110 0001 1010 1111                xch     %0, %ea1                        */
                 if (trace)
                   {
                     printf ("\033[33m%s\033[0m  %02x %02x\n",
-                           "/** 0110 0001 1010 1111            xch     %0, %e                        */",
+                           "/** 0110 0001 1010 1111            xch     %0, %ea1                        */",
                            op[0], op[1]);
                   }
-                SYNTAX("xch    %0, %e1");
+                SYNTAX("xch    %0, %ea1");
 #line 1210 "rl78-decode.opc"
                 ID(xch); DR(A); SM(DE, IMMU(1));
 
@@ -4361,14 +4361,14 @@ rl78_decode_opcode (unsigned long pc AU,
       break;
     case 0x8a:
         {
-          /** 1000 1010                        mov     %0, %e                        */
+          /** 1000 1010                        mov     %0, %ea1                        */
           if (trace)
             {
               printf ("\033[33m%s\033[0m  %02x\n",
-                     "/** 1000 1010                    mov     %0, %e                        */",
+                     "/** 1000 1010                    mov     %0, %ea1                        */",
                      op[0]);
             }
-          SYNTAX("mov  %0, %e1");
+          SYNTAX("mov  %0, %ea1");
 #line 651 "rl78-decode.opc"
           ID(mov); DR(A); SM(DE, IMMU(1));
 
@@ -4506,14 +4506,14 @@ rl78_decode_opcode (unsigned long pc AU,
       break;
     case 0x9a:
         {
-          /** 1001 1010                        mov     %e0, %1                         */
+          /** 1001 1010                        mov     %ea0, %1                        */
           if (trace)
             {
               printf ("\033[33m%s\033[0m  %02x\n",
-                     "/** 1001 1010                    mov     %e0, %1                         */",
+                     "/** 1001 1010                    mov     %ea0, %1                        */",
                      op[0]);
             }
-          SYNTAX("mov  %e0, %1");
+          SYNTAX("mov  %ea0, %1");
 #line 621 "rl78-decode.opc"
           ID(mov); DM(DE, IMMU(1)); SR(A);
 
@@ -4713,14 +4713,14 @@ rl78_decode_opcode (unsigned long pc AU,
       break;
     case 0xaa:
         {
-          /** 1010 1010                        movw    %0, %e                        */
+          /** 1010 1010                        movw    %0, %ea1                        */
           if (trace)
             {
               printf ("\033[33m%s\033[0m  %02x\n",
-                     "/** 1010 1010                    movw    %0, %e                        */",
+                     "/** 1010 1010                    movw    %0, %ea1                        */",
                      op[0]);
             }
-          SYNTAX("movw %0, %e1");
+          SYNTAX("movw %0, %ea1");
 #line 841 "rl78-decode.opc"
           ID(mov); W(); DR(AX); SM(DE, IMMU(1));
 
@@ -4919,14 +4919,14 @@ rl78_decode_opcode (unsigned long pc AU,
       break;
     case 0xba:
         {
-          /** 1011 1010                        movw    %e0, %1                         */
+          /** 1011 1010                        movw    %ea0, %1                        */
           if (trace)
             {
               printf ("\033[33m%s\033[0m  %02x\n",
-                     "/** 1011 1010                    movw    %e0, %1                         */",
+                     "/** 1011 1010                    movw    %ea0, %1                        */",
                      op[0]);
             }
-          SYNTAX("movw %e0, %1");
+          SYNTAX("movw %ea0, %1");
 #line 822 "rl78-decode.opc"
           ID(mov); W(); DM(DE, IMMU(1)); SR(AX);
 
@@ -5083,14 +5083,14 @@ rl78_decode_opcode (unsigned long pc AU,
       break;
     case 0xca:
         {
-          /** 1100 1010                        mov     %e0, #%1                        */
+          /** 1100 1010                        mov     %ea0, #%1                       */
           if (trace)
             {
               printf ("\033[33m%s\033[0m  %02x\n",
-                     "/** 1100 1010                    mov     %e0, #%1                        */",
+                     "/** 1100 1010                    mov     %ea0, #%1                       */",
                      op[0]);
             }
-          SYNTAX("mov  %e0, #%1");
+          SYNTAX("mov  %ea0, #%1");
 #line 618 "rl78-decode.opc"
           ID(mov); DM(DE, IMMU(1)); SC(IMMU(1));
 
index 28362c1ebfb81143e4cfe8606ba98574e555bdd3..6e849598ed1a0e7f814dbab33f0c8168e3e1bb0e 100644 (file)
@@ -614,10 +614,10 @@ rl78_decode_opcode (unsigned long pc AU,
 /** 1001 1001                  mov     %e0, %1                         */
   ID(mov); DM(DE, 0); SR(A);
 
-/** 1100 1010                  mov     %e0, #%1                        */
+/** 1100 1010                  mov     %ea0, #%1                       */
   ID(mov); DM(DE, IMMU(1)); SC(IMMU(1));
 
-/** 1001 1010                  mov     %e0, %1                         */
+/** 1001 1010                  mov     %ea0, %1                                */
   ID(mov); DM(DE, IMMU(1)); SR(A);
 
 /** 1001 1011                  mov     %e0, %1                         */
@@ -647,7 +647,7 @@ rl78_decode_opcode (unsigned long pc AU,
 /** 1000 1001                  mov     %0, %e1                         */
   ID(mov); DR(A); SM(DE, 0);
 
-/** 1000 1010                  mov     %0, %e                        */
+/** 1000 1010                  mov     %0, %ea1                        */
   ID(mov); DR(A); SM(DE, IMMU(1));
 
 /** 1000 1011                  mov     %0, %e1                         */
@@ -818,7 +818,7 @@ rl78_decode_opcode (unsigned long pc AU,
 /** 1011 1001                  movw    %e0, %1                         */
   ID(mov); W(); DM(DE, 0); SR(AX);
 
-/** 1011 1010                  movw    %e0, %1                         */
+/** 1011 1010                  movw    %ea0, %1                                */
   ID(mov); W(); DM(DE, IMMU(1)); SR(AX);
 
 /** 1011 1011                  movw    %e0, %1                         */
@@ -837,7 +837,7 @@ rl78_decode_opcode (unsigned long pc AU,
 /** 1010 1001                  movw    %0, %e1                         */
   ID(mov); W(); DR(AX); SM(DE, 0);
 
-/** 1010 1010                  movw    %0, %e1                         */
+/** 1010 1010                  movw    %0, %ea1                                */
   ID(mov); W(); DR(AX); SM(DE, IMMU(1));
 
 /** 1010 1011                  movw    %0, %e1                         */
@@ -1206,7 +1206,7 @@ rl78_decode_opcode (unsigned long pc AU,
 /** 0110 0001 1010 1110                xch     %0, %e1                         */
   ID(xch); DR(A); SM(DE, 0);
 
-/** 0110 0001 1010 1111                xch     %0, %e1                         */
+/** 0110 0001 1010 1111                xch     %0, %ea1                                */
   ID(xch); DR(A); SM(DE, IMMU(1));
 
 /** 0110 0001 1010 1100                xch     %0, %e1                         */
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