2002-02-24 Chris Demetriou <cgd@broadcom.com>

        * mips.igen: Fix formatting of calls to Unpredictable().

diff --git a/sim/mips/ChangeLog b/sim/mips/ChangeLog
index fd7abee66aeb73b3f3d8629f4421a084bb8088d7..bdfd8a81dc67bcceb7687ae01da61d6aec938923 100644 (file)
--- a/sim/mips/ChangeLog
+++ b/sim/mips/ChangeLog
@@ -1,3 +1,7 @@
+2002-02-24  Chris Demetriou  <cgd@broadcom.com>
+
+       * mips.igen: Fix formatting of calls to Unpredictable().
+
 2002-04-20  Andrew Cagney  <ac131313@redhat.com>
 
        * interp.c (sim_open): Revert previous change.

diff --git a/sim/mips/mips.igen b/sim/mips/mips.igen
index b3624dcfa1b4dcc773771e781ff25f5b5adb51be..7cb9d10af06343c6d1e2f9cb5e94e53b3d3f78be 100644 (file)
--- a/sim/mips/mips.igen
+++ b/sim/mips/mips.igen
@@ -925,7 +925,7 @@
   unsigned32 temp = GPR[RS];
   unsigned32 i, mask;
   if (RT != RD)
-    Unpredictable();
+    Unpredictable ();
   TRACE_ALU_INPUT1 (GPR[RS]);
   for (mask = ((unsigned32)1<<31), i = 0; i < 32; ++i)
     {
@@ -947,7 +947,7 @@
   unsigned32 temp = GPR[RS];
   unsigned32 i, mask;
   if (RT != RD)
-    Unpredictable();
+    Unpredictable ();
   TRACE_ALU_INPUT1 (GPR[RS]);
   for (mask = ((unsigned32)1<<31), i = 0; i < 32; ++i)
     {
@@ -1056,7 +1056,7 @@
   unsigned64 mask;
   check_u64 (SD_, instruction_0);
   if (RT != RD)
-    Unpredictable();
+    Unpredictable ();
   TRACE_ALU_INPUT1 (GPR[RS]);
   for (mask = ((unsigned64)1<<63), i = 0; i < 64; ++i)
     {
@@ -1079,7 +1079,7 @@
   unsigned64 mask;
   check_u64 (SD_, instruction_0);
   if (RT != RD)
-    Unpredictable();
+    Unpredictable ();
   TRACE_ALU_INPUT1 (GPR[RS]);
   for (mask = ((unsigned64)1<<63), i = 0; i < 64; ++i)
     {