x86/Intel: fix fallout from earlier template folding

While many templates allowing multiple suitably matching XMM/YMM/ZMM
operand sizes can be folded, a few need to be split in order to not
wrongly accept "xmmword ptr" operands when only XMM registers are
permitted (and memory operands are more narrow). Add a test case
validating this.

diff --git a/gas/ChangeLog b/gas/ChangeLog
index 1e0ebb2304d337d72455c3130b2ec129f2c4623c..00a4edc39aee8f2aca816ec626fa9cade45ae4f3 100644 (file)
--- a/gas/ChangeLog
+++ b/gas/ChangeLog
@@ -1,3 +1,11 @@
+2018-03-22  Jan Beulich  <jbeulich@suse.com>
+
+       * config/tc-i386.c (match_mem_size): Extend sub-xmmword
+       exceptions.
+       * testsuite/gas/i386/xmmword.l, testsuite/gas/i386/xmmword.s:
+       New.
+       * testsuite/gas/i386/i386.exp: Run new test.
+
 2018-03-22  Jan Beulich  <jbeulich@suse.com>
 
        * config/tc-i386.c (match_template): Also match 2nd and 4th

diff --git a/gas/config/tc-i386.c b/gas/config/tc-i386.c
index 01365f39f937c49506e571bd71abca7afca61366..8905de4f6a16cdc1bc77c6e439621338c6d53856 100644 (file)
--- a/gas/config/tc-i386.c
+++ b/gas/config/tc-i386.c
@@ -1937,10 +1937,13 @@ match_mem_size (const insn_template *t, unsigned int j)
                   && !t->operand_types[j].bitfield.fword)
               /* For scalar opcode templates to allow register and memory
                  operands at the same time, some special casing is needed
-                 here.  */
+                 here.  Also for v{,p}broadcast*, {,v}pmov{s,z}*, and
+                 down-conversion vpmov*.  */
               || ((t->operand_types[j].bitfield.regsimd
                    && !t->opcode_modifier.broadcast
-                   && (t->operand_types[j].bitfield.dword
+                   && (t->operand_types[j].bitfield.byte
+                       || t->operand_types[j].bitfield.word
+                       || t->operand_types[j].bitfield.dword
                        || t->operand_types[j].bitfield.qword))
                   ? (i.types[j].bitfield.xmmword
                      || i.types[j].bitfield.ymmword

diff --git a/gas/testsuite/gas/i386/i386.exp b/gas/testsuite/gas/i386/i386.exp
index 2fbb52ba39948d50c267e962bb60533ff9efc298..035d5108c76ab291f895cace3d3c32e8e135ebae 100644 (file)
--- a/gas/testsuite/gas/i386/i386.exp
+++ b/gas/testsuite/gas/i386/i386.exp
@@ -553,6 +553,7 @@ if [expr [istarget "i*86-*-*"] || [istarget "x86_64-*-*"]] then {
     run_list_test "string-bad" ""
     run_list_test "reg-bad" ""
     run_list_test "space1" "-al"
+    run_list_test "xmmword" ""
     run_dump_test rept
     run_dump_test pr19498
     run_list_test "nop-bad-1" ""

diff --git a/gas/testsuite/gas/i386/xmmword.l b/gas/testsuite/gas/i386/xmmword.l
new file mode 100644 (file)
index 0000000..ce3af8d
--- /dev/null
+++ b/gas/testsuite/gas/i386/xmmword.l
@@ -0,0 +1,101 @@
+.*: Assembler messages:
+.*:4: Error: .* `addsd'
+.*:5: Error: .* `vaddsd'
+.*:6: Error: .* `vaddsd'
+.*:8: Error: .* `addss'
+.*:9: Error: .* `vaddss'
+.*:10: Error: .* `vaddss'
+.*:12: Error: .* `vbroadcastf32x2'
+.*:13: Error: .* `vbroadcastf32x2'
+.*:15: Error: .* `vbroadcasti32x2'
+.*:16: Error: .* `vbroadcasti32x2'
+.*:17: Error: .* `vbroadcasti32x2'
+.*:19: Error: .* `vbroadcastsd'
+.*:20: Error: .* `vbroadcastsd'
+.*:21: Error: .* `vbroadcastsd'
+.*:23: Error: .* `vbroadcastss'
+.*:24: Error: .* `vbroadcastss'
+.*:25: Error: .* `vbroadcastss'
+.*:26: Error: .* `vbroadcastss'
+.*:27: Error: .* `vbroadcastss'
+.*:29: Error: .* `cvtdq2pd'
+.*:30: Error: .* `vcvtdq2pd'
+.*:31: Error: .* `vcvtdq2pd'
+.*:33: Error: .* `vcvtph2ps'
+.*:34: Error: .* `vcvtph2ps'
+.*:36: Error: .* `cvtps2pd'
+.*:37: Error: .* `vcvtps2pd'
+.*:38: Error: .* `vcvtps2pd'
+.*:40: Error: .* `vcvtps2ph'
+.*:41: Error: .* `vcvtps2ph'
+.*:43: Error: .* `vcvtudq2pd'
+.*:45: Error: .* `insertps'
+.*:46: Error: .* `vinsertps'
+.*:47: Error: .* `vinsertps'
+.*:49: Error: .* `movddup'
+.*:50: Error: .* `vmovddup'
+.*:51: Error: .* `vmovddup'
+.*:53: Error: .* `vpbroadcastb'
+.*:54: Error: .* `vpbroadcastb'
+.*:55: Error: .* `vpbroadcastb'
+.*:56: Error: .* `vpbroadcastb'
+.*:57: Error: .* `vpbroadcastb'
+.*:59: Error: .* `vpbroadcastd'
+.*:60: Error: .* `vpbroadcastd'
+.*:61: Error: .* `vpbroadcastd'
+.*:62: Error: .* `vpbroadcastd'
+.*:63: Error: .* `vpbroadcastd'
+.*:65: Error: .* `vpbroadcastq'
+.*:66: Error: .* `vpbroadcastq'
+.*:67: Error: .* `vpbroadcastq'
+.*:68: Error: .* `vpbroadcastq'
+.*:69: Error: .* `vpbroadcastq'
+.*:71: Error: .* `vpbroadcastw'
+.*:72: Error: .* `vpbroadcastw'
+.*:73: Error: .* `vpbroadcastw'
+.*:74: Error: .* `vpbroadcastw'
+.*:75: Error: .* `vpbroadcastw'
+.*:77: Error: .* `pmovsxbd'
+.*:78: Error: .* `vpmovsxbd'
+.*:79: Error: .* `vpmovsxbd'
+.*:80: Error: .* `vpmovsxbd'
+.*:81: Error: .* `vpmovsxbd'
+.*:83: Error: .* `pmovsxbq'
+.*:84: Error: .* `vpmovsxbq'
+.*:85: Error: .* `vpmovsxbq'
+.*:86: Error: .* `vpmovsxbq'
+.*:87: Error: .* `vpmovsxbq'
+.*:88: Error: .* `vpmovsxbq'
+.*:90: Error: .* `pmovsxdq'
+.*:91: Error: .* `vpmovsxdq'
+.*:92: Error: .* `vpmovsxdq'
+.*:94: Error: .* `pmovsxwd'
+.*:95: Error: .* `vpmovsxwd'
+.*:96: Error: .* `vpmovsxwd'
+.*:98: Error: .* `pmovsxwq'
+.*:99: Error: .* `vpmovsxwq'
+.*:100: Error: .* `vpmovsxwq'
+.*:101: Error: .* `vpmovsxwq'
+.*:102: Error: .* `vpmovsxwq'
+.*:104: Error: .* `pmovzxbd'
+.*:105: Error: .* `vpmovzxbd'
+.*:106: Error: .* `vpmovzxbd'
+.*:107: Error: .* `vpmovzxbd'
+.*:108: Error: .* `vpmovzxbd'
+.*:110: Error: .* `pmovzxbq'
+.*:111: Error: .* `vpmovzxbq'
+.*:112: Error: .* `vpmovzxbq'
+.*:113: Error: .* `vpmovzxbq'
+.*:114: Error: .* `vpmovzxbq'
+.*:115: Error: .* `vpmovzxbq'
+.*:117: Error: .* `pmovzxdq'
+.*:118: Error: .* `vpmovzxdq'
+.*:119: Error: .* `vpmovzxdq'
+.*:121: Error: .* `pmovzxwd'
+.*:122: Error: .* `vpmovzxwd'
+.*:123: Error: .* `vpmovzxwd'
+.*:125: Error: .* `pmovzxwq'
+.*:126: Error: .* `vpmovzxwq'
+.*:127: Error: .* `vpmovzxwq'
+.*:128: Error: .* `vpmovzxwq'
+.*:129: Error: .* `vpmovzxwq'

diff --git a/gas/testsuite/gas/i386/xmmword.s b/gas/testsuite/gas/i386/xmmword.s
new file mode 100644 (file)
index 0000000..47d2d8d
--- /dev/null
+++ b/gas/testsuite/gas/i386/xmmword.s
@@ -0,0 +1,129 @@
+       .text
+       .intel_syntax noprefix
+xmmword:
+       addsd           xmm0, xmmword ptr [eax]
+       vaddsd          xmm0, xmm0, xmmword ptr [eax]
+       vaddsd          xmm0{k7}, xmm0, xmmword ptr [eax]
+
+       addss           xmm0, xmmword ptr [eax]
+       vaddss          xmm0, xmm0, xmmword ptr [eax]
+       vaddss          xmm0{k7}, xmm0, xmmword ptr [eax]
+
+       vbroadcastf32x2 ymm0, xmmword ptr [eax]
+       vbroadcastf32x2 zmm0, xmmword ptr [eax]
+
+       vbroadcasti32x2 xmm0, xmmword ptr [eax]
+       vbroadcasti32x2 ymm0, xmmword ptr [eax]
+       vbroadcasti32x2 zmm0, xmmword ptr [eax]
+
+       vbroadcastsd    ymm0, xmmword ptr [eax]
+       vbroadcastsd    ymm0{k7}, xmmword ptr [eax]
+       vbroadcastsd    zmm0{k7}, xmmword ptr [eax]
+
+       vbroadcastss    xmm0, xmmword ptr [eax]
+       vbroadcastss    xmm0{k7}, xmmword ptr [eax]
+       vbroadcastss    ymm0, xmmword ptr [eax]
+       vbroadcastss    ymm0{k7}, xmmword ptr [eax]
+       vbroadcastss    zmm0, xmmword ptr [eax]
+
+       cvtdq2pd        xmm0, xmmword ptr [eax]
+       vcvtdq2pd       xmm0, xmmword ptr [eax]
+       vcvtdq2pd       xmm0{k7}, xmmword ptr [eax]
+
+       vcvtph2ps       xmm0, xmmword ptr [eax]
+       vcvtph2ps       xmm0{k7}, xmmword ptr [eax]
+
+       cvtps2pd        xmm0, xmmword ptr [eax]
+       vcvtps2pd       xmm0, xmmword ptr [eax]
+       vcvtps2pd       xmm0{k7}, xmmword ptr [eax]
+
+       vcvtps2ph       xmmword ptr [eax], xmm0, 0
+       vcvtps2ph       xmmword ptr [eax]{k7}, xmm0, 0
+
+       vcvtudq2pd      xmm0, xmmword ptr [eax]
+
+       insertps        xmm0, xmmword ptr [eax], 0
+       vinsertps       xmm0, xmm0, xmmword ptr [eax], 0
+       {evex} vinsertps xmm0, xmm0, xmmword ptr [eax], 0
+
+       movddup         xmm0, xmmword ptr [eax]
+       vmovddup        xmm0, xmmword ptr [eax]
+       vmovddup        xmm0{k7}, xmmword ptr [eax]
+
+       vpbroadcastb    xmm0, xmmword ptr [eax]
+       vpbroadcastb    xmm0{k7}, xmmword ptr [eax]
+       vpbroadcastb    ymm0, xmmword ptr [eax]
+       vpbroadcastb    ymm0{k7}, xmmword ptr [eax]
+       vpbroadcastb    zmm0, xmmword ptr [eax]
+
+       vpbroadcastd    xmm0, xmmword ptr [eax]
+       vpbroadcastd    xmm0{k7}, xmmword ptr [eax]
+       vpbroadcastd    ymm0, xmmword ptr [eax]
+       vpbroadcastd    ymm0{k7}, xmmword ptr [eax]
+       vpbroadcastd    zmm0, xmmword ptr [eax]
+
+       vpbroadcastq    xmm0, xmmword ptr [eax]
+       vpbroadcastq    xmm0{k7}, xmmword ptr [eax]
+       vpbroadcastq    ymm0, xmmword ptr [eax]
+       vpbroadcastq    ymm0{k7}, xmmword ptr [eax]
+       vpbroadcastq    zmm0, xmmword ptr [eax]
+
+       vpbroadcastw    xmm0, xmmword ptr [eax]
+       vpbroadcastw    xmm0{k7}, xmmword ptr [eax]
+       vpbroadcastw    ymm0, xmmword ptr [eax]
+       vpbroadcastw    ymm0{k7}, xmmword ptr [eax]
+       vpbroadcastw    zmm0, xmmword ptr [eax]
+
+       pmovsxbd        xmm0, xmmword ptr [eax]
+       vpmovsxbd       xmm0, xmmword ptr [eax]
+       vpmovsxbd       xmm0{k7}, xmmword ptr [eax]
+       vpmovsxbd       ymm0, xmmword ptr [eax]
+       vpmovsxbd       ymm0{k7}, xmmword ptr [eax]
+
+       pmovsxbq        xmm0, xmmword ptr [eax]
+       vpmovsxbq       xmm0, xmmword ptr [eax]
+       vpmovsxbq       xmm0{k7}, xmmword ptr [eax]
+       vpmovsxbq       ymm0, xmmword ptr [eax]
+       vpmovsxbq       ymm0{k7}, xmmword ptr [eax]
+       vpmovsxbq       zmm0, xmmword ptr [eax]
+
+       pmovsxdq        xmm0, xmmword ptr [eax]
+       vpmovsxdq       xmm0, xmmword ptr [eax]
+       vpmovsxdq       xmm0{k7}, xmmword ptr [eax]
+
+       pmovsxwd        xmm0, xmmword ptr [eax]
+       vpmovsxwd       xmm0, xmmword ptr [eax]
+       vpmovsxwd       xmm0{k7}, xmmword ptr [eax]
+
+       pmovsxwq        xmm0, xmmword ptr [eax]
+       vpmovsxwq       xmm0, xmmword ptr [eax]
+       vpmovsxwq       xmm0{k7}, xmmword ptr [eax]
+       vpmovsxwq       ymm0, xmmword ptr [eax]
+       vpmovsxwq       ymm0{k7}, xmmword ptr [eax]
+
+       pmovzxbd        xmm0, xmmword ptr [eax]
+       vpmovzxbd       xmm0, xmmword ptr [eax]
+       vpmovzxbd       xmm0{k7}, xmmword ptr [eax]
+       vpmovzxbd       ymm0, xmmword ptr [eax]
+       vpmovzxbd       ymm0{k7}, xmmword ptr [eax]
+
+       pmovzxbq        xmm0, xmmword ptr [eax]
+       vpmovzxbq       xmm0, xmmword ptr [eax]
+       vpmovzxbq       xmm0{k7}, xmmword ptr [eax]
+       vpmovzxbq       ymm0, xmmword ptr [eax]
+       vpmovzxbq       ymm0{k7}, xmmword ptr [eax]
+       vpmovzxbq       zmm0, xmmword ptr [eax]
+
+       pmovzxdq        xmm0, xmmword ptr [eax]
+       vpmovzxdq       xmm0, xmmword ptr [eax]
+       vpmovzxdq       xmm0{k7}, xmmword ptr [eax]
+
+       pmovzxwd        xmm0, xmmword ptr [eax]
+       vpmovzxwd       xmm0, xmmword ptr [eax]
+       vpmovzxwd       xmm0{k7}, xmmword ptr [eax]
+
+       pmovzxwq        xmm0, xmmword ptr [eax]
+       vpmovzxwq       xmm0, xmmword ptr [eax]
+       vpmovzxwq       xmm0{k7}, xmmword ptr [eax]
+       vpmovzxwq       ymm0, xmmword ptr [eax]
+       vpmovzxwq       ymm0{k7}, xmmword ptr [eax]

diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog
index 12070dccd5c3806631c9cc981f0fa55634b6da8e..c33e5a004723f76a4b040d17ae1bc7043c238132 100644 (file)
--- a/opcodes/ChangeLog
+++ b/opcodes/ChangeLog
@@ -1,3 +1,10 @@
+2018-03-22  Jan Beulich  <jbeulich@suse.com>
+
+       * i386-opc.tbl (vcvtdq2pd, vcvtps2pd, vcvtudq2pd): Use separate
+       templates allowing memory operands and folded ones for register
+       only flavors.
+       * i386-tlb.h: Re-generate.
+
 2018-03-22  Jan Beulich  <jbeulich@suse.com>
 
        * i386-opc.tbl (vfrczp*, vpcmov, vpermil2p*): Fold 128- and

diff --git a/opcodes/i386-opc.tbl b/opcodes/i386-opc.tbl
index d9d392dc5b813d48eed891f887b5104c8a8257a7..26e81ffa607d3737f80b19bdea90bf3e55220bbf 100644 (file)
--- a/opcodes/i386-opc.tbl
+++ b/opcodes/i386-opc.tbl
@@ -1981,8 +1981,9 @@ vcmpunord_ssd, 3, 0xf2c2, 0x13, 1, CpuAVX, Modrm|Vex=3|VexOpcode=0|VexVVVV=1|Vex
 vcmpunord_sss, 3, 0xf3c2, 0x13, 1, CpuAVX, Modrm|Vex=3|VexOpcode=0|VexVVVV=1|VexW=1|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|ImmExt, { Dword|Unspecified|BaseIndex|RegXMM, RegXMM, RegXMM }
 vcomisd, 2, 0x662f, None, 1, CpuAVX, Modrm|Vex=3|VexOpcode=0|VexW=1|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Qword|Unspecified|BaseIndex|RegXMM, RegXMM }
 vcomiss, 2, 0x2f, None, 1, CpuAVX, Modrm|Vex=3|VexOpcode=0|VexW=1|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Dword|Unspecified|BaseIndex|RegXMM, RegXMM }
-vcvtdq2pd, 2, 0xf3e6, None, 1, CpuAVX, Modrm|Vex|VexOpcode=0|VexW=1|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Qword|Unspecified|BaseIndex|RegXMM, RegXMM }
-vcvtdq2pd, 2, 0xf3e6, None, 1, CpuAVX, Modrm|Vex=2|VexOpcode=0|VexW=1|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Xmmword|Unspecified|BaseIndex|RegXMM, RegYMM }
+vcvtdq2pd, 2, 0xf3e6, None, 1, CpuAVX, Modrm|Vex|VexOpcode=0|VexW=1|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { RegXMM, RegXMM|RegYMM }
+vcvtdq2pd, 2, 0xf3e6, None, 1, CpuAVX, Modrm|Vex|VexOpcode=0|VexW=1|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Qword|Unspecified|BaseIndex, RegXMM }
+vcvtdq2pd, 2, 0xf3e6, None, 1, CpuAVX, Modrm|Vex=2|VexOpcode=0|VexW=1|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Xmmword|Unspecified|BaseIndex, RegYMM }
 vcvtdq2ps, 2, 0x5b, None, 1, CpuAVX, Modrm|Vex|VexOpcode=0|VexW=1|CheckRegSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Unspecified|BaseIndex|RegXMM|RegYMM, RegXMM|RegYMM }
 vcvtpd2dq, 2, 0xf2e6, None, 1, CpuAVX, Modrm|Vex|VexOpcode=0|VexW=1|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { RegXMM|RegYMM, RegXMM }
 vcvtpd2dq, 2, 0xf2e6, None, 1, CpuAVX, Modrm|Vex|VexOpcode=0|VexW=1|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|IntelSyntax, { Xmmword|Ymmword|BaseIndex, RegXMM }
@@ -1993,8 +1994,9 @@ vcvtpd2ps, 2, 0x665a, None, 1, CpuAVX, Modrm|Vex|VexOpcode=0|VexW=1|No_bSuf|No_w
 vcvtpd2psx, 2, 0x665a, None, 1, CpuAVX, Modrm|Vex|VexOpcode=0|VexW=1|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|ATTSyntax, { Unspecified|BaseIndex|RegXMM, RegXMM }
 vcvtpd2psy, 2, 0x665a, None, 1, CpuAVX, Modrm|Vex=2|VexOpcode=0|VexW=1|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|ATTSyntax, { Unspecified|BaseIndex|RegYMM, RegXMM }
 vcvtps2dq, 2, 0x665b, None, 1, CpuAVX, Modrm|Vex|VexOpcode=0|VexW=1|CheckRegSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Unspecified|BaseIndex|RegXMM|RegYMM, RegXMM|RegYMM }
-vcvtps2pd, 2, 0x5a, None, 1, CpuAVX, Modrm|Vex|VexOpcode=0|VexW=1|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Qword|Unspecified|BaseIndex|RegXMM, RegXMM }
-vcvtps2pd, 2, 0x5a, None, 1, CpuAVX, Modrm|Vex=2|VexOpcode=0|VexW=1|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Xmmword|Unspecified|BaseIndex|RegXMM, RegYMM }
+vcvtps2pd, 2, 0x5a, None, 1, CpuAVX, Modrm|Vex|VexOpcode=0|VexW=1|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { RegXMM, RegXMM|RegYMM }
+vcvtps2pd, 2, 0x5a, None, 1, CpuAVX, Modrm|Vex|VexOpcode=0|VexW=1|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Qword|Unspecified|BaseIndex, RegXMM }
+vcvtps2pd, 2, 0x5a, None, 1, CpuAVX, Modrm|Vex=2|VexOpcode=0|VexW=1|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Xmmword|Unspecified|BaseIndex, RegYMM }
 vcvtsd2si, 2, 0xf22d, None, 1, CpuAVX, Modrm|Vex=3|VexOpcode=0|IgnoreSize|No_bSuf|No_wSuf|No_sSuf|No_ldSuf|ToDword, { Qword|Unspecified|BaseIndex|RegXMM, Reg32|Reg64 }
 vcvtsd2ss, 3, 0xf25a, None, 1, CpuAVX, Modrm|Vex=3|VexOpcode=0|VexVVVV=1|VexW=1|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Qword|Unspecified|BaseIndex|RegXMM, RegXMM, RegXMM }
 vcvtsi2sd, 3, 0xf22a, None, 1, CpuAVX|CpuNo64, Modrm|Vex=3|VexOpcode=0|VexVVVV=1|IgnoreSize|No_bSuf|No_wSuf|No_sSuf|No_qSuf|No_ldSuf, { Reg32|Dword|Unspecified|BaseIndex, RegXMM, RegXMM }
@@ -4494,10 +4496,12 @@ vscatterdps, 2, 0x66A2, None, 1, CpuAVX512F|CpuAVX512VL, Modrm|EVex=3|Masking=2|
 vscatterqps, 2, 0x66A3, None, 1, CpuAVX512F|CpuAVX512VL, Modrm|EVex=2|Masking=2|NoDefMask|VexOpcode=1|VexW=1|Disp8MemShift=2|VecSIB=1|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { RegXMM, Qword|Unspecified|BaseIndex }
 vscatterqps, 2, 0x66A3, None, 1, CpuAVX512F|CpuAVX512VL, Modrm|EVex=3|Masking=2|NoDefMask|VexOpcode=1|VexW=1|Disp8MemShift=2|VecSIB=2|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { RegXMM, XMMword|Unspecified|BaseIndex }
 
-vcvtdq2pd, 2, 0xF3E6, None, 1, CpuAVX512F|CpuAVX512VL, Modrm|EVex=2|Masking=3|VexOpcode=0|VexW=1|Broadcast=4|Disp8MemShift=3|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { RegXMM|Dword|Qword|Unspecified|BaseIndex, RegXMM }
-vcvtdq2pd, 2, 0xF3E6, None, 1, CpuAVX512F|CpuAVX512VL, Modrm|EVex=3|Masking=3|VexOpcode=0|VexW=1|Broadcast=3|Disp8MemShift=4|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { RegXMM|Dword|XMMword|Unspecified|BaseIndex, RegYMM }
-vcvtudq2pd, 2, 0xF37A, None, 1, CpuAVX512F|CpuAVX512VL, Modrm|EVex=2|Masking=3|VexOpcode=0|VexW=1|Broadcast=4|Disp8MemShift=3|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { RegXMM|Dword|Qword|Unspecified|BaseIndex, RegXMM }
-vcvtudq2pd, 2, 0xF37A, None, 1, CpuAVX512F|CpuAVX512VL, Modrm|EVex=3|Masking=3|VexOpcode=0|VexW=1|Broadcast=3|Disp8MemShift=4|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { RegXMM|Dword|XMMword|Unspecified|BaseIndex, RegYMM }
+vcvtdq2pd, 2, 0xF3E6, None, 1, CpuAVX512F|CpuAVX512VL, Modrm|Masking=3|VexOpcode=0|VexW=1|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { RegXMM, RegXMM|RegYMM }
+vcvtdq2pd, 2, 0xF3E6, None, 1, CpuAVX512F|CpuAVX512VL, Modrm|EVex=2|Masking=3|VexOpcode=0|VexW=1|Broadcast=4|Disp8MemShift=3|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Dword|Qword|Unspecified|BaseIndex, RegXMM }
+vcvtdq2pd, 2, 0xF3E6, None, 1, CpuAVX512F|CpuAVX512VL, Modrm|EVex=3|Masking=3|VexOpcode=0|VexW=1|Broadcast=3|Disp8MemShift=4|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Dword|XMMword|Unspecified|BaseIndex, RegYMM }
+vcvtudq2pd, 2, 0xF37A, None, 1, CpuAVX512F|CpuAVX512VL, Modrm|Masking=3|VexOpcode=0|VexW=1|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { RegXMM, RegXMM|RegYMM }
+vcvtudq2pd, 2, 0xF37A, None, 1, CpuAVX512F|CpuAVX512VL, Modrm|EVex=2|Masking=3|VexOpcode=0|VexW=1|Broadcast=4|Disp8MemShift=3|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Dword|Qword|Unspecified|BaseIndex, RegXMM }
+vcvtudq2pd, 2, 0xF37A, None, 1, CpuAVX512F|CpuAVX512VL, Modrm|EVex=3|Masking=3|VexOpcode=0|VexW=1|Broadcast=3|Disp8MemShift=4|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Dword|XMMword|Unspecified|BaseIndex, RegYMM }
 
 vcvtpd2dq, 2, 0xF2E6, None, 1, CpuAVX512F|CpuAVX512VL, Modrm|EVex=2|Masking=3|VexOpcode=0|VexW=2|VecESize=1|Broadcast=4|Disp8MemShift=4|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { RegXMM|Qword|XMMword|BaseIndex, RegXMM }
 vcvtpd2dqx, 2, 0xF2E6, None, 1, CpuAVX512F|CpuAVX512VL, Modrm|EVex=2|Masking=3|VexOpcode=0|VexW=2|VecESize=1|Broadcast=4|Disp8MemShift=4|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { RegXMM|Qword|XMMword|Unspecified|BaseIndex, RegXMM }
@@ -4518,8 +4522,9 @@ vcvtph2ps, 2, 0x6613, None, 1, CpuAVX512F|CpuAVX512VL, Modrm|EVex=3|Masking=3|Ve
 vcvtps2dq, 2, 0x665B, None, 1, CpuAVX512F|CpuAVX512VL, Modrm|EVex=2|Masking=3|VexOpcode=0|VexW=1|Broadcast=3|Disp8MemShift=4|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { RegXMM|Dword|XMMword|Unspecified|BaseIndex, RegXMM }
 vcvtps2dq, 2, 0x665B, None, 1, CpuAVX512F|CpuAVX512VL, Modrm|EVex=3|Masking=3|VexOpcode=0|VexW=1|Broadcast=2|Disp8MemShift=5|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { RegYMM|Dword|YMMword|Unspecified|BaseIndex, RegYMM }
 
-vcvtps2pd, 2, 0x5A, None, 1, CpuAVX512F|CpuAVX512VL, Modrm|EVex=2|Masking=3|VexOpcode=0|VexW=1|Broadcast=4|Disp8MemShift=3|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { RegXMM|Dword|Qword|Unspecified|BaseIndex, RegXMM }
-vcvtps2pd, 2, 0x5A, None, 1, CpuAVX512F|CpuAVX512VL, Modrm|EVex=3|Masking=3|VexOpcode=0|VexW=1|Broadcast=3|Disp8MemShift=4|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { RegXMM|Dword|XMMword|Unspecified|BaseIndex, RegYMM }
+vcvtps2pd, 2, 0x5A, None, 1, CpuAVX512F|CpuAVX512VL, Modrm|Masking=3|VexOpcode=0|VexW=1|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { RegXMM, RegXMM|RegYMM }
+vcvtps2pd, 2, 0x5A, None, 1, CpuAVX512F|CpuAVX512VL, Modrm|EVex=2|Masking=3|VexOpcode=0|VexW=1|Broadcast=4|Disp8MemShift=3|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Dword|Qword|Unspecified|BaseIndex, RegXMM }
+vcvtps2pd, 2, 0x5A, None, 1, CpuAVX512F|CpuAVX512VL, Modrm|EVex=3|Masking=3|VexOpcode=0|VexW=1|Broadcast=3|Disp8MemShift=4|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Dword|XMMword|Unspecified|BaseIndex, RegYMM }
 
 vcvtps2ph, 3, 0x661D, None, 1, CpuAVX512F|CpuAVX512VL, Modrm|Masking=3|VexOpcode=2|VexW=1|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Imm8, RegXMM|RegYMM, RegXMM|RegMem }
 vcvtps2ph, 3, 0x661D, None, 1, CpuAVX512F|CpuAVX512VL, Modrm|EVex=2|Masking=2|VexOpcode=2|VexW=1|Disp8MemShift=3|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Imm8, RegXMM, Qword|Unspecified|BaseIndex }

diff --git a/opcodes/i386-tbl.h b/opcodes/i386-tbl.h
index 88eb5b4071f69a047e5b077dc2ea4f9b145b8f64..51f7109c1027b77fee308ceb0c0a425160a32f53 100644 (file)
--- a/opcodes/i386-tbl.h
+++ b/opcodes/i386-tbl.h
@@ -37050,8 +37050,25 @@ const insn_template i386_optab[] =
       1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
       1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
       0, 0, 0, 0 },
-    { { { 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1,
-         0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 1, 0,
+    { { { 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+         0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0,
+         0, 0, 0 } },
+      { { 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+         0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0,
+         0, 0, 0 } } } },
+  { "vcvtdq2pd", 2, 0xf3e6, None, 1,
+    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+        0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+        0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+        0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+        0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+        0, 0, 0, 0, 0, 0 } },
+    { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1,
+      1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+      1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+      0, 0, 0, 0 },
+    { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1,
+         0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0,
          0, 0, 0 } },
       { { 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
          0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0,
@@ -37067,7 +37084,7 @@ const insn_template i386_optab[] =
       1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
       2, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
       0, 0, 0, 0 },
-    { { { 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1,
+    { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1,
          0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 0,
          0, 0, 0 } },
       { { 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
@@ -37090,6 +37107,23 @@ const insn_template i386_optab[] =
       { { 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
          0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0,
          0, 0, 0 } } } },
+  { "vcvtdq2pd", 2, 0xF3E6, None, 1,
+    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+        0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0, 0,
+        0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+        0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+        0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+        0, 0, 0, 0, 0, 0 } },
+    { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1,
+      1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+      0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 3, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+      0, 0, 0, 0 },
+    { { { 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+         0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0,
+         0, 0, 0 } },
+      { { 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+         0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0,
+         0, 0, 0 } } } },
   { "vcvtdq2pd", 2, 0xF3E6, None, 1,
     { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
         0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0, 0,
@@ -37101,8 +37135,8 @@ const insn_template i386_optab[] =
       1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
       0, 0, 1, 0, 0, 0, 0, 0, 0, 2, 3, 0, 4, 0, 0, 3, 0, 0, 0, 0,
       0, 0, 0, 0 },
-    { { { 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1,
-         0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 1, 0, 0, 1, 0,
+    { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1,
+         0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0, 0, 1, 0,
          0, 0, 0 } },
       { { 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
          0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0,
@@ -37118,7 +37152,7 @@ const insn_template i386_optab[] =
       1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
       0, 0, 1, 0, 0, 0, 0, 0, 0, 3, 3, 0, 3, 0, 0, 4, 0, 0, 0, 0,
       0, 0, 0, 0 },
-    { { { 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1,
+    { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1,
          0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 1, 0,
          0, 0, 0 } },
       { { 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
@@ -37657,8 +37691,25 @@ const insn_template i386_optab[] =
       1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
       1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
       0, 0, 0, 0 },
-    { { { 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1,
-         0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 1, 0,
+    { { { 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+         0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0,
+         0, 0, 0 } },
+      { { 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+         0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0,
+         0, 0, 0 } } } },
+  { "vcvtps2pd", 2, 0x5a, None, 1,
+    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+        0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+        0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+        0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+        0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+        0, 0, 0, 0, 0, 0 } },
+    { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1,
+      1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+      1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+      0, 0, 0, 0 },
+    { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1,
+         0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0,
          0, 0, 0 } },
       { { 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
          0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0,
@@ -37674,7 +37725,7 @@ const insn_template i386_optab[] =
       1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
       2, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
       0, 0, 0, 0 },
-    { { { 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1,
+    { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1,
          0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 0,
          0, 0, 0 } },
       { { 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
@@ -37717,6 +37768,23 @@ const insn_template i386_optab[] =
       { { 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
          0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0,
          0, 0, 0 } } } },
+  { "vcvtps2pd", 2, 0x5A, None, 1,
+    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+        0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0, 0,
+        0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+        0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+        0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+        0, 0, 0, 0, 0, 0 } },
+    { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1,
+      1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+      0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 3, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+      0, 0, 0, 0 },
+    { { { 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+         0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0,
+         0, 0, 0 } },
+      { { 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+         0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0,
+         0, 0, 0 } } } },
   { "vcvtps2pd", 2, 0x5A, None, 1,
     { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
         0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0, 0,
@@ -37728,8 +37796,8 @@ const insn_template i386_optab[] =
       1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
       0, 0, 1, 0, 0, 0, 0, 0, 0, 2, 3, 0, 4, 0, 0, 3, 0, 0, 0, 0,
       0, 0, 0, 0 },
-    { { { 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1,
-         0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 1, 0, 0, 1, 0,
+    { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1,
+         0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0, 0, 1, 0,
          0, 0, 0 } },
       { { 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
          0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0,
@@ -37745,7 +37813,7 @@ const insn_template i386_optab[] =
       1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
       0, 0, 1, 0, 0, 0, 0, 0, 0, 3, 3, 0, 3, 0, 0, 4, 0, 0, 0, 0,
       0, 0, 0, 0 },
-    { { { 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1,
+    { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1,
          0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 1, 0,
          0, 0, 0 } },
       { { 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
@@ -76140,6 +76208,23 @@ const insn_template i386_optab[] =
       { { 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
          0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0,
          0, 0, 0 } } } },
+  { "vcvtudq2pd", 2, 0xF37A, None, 1,
+    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+        0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0, 0,
+        0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+        0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+        0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+        0, 0, 0, 0, 0, 0 } },
+    { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1,
+      1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+      0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 3, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+      0, 0, 0, 0 },
+    { { { 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+         0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0,
+         0, 0, 0 } },
+      { { 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+         0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0,
+         0, 0, 0 } } } },
   { "vcvtudq2pd", 2, 0xF37A, None, 1,
     { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
         0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0, 0,
@@ -76151,8 +76236,8 @@ const insn_template i386_optab[] =
       1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
       0, 0, 1, 0, 0, 0, 0, 0, 0, 2, 3, 0, 4, 0, 0, 3, 0, 0, 0, 0,
       0, 0, 0, 0 },
-    { { { 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1,
-         0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 1, 0, 0, 1, 0,
+    { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1,
+         0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0, 0, 1, 0,
          0, 0, 0 } },
       { { 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
          0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0,
@@ -76168,7 +76253,7 @@ const insn_template i386_optab[] =
       1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
       0, 0, 1, 0, 0, 0, 0, 0, 0, 3, 3, 0, 3, 0, 0, 4, 0, 0, 0, 0,
       0, 0, 0, 0 },
-    { { { 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1,
+    { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1,
          0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 1, 0,
          0, 0, 0 } },
       { { 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,