From: Tamar Christina <tamar.christina@arm.com>
Date: Thu, 16 Nov 2017 16:13:01 +0000 (+0000)
Subject: Update documentation for Arvm8.4-A changes to AArch64.
X-Git-Url: http://git.efficios.com/?a=commitdiff_plain;h=68ffd9368a020fb685520da51f8c672c720869e4;p=deliverable%2Fbinutils-gdb.git

Update documentation for Arvm8.4-A changes to AArch64.

gas/

2017-11-16  Tamar Christina  <tamar.christina@arm.com>

	* doc/c-aarch64.texi (armv8.4-a, sha2, sha3, sm4): New.
	(dotprod): Update default note.
---

diff --git a/gas/ChangeLog b/gas/ChangeLog
index 3ebcc95913..116d7e34bc 100644
--- a/gas/ChangeLog
+++ b/gas/ChangeLog
@@ -1,3 +1,8 @@
+2017-11-16  Tamar Christina  <tamar.christina@arm.com>
+
+	* doc/c-aarch64.texi (armv8.4-a, sha2, sha3, sm4): New.
+	(dotprod): Update default note.
+
 2017-11-16  Tamar Christina  <tamar.christina@arm.com>
 
 	* testsuite/gas/aarch64/armv8_4-a-illegal.d: New.
diff --git a/gas/doc/c-aarch64.texi b/gas/doc/c-aarch64.texi
index c6eeda8b52..7d872b0049 100644
--- a/gas/doc/c-aarch64.texi
+++ b/gas/doc/c-aarch64.texi
@@ -90,7 +90,7 @@ This option specifies the target architecture.  The assembler will
 issue an error message if an attempt is made to assemble an
 instruction which will not execute on the target architecture.  The
 following architecture names are recognized: @code{armv8-a},
-@code{armv8.1-a}, @code{armv8.2-a} and @code{armv8.3-a}.
+@code{armv8.1-a}, @code{armv8.2-a}, @code{armv8.3-a} and @code{armv8.4-a}.
 
 If both @option{-mcpu} and @option{-march} are specified, the
 assembler will use the setting for @option{-mcpu}.  If neither are
@@ -140,7 +140,15 @@ automatically cause those extensions to be disabled.
 @item @code{crc} @tab ARMv8-A @tab ARMv8.1-A or later
  @tab Enable CRC instructions.
 @item @code{crypto} @tab ARMv8-A @tab No
- @tab Enable cryptographic extensions.  This implies @code{fp} and @code{simd}.
+ @tab Enable cryptographic extensions.  This implies @code{fp}, @code{simd}, @code{aes} and @code{sha2}.
+@item @code{aes} @tab ARMv8-A @tab No
+ @tab Enable the AES cryptographic extensions. This implies @code{fp} and @code{simd}.
+@item @code{sha2} @tab ARMv8-A @tab No
+ @tab Enable the SHA2 cryptographic extensions. This implies @code{fp} and @code{simd}.
+@item @code{sha3} @tab ARMv8.2-A @tab No
+ @tab Enable the ARMv8.2-A SHA2 and SHA3 cryptographic extensions. This implies @code{fp}, @code{simd} and @code{sha2}.
+@item @code{sm4} @tab ARMv8.2-A @tab No
+ @tab Enable the ARMv8.2-A SM3 and SM4 cryptographic extensions. This implies @code{fp} and @code{simd}.
 @item @code{fp} @tab ARMv8-A @tab ARMv8-A or later
  @tab Enable floating-point extensions.
 @item @code{fp16} @tab ARMv8.2-A @tab ARMv8.2-A or later
@@ -166,7 +174,7 @@ automatically cause those extensions to be disabled.
 @item @code{sve} @tab ARMv8.2-A @tab No
  @tab Enable the Scalable Vector Extensions.  This implies @code{fp16},
  @code{simd} and @code{compnum}.
-@item @code{dotprod} @tab ARMv8.2-A @tab No
+@item @code{dotprod} @tab ARMv8.2-A @tab ARMv8.4-A or later
  @tab Enable the Dot Product extension.  This implies @code{simd}.
 @end multitable