From: Joel Brobecker <brobecker@gnat.com>
Date: Fri, 9 May 2008 15:03:09 +0000 (+0000)
Subject:         * ppc/altivec.igen (vperm): Latch inputs into temporaries.
X-Git-Url: http://git.efficios.com/?a=commitdiff_plain;h=7010a0c9019a68999ca6e43b4eec8b28d0907cbc;p=deliverable%2Fbinutils-gdb.git

    * ppc/altivec.igen (vperm): Latch inputs into temporaries.
---

diff --git a/sim/ChangeLog b/sim/ChangeLog
index ea3b306933..521ccfb5e3 100644
--- a/sim/ChangeLog
+++ b/sim/ChangeLog
@@ -1,3 +1,7 @@
+2008-05-09  Olivier Hainque  <hainque@adacore.com>
+
+	* ppc/altivec.igen (vperm): Latch inputs into temporaries.
+
 2008-03-25  M R Swami Reddy <MR.Swami.Reddy@nsc.com>
 
 	* MAINTAINERS: Add myself as maintainer of cr16 port.
diff --git a/sim/ppc/altivec.igen b/sim/ppc/altivec.igen
index d933f569eb..3a224cc016 100644
--- a/sim/ppc/altivec.igen
+++ b/sim/ppc/altivec.igen
@@ -1634,12 +1634,17 @@ unsigned32::model-function::altivec_unsigned_saturate_32:signed64 val, int *sat
 
 0.4,6.VS,11.VA,16.VB,21.VC,26.43:VX:av:vperm %VD, %VA, %VB, %VC:Vector Permute
 	int i, who;
+	/* The permutation vector might have us read into the source vectors
+	   back at positions before the iteration index, so we must latch the
+	   sources to prevent early-clobbering in case the destination vector
+	   is the same as one of them.  */
+	vreg myvA = (*vA), myvB = (*vB);
 	for (i = 0; i < 16; i++) {
 	  who = (*vC).b[AV_BINDEX(i)] & 0x1f;
 	  if (who & 0x10)
-	    (*vS).b[AV_BINDEX(i)] = (*vB).b[AV_BINDEX(who & 0xf)];
+	    (*vS).b[AV_BINDEX(i)] = myvB.b[AV_BINDEX(who & 0xf)];
 	  else
-	    (*vS).b[AV_BINDEX(i)] = (*vA).b[AV_BINDEX(who & 0xf)];
+	    (*vS).b[AV_BINDEX(i)] = myvA.b[AV_BINDEX(who & 0xf)];
 	}
 	PPC_INSN_VR(VS_BITMASK, VA_BITMASK | VB_BITMASK | VC_BITMASK);