Another s12z regen
[deliverable/binutils-gdb.git] / gas / testsuite /
2018-06-01  Jan Beulichx86: don't emit REX.W for SLDT and STR
2018-06-01  Jan Beulichx86: relax redundant REX prefix check
2018-06-01  Jan Beulichx86/Intel: accept "oword ptr" for INVPCID
2018-05-30  Amit PawarAdd znver2 support.
2018-05-24  Jim WilsonRISC-V: Fix .align handling when .option norelax.
2018-05-21  Peter BergnerRemove fake operand handling for extended mnemonics.
2018-05-18  John DarringtonAdd support for the Freescale s12z processor.
2018-05-15  Tamar ChristinaImplement Read/Write constraints on system registers...
2018-05-10  Tamar ChristinaAllow integer immediates for AArch64 fmov instructions.
2018-05-10  Tamar ChristinaAllow integer immediate for VFP vmov instructions.
2018-05-09  Max Filippovgas: xtensa: fix literal movement
2018-05-09  Dimitar DimitrovFix binary compatibility between GCC and the TI compile...
2018-05-08  Jim WilsonRISC-V: Add missing hint instructions from RV128I.
2018-05-07  H.J. LuEnable Intel MOVDIRI, MOVDIR64B instructions
2018-05-07  H.J. Lugas/i386/xmmhi32.d: Also allow dir32 relocation
2018-05-07  H.J. Lui386: Append ".p2align 4,0" to gas tests
2018-04-27  Maciej W. Rozyckitestsuite: Support filtering targets by TCL procedure...
2018-04-27  Igor TsimbalistRevert "Enable Intel MOVDIRI, MOVDIR64B instructions."
2018-04-26  Igor TsimbalistEnable Intel MOVDIRI, MOVDIR64B instructions.
2018-04-26  Jan Beulichx86: also optimize zeroing-masking variants of insns
2018-04-26  Jan Beulichx86: properly force / avoid forcing EVEX encoding
2018-04-26  Jan Beulichx86: CpuXSAVE is a prereq for various other features
2018-04-26  Jan Beulichx86: drop CpuRegMMX, CpuReg[XYZ]MM, and CpuRegMask
2018-04-26  Jan Beulichx86: don't recognize bnd<N> as registers without CpuMPX
2018-04-26  Jan Beulichx86: x87-related adjustments
2018-04-25  Christophe Lyon[ARM] Add FDPIC relocations definitions
2018-04-25  Tamar ChristinaFix the mask for the sqrdml(a|s)h instructions.
2018-04-25  Alan ModraRemove arm-aout and arm-coff support
2018-04-20  Jim WilsonRISC-V: Add new option -mrelax/-mno-relax.
2018-04-17  Igor TsimbalistFix tests to avoid cldemote encoding.
2018-04-17  Igor TsimbalistEnable Intel CLDEMOTE instruction.
2018-04-16  Alan ModraRemove arm-epoc-pe support
2018-04-16  Alan ModraRemove sparc-aout and sparc-coff support
2018-04-16  Alan ModraRemove m68k-aout and m68k-coff support
2018-04-16  Alan ModraRemove sh5 and sh64 support
2018-04-16  Alan ModraRemove sh-symbianelf support
2018-04-16  Alan ModraRemove i370 support
2018-04-16  Alan ModraRemove h8300-coff support
2018-04-15  H.J. Lux86: Allow 32-bit registers for tpause and umwait
2018-04-12  John DarringtonStop the assembler from overwriting its output file.
2018-04-11  Igor TsimbalistEnable Intel WAITPKG instructions.
2018-04-11  Alan ModraRemove i860, i960, bout and aout-adobe targets
2018-04-04  H.J. Lui386: Clear vex instead of vex.evex
2018-03-28  Renlin Li[1/2][GAS][AARCH64]Add BFD_RELOC_AARCH64_TLSLE_LDST8...
2018-03-28  Jan Beulichx86: drop VecESize
2018-03-28  Jan Beulichx86: convert broadcast insn attribute to boolean
2018-03-28  Jan Beulichx86: don't show suffixes for to-scalar-int conversion...
2018-03-28  Nick CliftonEnhance the AARCH64 assembler to support LDFF1xx instru...
2018-03-22  Jan Beulichix86: allow HLE store of accumulator to absolute address
2018-03-22  Jan Beulichx86: fix swapped operand handling for BNDMOV
2018-03-22  Jan Beulichx86/Intel: fix fallout from earlier template folding
2018-03-22  Jan Beulichx86: fold a few XOP templates
2018-03-16  Jim WilsonRISC-V: Emit better warning for unknown CSR.
2018-03-14  Jim WilsonMissing testcase files for last commit.
2018-03-09  H.J. Lux86: Encode EVEX instructions with VEX128 if possible
2018-03-09  H.J. Lux86: Strip whitespace in check_VecOperations
2018-03-09  H.J. Lux86: Optimize with EVEX128 encoding for AVX512VL
2018-03-08  H.J. Lux86-64: Also optimize "clr reg64"
2018-03-08  H.J. Lux86: Remove support for old (<= 2.8.1) versions of gcc
2018-03-08  Jan Beulichx86: correct operand size match checks for BMI/BMI2...
2018-03-08  Jan Beulichx86: add GFNI, VAES, and VPCLMUL checking to cpu_flags_...
2018-03-08  Jan Beulichx86: extend SSE check to PCLMULQDQ, AES, and GFNI insns
2018-03-08  Jan Beulichx86/Intel: correct disassembly of fsub*/fdiv*
2018-03-08  Jan Beulichx86: adjust 4-XMM-register-group related warning
2018-03-08  Jan Beulichx86: bogus VMOVD with 64-bit operands should only allow...
2018-03-07  H.J. Lux86: Rewrite NOP generation for fill and alignment
2018-03-07  Alan ModraXCOFF disassembler
2018-03-01  H.J. Lux86: Encode AVX256/AVX512 vpsub[bwdq] with VEX128/EVEX128
2018-02-27  H.J. Lugas: Rename .nop directive to .nops
2018-02-27  H.J. Lux86: Add -O[2|s] assembler command-line options
2018-02-25  Alan ModraBFD messages
2018-02-25  Alan ModraMIPS messages
2018-02-22  Andre Simoes Dias... Diagnose when trying to assemble conditional FP16 vmovx...
2018-02-22  H.J. Lux86: Add {rex} pseudo prefix
2018-02-20  Maciej W. RozyckiMIPS16/GAS/testsuite: Add cross-section R_MIPS16_PC16_S...
2018-02-20  Max Filippovgas: xtensa: limit size of auto litpools
2018-02-17  H.J. LuAdd .nop assembler directive
2018-02-15  Tamar ChristinaFix AArch32 build attributes for Armv8.4-A.
2018-02-13  Nick CliftonFix ARm assembler so that it rejects invalid immediate...
2018-02-13  H.J. Lux86-64: Generate branch with PLT32 relocation
2018-02-13  Maciej W. RozyckiMIPS/GAS/testsuite: Correct duplicate `Loongson-3A...
2018-02-12  Maciej W. RozyckiMIPS/GAS/test: Fix an n32 `.reginfo' size test failure
2018-02-12  Henry WongMIPS: Fix encoding for MIPSr6 sigrie instruction.
2018-02-08  Alan ModraPR22819, powerpc gas "instruction address is not a...
2018-02-05  Maciej W. RozyckiMIPS/BFD: Correctly report unsupported `.reginfo' secti...
2018-01-24  Renlin Li[GAS][AARCH64]Add group relocations to create PC-relati...
2018-01-23  Igor TsimbalistEnable Intel PCONFIG instruction.
2018-01-23  Igor TsimbalistEnable Intel WBNOINVD instruction.
2018-01-22  Oleg EndoFix the RX assembler so that it can handle escaped...
2018-01-17  Igor TsimbalistReplace CET bit with IBT and SHSTK bits.
2018-01-15  Jim WilsonRISC-V: Add support for addi that compresses to c.nop.
2018-01-15  Thomas Preud'homme[ARM] Enable conditional Armv8-M instructions
2018-01-15  Thomas Preud'homme[ARM] No IT usage deprecation for ARMv8-M
2018-01-11  Igor TsimbalistRemove VL variants for 4FMAPS and 4VNNIW insns.
2018-01-10  Jan Beulichx86: fix Disp8 handling for scalar AVX512_4FMAPS insns
2018-01-10  Jan Beulichx86: fix Disp8 handling for AVX512VL VPCMP*{B,W} variants
2018-01-10  Jim WilsonRISC-V: Disassemble x0 based addresses as 0.
2018-01-09  James Greenhalgh[Arm] Add CSDB instruction
2018-01-09  James GreenhalghAdd support for the AArch64's CSDB instruction.
2018-01-08  H.J. Lux86: Properly encode vmovd with 64-bit memeory
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