Regenerate pot files.
[deliverable/binutils-gdb.git] / gas / testsuite /
2016-12-21  Alan ModraRemove high bit set characters
2016-12-20  Maciej W. RozyckiMIPS16/opcodes: Respect ISA and ASE in disassembly
2016-12-20  Maciej W. RozyckiMIPS/GAS/testsuite: Add RESTORE instruction to `mips16e...
2016-12-20  Maciej W. RozyckiMIPS/GAS/testsuite: Extend MIPS16 testing over multiple...
2016-12-20  Maciej W. RozyckiMIPS/GAS/testsuite: Implement individual MIPS16 ISA...
2016-12-20  Maciej W. RozyckiMIPS/GAS/testsuite: Fix trailing padding in `loc-swap.s'
2016-12-20  Maciej W. RozyckiMIPS16: Switch to 32-bit opcode table interpretation
2016-12-20  Maciej W. RozyckiMIPS16/opcodes: Correct 64-bit macros' ISA membership
2016-12-20  Maciej W. RozyckiMIPS16/opcodes: Correct I64/SDRASP opcode's ISA membership
2016-12-20  Maciej W. RozyckiMIPS/GAS/testsuite: Correct NewABI test selection
2016-12-14  Maciej W. RozyckiMIPS16/GAS: Fix assertion failures with relocations...
2016-12-14  Maciej W. RozyckiMIPS16: Fix SP-relative SD instruction annotation
2016-12-13  Renlin Li[Binutils][AARCH64]Remove Cn register for coprocessor...
2016-12-13  Jiong Wang[AArch64] Make GAS testcases support ILP32 mode
2016-12-09  Maciej W. RozyckiMIPS16/opcodes: Use hexadecimal interpretation for...
2016-12-06  Nick CliftonFix mmix assembler test to account for changes in the...
2016-12-05  Szabolcs Nagy[ARM] Add ARMv8.3 VCMLA and VCADD instructions
2016-12-05  Claudiu Zissulescu[ARC] Don't check extAuxRegister second argument for...
2016-12-05  Szabolcs Nagy[ARM] Add ARMv8.3 VJCVT instruction
2016-12-02  Claudiu Zissulescu[ARC] Sync cpu names with the ones accepted by GCC.
2016-11-29  Claudiu Zissulescu[ARC] Add checking for LP_COUNT reg usage, improve...
2016-11-28  Amit PawarX86: Ignore REX_B bit for 32-bit XOP instructions
2016-11-27  Ambrogino ModiglianiFix spelling in comments in Expect scripts (gas)
2016-11-27  Ambrogino ModiglianiFix spelling in comments in Assembler files (gas)
2016-11-27  Ambrogino ModiglianiFix spelling in comments in C source files (gas)
2016-11-25  Jose E. Marchesigas: fix CBCOND diagnostics for invalid immediate operands.
2016-11-23  Jose E. Marchesigas: run the hwcaps-bump tests with 64-bit sparc object...
2016-11-22  Jose E. Marchesigas,opcodes: fix hardware capabilities bumping in the...
2016-11-22  Claudiu Zissulescu[ARC] Fix printing 'b' mnemonics.
2016-11-22  Alan ModraPR20744, Incorrect PowerPC VLE relocs
2016-11-21  Renlin Li[GAS][ARM][PR20827]Fix gas error for two register form...
2016-11-18  Claudiu Zissulescu[ARC] Fix and extend features of .cpu directive.
2016-11-18  Szabolcs Nagy[AArch64] Add ARMv8.3 FCMLA and FCADD instructions
2016-11-18  Szabolcs Nagy[AArch64] Add ARMv8.3 weaker release consistency load...
2016-11-18  Szabolcs Nagy[AArch64] Add ARMv8.3 javascript floating-point convers...
2016-11-18  Szabolcs Nagy[AArch64] Add ARMv8.3 combined pointer authentication...
2016-11-11  Nick CliftonAccept L and LL suffixes to integer constants.
2016-11-11  Szabolcs Nagy[AArch64] Add ARMv8.3 combined pointer authentication...
2016-11-11  Szabolcs Nagy[AArch64] Add ARMv8.3 PACGA instruction
2016-11-11  Szabolcs Nagy[AArch64] Add ARMv8.3 single source PAC instructions
2016-11-11  Szabolcs Nagy[AArch64] Add ARMv8.3 pointer authentication key registers
2016-11-11  Szabolcs Nagy[AArch64] Add ARMv8.3 instructions which are in the...
2016-11-11  Szabolcs Nagy[AArch64] Fix feature dependencies for +simd and +crypto
2016-11-09  H.J. LuX86: Remove the .s suffix from EVEX vpextrw
2016-11-09  H.J. LuX86: Update opcode-suffix.d
2016-11-07  H.J. LuX86: Properly handle bad FPU opcode
2016-11-04  Andrew Burgessarc/nps400: Validate address type operands correctly
2016-11-04  Andreas KrebbelS/390: Fix 16 bit pc relative relocs.
2016-11-03  Graham Markall[ARC] Fix ldbit test on 32-bit systems
2016-11-03  Graham Markallarc: Implement NPS-400 dcmac instruction
2016-11-03  H.J. LuX86: Decode opcode 0x82 as opcode 0x80 in 32-bit mode
2016-11-03  Jiong Wang[ARM] Allow MOV/MOV.W to accept all possible immediates
2016-11-02  Igor TsimbalistEnable Intel AVX512_4VNNIW instructions
2016-11-02  Igor TsimbalistEnable Intel AVX512_4FMAPS instructions
2016-11-01  Nick CliftonAdd support for RISC-V architecture.
2016-10-27  Andrew Burgessgas/arc: Don't rely on bfd list of cpu type for cpu...
2016-10-21  H.J. LuX86: Remove pcommit instruction
2016-10-20  H.J. LuCheck invalid mask registers
2016-10-19  Renlin Li[GAS][ARM]Generate unpredictable warning for pc used...
2016-10-17  Cupertino MirandaFixed matching in newly added test.
2016-10-17  Cupertino MirandaRemoved pseudo invalid instructions opcodes.
2016-10-14  Claudiu Zissulescu[ARC] Disassembler: fix LIMM detection for short instru...
2016-10-11  Nick CliftonEnhance objdump so that it will use .got, .plt and...
2016-10-11  Jiong Wang[AArch64] PR target/20666, fix wrong encoding of new...
2016-10-10  Andreas KrebbelMIPS64: Adjust cfi* testcases.
2016-10-07  Jiong Wang[AArch64] PR target/20667, fix disassembler for the...
2016-10-06  Claudiu Zissulescu[ARC] Fix parsing leave_s and enter_s mnemonics.
2016-10-06  Matthew FortuneRefine .cfi_sections check to only consider compact...
2016-09-30  Jiong Wang[AArch64] PR target/20553, fix opcode mask for SIMD...
2016-09-29  Andreas KrebbelAdd .cfi_val_offset GAS command.
2016-09-29  Alan ModraDisallow 3-operand cmp[l][i] for ppc64
2016-09-21  Richard Sandiford[AArch64] Print spaces after commas in addresses
2016-09-21  Richard Sandiford[AArch64] Use "must" rather than "should" in error...
2016-09-21  Richard Sandiford[AArch64] Add SVE condition codes
2016-09-21  Richard SandifordFix misplaced ChangeLog
2016-09-21  Richard Sandiford[AArch64][SVE 32/32] Add SVE tests
2016-09-21  Richard Sandiford[AArch64][SVE 12/32] Remove boolean parameters from...
2016-09-21  Richard Sandiford[AArch64][SVE 11/32] Tweak aarch64_reg_parse_32_64...
2016-09-21  Richard Sandiford[AArch64][SVE 09/32] Improve error messages for invalid...
2016-09-16  Claudiu Zissulescu[ARC] Disassemble correctly extension instructions.
2016-09-15  Jose E. Marchesigas: run the sparc test dcti-couples-v9 only in ELF...
2016-09-15  Peter BergnerModify POWER9 support to match final ISA 3.0 documentation.
2016-09-14  Jose E. Marchesigas: detect DCTI couples in sparc
2016-09-14  Claudiu Zissulescu[ARC] Fix parsing dtpoff relocation expression.
2016-09-12  Patrick SteuerS/390: Fix kmctr instruction type.
2016-09-07  H.J. LuX86: Allow additional ISAs for IAMCU in assembler
2016-08-26  Jose E. Marchesiopcodes, gas: fix mnemonic of sparc camellia_fl
2016-08-26  Thomas Preud'hommeAdd missing ARMv8-M special registers
2016-08-25  Thomas Preud'hommeRemove _S version of ARM MSR/MRS special registers
2016-08-24  H.J. LuX86: Add ptwrite instruction
2016-08-19  Tamar ChristinaARM: Issue a warning when the MRRC and MRRC2 instructio...
2016-08-19  Nick CliftonPlace .shstrtab section after .symtab and .strtab,...
2016-08-11  Richard Sandiford[AArch64] Reject -0.0 as an 8-bit FP immediate
2016-08-05  Nick CliftonEnsure ARM VPUSH and VPOP instructions do not affect...
2016-08-05  Nick CliftonFix the generation of alignment frags in code sections...
2016-07-29  Jose E. Marchesigas: avoid spurious failures in non-ELF targets in...
2016-07-27  Maciej W. RozyckiMIPS/GAS: Implement microMIPS branch/jump compaction
2016-07-27  Graham MarkallBegin implementing ARC NPS-400 Accelerator instructions
2016-07-26  Maciej W. RozyckiMIPS/GAS: Respect the `insn32' mode in branch relaxation
2016-07-20  Claudiu ZissulescuAdd support to the ARC disassembler for selecting instr...
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