RISC-V/bfd: Hook elf_backend_object_p to set the mach type.
[deliverable/binutils-gdb.git] / include / opcode /
2017-01-04  Szabolcs Nagy[AArch64] Add separate feature flag for weaker release...
2017-01-03  Kito ChengAdd support for the Q extension to the RISCV ISA.
2017-01-02  Alan ModraUpdate year range in copyright notice of all files.
2016-12-31  Dimitar DimitrovPRU BFD support
2016-12-23  Maciej W. RozyckiMIPS16: Add ASMACRO instruction support
2016-12-23  Maciej W. RozyckiMIPS16: Reassign `0' and `4' operand codes
2016-12-23  Maciej W. RozyckiMIPS16: Handle non-extensible instructions correctly
2016-12-21  Alan ModraRemove high bit set characters
2016-12-20  Maciej W. RozyckiMIPS16: Switch to 32-bit opcode table interpretation
2016-12-13  Renlin Li[Binutils][AARCH64]Remove Cn register for coprocessor...
2016-12-09  Maciej W. RozyckiMIPS16: Remove unused `>' operand code
2016-12-07  Maciej W. RozyckiMIPS/include: opcode/mips.h: Correct INSN_CHIP_MASK
2016-12-07  Maciej W. RozyckiMIPS/include: opcode/mips.h: Add a comment for ASE_DSPR3
2016-12-05  Szabolcs Nagy[ARM] Add ARMv8.3 command line option and feature flag
2016-11-29  Claudiu Zissulescu[ARC] Add checking for LP_COUNT reg usage, improve...
2016-11-22  Jose E. Marchesigas,opcodes: fix hardware capabilities bumping in the...
2016-11-22  Alan ModraPR20744, Incorrect PowerPC VLE relocs
2016-11-18  Szabolcs Nagy[AArch64] Add ARMv8.3 FCMLA and FCADD instructions
2016-11-18  Szabolcs Nagy[AArch64] Add ARMv8.3 combined pointer authentication...
2016-11-11  Szabolcs Nagy[AArch64] Add ARMv8.3 PACGA instruction
2016-11-11  Szabolcs Nagy[AArch64] Add ARMv8.3 command line option and feature...
2016-11-04  Thomas Preud'hommeAdd support for ARM Cortex-M33 processor
2016-11-03  Graham Markallarc: Implement NPS-400 dcmac instruction
2016-11-03  Andrew Burgessarc: Change max instruction length to 64-bits
2016-11-03  Graham Markallopcodes/arc: Make some macros 64-bit safe
2016-11-03  Graham Markallarc: Replace ARC_SHORT macro with arc_opcode_len function
2016-11-01  Nick CliftonAdd support for RISC-V architecture.
2016-10-14  Claudiu Zissulescu[ARC] Disassembler: fix LIMM detection for short instru...
2016-09-29  Alan ModraDisallow 3-operand cmp[l][i] for ppc64
2016-09-26  Claudiu Zissulescu[ARC] ISA alignment.
2016-09-21  Richard Sandiford[AArch64] Add SVE condition codes
2016-09-21  Richard Sandiford[AArch64][SVE 31/32] Add SVE instructions
2016-09-21  Richard Sandiford[AArch64][SVE 30/32] Add SVE instruction classes
2016-09-21  Richard Sandiford[AArch64][SVE 29/32] Add new SVE core & FP register...
2016-09-21  Richard Sandiford[AArch64][SVE 28/32] Add SVE FP immediate operands
2016-09-21  Richard Sandiford[AArch64][SVE 27/32] Add SVE integer immediate operands
2016-09-21  Richard Sandiford[AArch64][SVE 26/32] Add SVE MUL VL addressing modes
2016-09-21  Richard Sandiford[AArch64][SVE 25/32] Add support for SVE addressing...
2016-09-21  Richard Sandiford[AArch64][SVE 24/32] Add AARCH64_OPND_SVE_PATTERN_SCALED
2016-09-21  Richard Sandiford[AArch64][SVE 23/32] Add SVE pattern and prfop operands
2016-09-21  Richard Sandiford[AArch64][SVE 22/32] Add qualifiers for merging and...
2016-09-21  Richard Sandiford[AArch64][SVE 21/32] Add Zn and Pn registers
2016-09-21  Richard Sandiford[AArch64][SVE 20/32] Add support for tied operands
2016-09-21  Richard Sandiford[AArch64][SVE 13/32] Add an F_STRICT flag
2016-09-07  Richard Earnshaw[arm] Automatically enable CRC instructions on supporte...
2016-08-26  Cupertino MirandaFixes to legacy ARC relocations.
2016-08-01  Andrew Jenner Fix some PowerPC VLE BFD issues and add some...
2016-07-27  Graham MarkallBegin implementing ARC NPS-400 Accelerator instructions
2016-07-01  Szabolcs Nagy[AArch64] Fix +nofp16 handling
2016-06-30  Matthew Wahab[ARM][GAS] ARMv8.2 should enable ARMv8.1 NEON instructions.
2016-06-29  Trevor Saunderssparc: make SPARC_OPCODE_ARCH_MAX part of its enum
2016-06-28  Richard Sandiford[AArch64] Make register indices be full 64-bit values
2016-06-23  Graham Markall[ARC] Misc minor edits/fixes
2016-06-22  Trevor Saundersaddmore extern C
2016-06-22  Trevor Saunderstilegx: move TILEGX_NUM_PIPELINE_ENCODINGS to tilegx_pi...
2016-06-21  Graham MarkallArc assembler: Convert nps400 from a machine type to...
2016-06-17  Jose E. Marchesibfd,opcodes: sparc: new opcode v9{c,d,e,v,m} architectu...
2016-06-14  John BaldwinChange the size field of MSP430_Opcode_Decoded to a...
2016-06-14  Graham Markall[ARC] Add deep packet inspection instructions for nps
2016-06-09  Jose E. Marchesisparc: add missing comment about hyperprivileged regist...
2016-06-07  Matthew Wahab[ARM] Add command line option for RAS extension.
2016-06-02  Andrew BurgessAdd support for 48 and 64 bit ARC instructions.
2016-06-02  Trevor Saundersadd more extern C
2016-05-26  Trevor Saundersmetag: add extern C to header
2016-05-23  Claudiu Zissulescu[ARC] Update instruction type and delay slot info.
2016-05-23  Claudiu Zissulescu[ARC] Rename "class" named attributes.
2016-05-23  Trevor Saunderstic54x: rename typedef of struct symbol_
2016-05-11  Matthew FortuneAdd MIPS32 DSPr3 support.
2016-05-10  Thomas Preud'hommeAllow extension availability to depend on several archi...
2016-05-10  Thomas Preud'hommeAdd support for ARMv8-M security extensions instructions
2016-05-04  Claudiu Zissulescu[ARC] Add SYNTAX_NOP and SYNTAX_1OP for extension instr...
2016-04-28  Nick CliftonAdd support to AArch64 disassembler for verifying instr...
2016-04-19  Andrew Burgessopcodes/arc: Add yet more nps instructions
2016-04-19  Andrew Burgessopcodes/arc: Add more nps instructions
2016-04-14  Andrew Burgessarc/nps400 : New cmem instructions and associated reloc...
2016-04-12  Claudiu ZissulescuAdd support for .extCondCode, .extCoreRegister and...
2016-04-12  Claudiu ZissulescuAdd support for .extInstruction pseudo-op.
2016-04-05  Claudiu Zissulescu[ARC] Fix support for double assist instructions.
2016-04-05  Claudiu Zissulescu[ARC] 24 bit reloc and overflow detection fix.
2016-03-29  Claudiu Zissulescu[ARC] Add support for Quarkse opcodes.
2016-03-22  Trevor Saundersmake more variables const
2016-03-21  Andrew Burgessarc/nps400: Add first nps400 instructions
2016-03-21  Andrew Burgessarc/opcodes: Use flag operand class to handle multiple...
2016-03-21  Andrew Burgessarc: Add nps400 machine type, and assembler flag.
2016-03-21  Andrew Burgessarc/gas: default mach is arc700, initialised in md_begin
2016-03-08  Claudiu Zissulescu[ARC] Allow non-instruction relocations within .text...
2016-03-07  Trevor SaundersAdd const qualifiers at various places.
2016-03-04  Matthew Wahab[ARM] Add feature check for ARMv8.1 AdvSIMD instructions.
2016-02-19  Jiong Wang[ARM] Add FP16 feature extension for ARMv8.2 architecture
2016-02-10  Claudiu ZissulescuAdd support for ARC instruction relaxation in the assem...
2016-02-09  Nick CliftonFix compile time warnings building the binutils with...
2016-02-04  Nick CliftonFix the encoding of the MSP430's RRUX instruction.
2016-01-19  Miranda CupertinoAdd PIC and TLS support to the ARC target.
2016-01-06  Maciej W. RozyckiMIPS/include: opcode/mips.h: Add a summary of MIPS16...
2016-01-01  Alan ModraCopyright update for binutils
2016-01-01  Alan Modrabinutils ChangeLog rotation
2015-12-30  Alan ModraFix assorted ChangeLog errors
2015-12-24  Thomas Preud'hommeAdd assembler support for ARMv8-M Baseline
2015-12-24  Thomas Preud'hommeAdd assembler support for ARMv8-M Mainline
2015-12-24  Thomas Preud'hommeConsolidate Thumb-1/Thumb-2 ISA detection
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