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Make varobj::children an std::vector
[deliverable/binutils-gdb.git]
/
opcodes
/
ChangeLog
2017-11-22
Igor Tsimbalist
Remove Vec_Disp8 field for vgf2p8mulb for AVX flavor.
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2017-11-22
Igor Tsimbalist
Update ChangeLog
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2017-11-22
claziss
[ARC] Fix handling of ARCv2 H-register class.
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2017-11-21
claziss
[ARC] Improve printing of pc-relative instructions.
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2017-11-16
Tamar Christina
Add new AArch64 FP16 FM{A|S} instructions.
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2017-11-16
Tamar Christina
Add assembler and disassembler support for the new...
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2017-11-16
Jan Beulich
x86: ignore high register select bit(s) in 32- and...
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2017-11-15
Jan Beulich
x86: use correct register names
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2017-11-15
Jan Beulich
x86: drop VEXI4_Fixup()
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2017-11-15
Jan Beulich
x86-64: don't allow use of %axl as accumulator
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2017-11-14
Jan Beulich
x86: add disassembler support for XOP VPCOM* pseudo-ops
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2017-11-14
Jan Beulich
x86: add support for AVX-512 VPCMP*{B,W} pseudo-ops
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2017-11-14
Jan Beulich
x86: string insns don't allow displacements
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2017-11-13
Jan Beulich
x86: {f,}xsave64 / {f,}xrstor64 / xsaveopt64 should...
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2017-11-09
Tamar Christina
Add assembler and disassembler support for the new...
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2017-11-09
Tamar Christina
Add the operand encoding types for the new Armv8.2...
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2017-11-09
Tamar Christina
Adds the new Fields and Operand types for the new instr...
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2017-11-09
Tamar Christina
Split the ARM Crypto ISA extensions for AES and SHA1...
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2017-11-08
Nick Clifton
Split the AArch64 Crypto instructions for AES and SHA1...
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2017-11-08
Jiong Wang
Adds command line support for Armv8.4-A, via the new...
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2017-11-07
Andrew Burgess
opcodes/arc: Fix incorrect insn_class for some nps...
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2017-11-07
Alan Modra
ngettext support
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2017-11-03
claziss
[ARC] Force the disassam to use the hexadecimal number...
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2017-11-03
claziss
[ARC] Sync opcode data base.
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2017-10-25
Alan Modra
PR22348, conflicting global vars in crx and cr16
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2017-10-24
Andrew Waterman
RISC-V: Fix disassembly of c.addi4spn, c.addi16sp,...
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2017-10-23
Igor Tsimbalist
Add missing ChangeLog entries
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2017-10-23
Igor Tsimbalist
Fix the master due to bad regenerated files
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2017-10-18
Eric Botcazou
[Visium] Disassemble the operands of the stop instruction.
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2017-10-13
James Bowman
FT32: support for FT32B processor - part 1
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2017-10-09
Andreas Krebbel
S/390: Sync with latest POP - 3 new instructions
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2017-10-09
Andreas Krebbel
S/390: Sync with IBM z14 POP - SI_RD format
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2017-10-01
Alexander Fedotov
Add new mnemonics for VLE multiple load instructions
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2017-09-27
Nick Clifton
Add support for the new names of the RISC-V fmv.x.s...
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2017-09-26
Nick Clifton
Allow the macw and macl instructions to be used on...
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2017-09-25
Sergio Durigan Junior
Initialize 'imm' on opcodes/aarch64-opc.c:expand_fp_imm...
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2017-09-11
Kuan-Lin Chen
nds32: Rename __BIT() to N32_BIT().
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2017-09-09
H.J. Lu
x86: Remove restriction on NOTRACK prefix position
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2017-08-31
Nick Clifton
Add updated French translations for opcodes and gprof
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2017-08-31
James Bowman
FT32: improve disassembly readability
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2017-08-24
Alexander Fedotov
[PowerPC VLE] Add SPE2 and EFS2 instructions support
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2017-08-23
Alan Modra
ppc-opc.c formatting
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2017-08-22
Palmer Dabbelt
RISC-V: Mark "c.nop" as an alias
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2017-08-21
Alexander Fedotov
[PowerPC VLE] Add LSP (Lightweight Signal Processing...
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2017-08-09
Jiong Wang
[ARM] Don't warn on REG_SP when used in CRC32 instructions
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2017-08-07
H.J. Lu
Mark big and mach with ATTRIBUTE_UNUSED
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2017-08-07
Maciej W. Rozycki
GDB/opcodes: Remove arch/mach/endian disassembler asser...
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2017-07-25
Nick Clifton
Fix typos in error and option messages in OPCODES library.
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2017-07-24
Jiong Wang
[AArch64] Fix the bit pattern order in the comments...
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2017-07-21
Andreas Krebbel
S/390: Support z14 as CPU name.
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2017-07-20
Nick Clifton
Update the German translation for the opcodes library.
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2017-07-19
claziss
[ARC] Add SecureShield AUX registers
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2017-07-19
Claudiu Zissulescu
[ARC] Add SJLI instruction.
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2017-07-19
John Eric Martin
[ARC] Add JLI support.
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2017-07-18
Yuri Chornovian
Fix spelling typos.
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2017-07-14
Ravi Bangoria
binutils/objdump: Fix disassemble for huge elf sections
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2017-07-12
Alan Modra
Update PO files
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2017-07-11
Alan Modra
Mark generated cgen files read-only
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2017-07-07
Alan Modra
Move print_insn_XXX to an opcodes internal header,...
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2017-07-05
Borislav Petkov
X86: Disassemble primary opcode map's group 2 ModRM...
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2017-07-05
Ramana Radhakrishnan
Fixup changelog entries for previous commit
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2017-07-04
Tristan Gingold
Regenerate configure.
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2017-07-03
Tristan Gingold
Regenerate pot files.
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2017-06-30
Maciej W. Rozycki
MIPS/opcodes: Reorder LSA and DLSA instructions
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2017-06-30
Maciej W. Rozycki
MIPS: Add Imagination interAptiv MR2 MIPS32r3 processor...
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2017-06-30
Maciej W. Rozycki
MIPS: Add microMIPS XPA support
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2017-06-30
Maciej W. Rozycki
MIPS: Add microMIPS R5 support
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2017-06-30
Maciej W. Rozycki
MIPS: Fix XPA base and Virtualization ASE instruction...
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2017-06-29
Maciej W. Rozycki
MIPS/opcodes: Correctly combine ASE flags for ASE_MIPS1...
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2017-06-29
Anton Kolesov
[ARC] Use FOR_EACH_DISASSEMBLER_OPTION to iterate over...
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2017-06-29
Anton Kolesov
[ARC] Fix handling of cpu=... disassembler option value
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2017-06-28
Tamar Christina
[AArch64] Add dot product support for AArch64 to binutils
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2017-06-28
Jiong Wang
[ARM] Assembler and disassembler support Dot Product...
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2017-06-28
Maciej W. Rozycki
MIPS: Add Imagination interAptiv MR2 MIPS32r3 processor...
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2017-06-23
Andrew Waterman
RISC-V: Fix SLTI disassembly
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2017-06-21
H.J. Lu
x86: CET v2.0: Update incssp and setssbsy
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2017-06-21
H.J. Lu
x86: CET v2.0: Rename savessp to saveprevssp
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2017-06-21
H.J. Lu
x86: CET v2.0: Update NOTRACK prefix
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2017-06-19
Nick Clifton
Prevent address violation when attempting to disassembl...
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2017-06-16
Alan Modra
Regen rx-decode.c
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2017-06-15
H.J. Lu
i386-dis: Check valid bnd register
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2017-06-15
Nick Clifton
Prevent address violation problem when disassembling...
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2017-06-15
Nick Clifton
Fix address violation when disassembling a corrupt...
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2017-06-15
Nick Clifton
Prevent invalid array accesses when disassembling a...
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2017-06-14
Nick Clifton
Fix seg-fault when trying to disassemble a corrupt...
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2017-06-14
Yao Qi
Don't use print_insn_XXX in GDB
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2017-06-14
Nick Clifton
Fix address violation problems when disassembling a...
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2017-06-14
Andre Vieira
[opcodes][arm] Remove bogus entry added by accident...
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2017-05-30
Anton Kolesov
[ARC] Allow CPU to be enforced via disassemble_info...
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2017-05-24
Yao Qi
Move print_insn_XXX to an opcodes internal header
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2017-05-24
Yao Qi
Use disassemble.c:disassembler select rl78 disassembler
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2017-05-24
Yao Qi
Refactor disassembler selection
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2017-05-22
H.J. Lu
x86: Add NOTRACK prefix support
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2017-05-19
Jose E. Marchesi
binutils: support for the SPARC M8 processor
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2017-05-18
Alan Modra
Don't compare boolean values against TRUE or FALSE
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2017-05-15
Maciej W. Rozycki
MIPS16e2: Add MIPS16e2 ASE support
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2017-05-15
Maciej W. Rozycki
MIPS/opcodes: Remove an incorrect MT ASE reference...
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2017-05-12
Maciej W. Rozycki
MIPS16/opcodes: Make the handling of BREAK and SDBBP...
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2017-05-11
Maciej W. Rozycki
MIPS/opcodes: Mark descriptive SYNC mnemonics as aliases
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2017-05-10
Claudiu Zissulescu
[ARC] Object attributes.
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