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Remove Intel syntax comments on movsx and movzx
[deliverable/binutils-gdb.git]
/
opcodes
/
i386-opc.tbl
2020-02-14
H.J. Lu
Remove Intel syntax comments on movsx and movzx
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2020-02-14
Jan Beulich
x86: replace adhoc (partly wrong) ambiguous operand...
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2020-02-12
Jan Beulich
x86: correct VFPCLASSP{S,D} operand size handling
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2020-02-12
Jan Beulich
x86: fold two JMP templates
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2020-02-12
Jan Beulich
x86-64: Intel64 adjustments for insns dealing with...
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2020-02-11
Jan Beulich
x86: drop ShortForm attribute
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2020-02-11
Jan Beulich
x86: drop stray ShortForm attributes
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2020-02-10
H.J. Lu
x86: Accept Intel64 only instruction by default
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2020-01-30
Jan Beulich
x86-64: honor vendor specifics for near RET
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2020-01-30
Jan Beulich
x86: drop further pointless/bogus DefaultSize
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2020-01-27
H.J. Lu
x86-64: Properly encode and decode movsxd
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2020-01-21
Jan Beulich
x86: improve handling of insns with ambiguous operand...
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2020-01-21
Jan Beulich
x86: VCVTNEPS2BF16{X,Y} should permit broadcasting
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2020-01-17
H.J. Lu
x86: Add {vex} pseudo prefix
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2020-01-16
Jan Beulich
x86: drop stale Vec_Imm4 related comment
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2020-01-16
Jan Beulich
x86: add a few more missing VexWIG
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2020-01-16
Jan Beulich
x86: VPEXTRQ/VPINSRQ are unavailable outside of 64...
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2020-01-09
Jan Beulich
x86: SYSENTER/SYSEXIT are unavailable in 64-bit mode...
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2020-01-01
Alan Modra
Update year range in copyright notice of binutils files
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2019-12-27
Jan Beulich
x86: consolidate Disp<NN> handling a little
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2019-12-04
Jan Beulich
x86-64: accept 64-bit LFS/LGS/LSS forms with suffix...
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2019-12-04
Jan Beulich
x86: drop some stray/bogus DefaultSize
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2019-11-14
Jan Beulich
x86: drop redundant SYSCALL/SYSRET templates
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2019-11-14
Jan Beulich
x86: fold individual Jump* attributes into a single...
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2019-11-14
Jan Beulich
x86: make JumpAbsolute an insn attribute
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2019-11-14
Jan Beulich
x86: make AnySize an insn attribute
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2019-11-12
Jan Beulich
x86: fold EsSeg into IsString
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2019-11-12
Jan Beulich
x86: eliminate ImmExt abuse
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2019-11-12
Jan Beulich
x86: introduce operand type "instance"
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2019-11-08
H.J. Lu
i386: Only check suffix in instruction mnemonic
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2019-11-08
Jan Beulich
x86: convert RegMask and RegBND from bitfield to enumerator
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2019-11-08
Jan Beulich
x86: convert RegSIMD and RegMMX from bitfield to enumerator
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2019-11-08
Jan Beulich
x86: convert Control/Debug/Test from bitfield to enumerator
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2019-11-08
Jan Beulich
x86: convert SReg from bitfield to enumerator
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2019-11-08
Jan Beulich
x86: introduce operand type "class"
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2019-11-07
Jan Beulich
x86: support further AMD Zen2 instructions
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2019-11-07
Jan Beulich
x86/Intel: drop IgnoreSize from operand-less MOVSD...
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2019-10-30
Jan Beulich
x86: re-do "shorthand" handling
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2019-10-30
Jan Beulich
x86: drop stray W
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2019-10-07
Jan Beulich
x86/Intel: correct MOVSD and CMPSD handling
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2019-09-20
Jan Beulich
x86-64: fix handling of PUSH/POP of segment register
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2019-08-07
Jan Beulich
x86: drop stray FloatMF
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2019-07-16
Jan Beulich
x86: make RegMem an opcode modifier
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2019-07-16
Jan Beulich
x86: fold SReg{2,3}
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2019-07-01
Jan Beulich
x86: drop Vec_Imm4
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2019-07-01
Jan Beulich
x86: limit ImmExt abuse
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2019-07-01
Jan Beulich
x86: optimize AND/OR with twice the same register
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2019-07-01
Jan Beulich
x86-64: optimize certain commutative VEX-encoded insns
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2019-07-01
Jan Beulich
x86: optimize EVEX packed integer logical instructions
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2019-07-01
Jan Beulich
x86: add missing pseudo ops for VPCLMULQDQ ISA extension
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2019-07-01
Jan Beulich
x86: drop bogus Disp8MemShift attributes
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2019-06-25
Jan Beulich
x86: fix (dis)assembly of certain SSE2 insns in 16...
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2019-06-25
Jan Beulich
x86-64: also optimize ANDQ with immediate fitting in...
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2019-06-04
H.J. Lu
Enable Intel AVX512_VP2INTERSECT insn
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2019-06-04
H.J. Lu
Add support for Intel ENQCMD[S] instructions
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2019-05-28
H.J. Lu
x86: Add CheckRegSize to AVX512_BF16 instructions with...
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2019-04-08
H.J. Lu
x86: Consolidate AVX512 BF16 entries in i386-opc.tbl
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2019-04-05
Xuepeng Guo
x86: Support Intel AVX512 BF16
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2019-03-18
H.J. Lu
x86: Optimize EVEX vector load/store instructions
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2019-01-01
Alan Modra
Update year range in copyright notice of binutils files
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2018-11-06
Jan Beulich
x86: adjust {,E}VEX.W handling for PEXTR* / PINSR*
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2018-11-06
Jan Beulich
x86: adjust {,E}VEX.W handling outside of 64-bit mode
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2018-11-06
Jan Beulich
x86: fix various non-LIG templates
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2018-11-06
Jan Beulich
x86: allow {store} to select alternative {,}PEXTRW...
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2018-11-06
Jan Beulich
x86: add more VexWIG
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2018-11-06
Jan Beulich
x86: XOP VPHADD* / VPHSUB* are VEX.W0
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2018-10-10
Jan Beulich
x86: fold Size{16,32,64} template attributes
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2018-10-05
H.J. Lu
x86: Add Intel ENCLV to assembler and disassembler
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2018-09-17
H.J. Lu
x86: Set EVex=2 on EVEX.128 only vmovd and vmovq
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2018-09-17
H.J. Lu
x86: Set Vex=1 on VEX.128 only vmovd and vmovq
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2018-09-17
H.J. Lu
x86: Replace VexW=3 with VexWIG
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2018-09-16
H.J. Lu
x86: Set VexW=3 on AVX vrsqrtss
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2018-09-15
H.J. Lu
x86: Set Vex=1 on VEX.128 only vmovq
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2018-09-14
H.J. Lu
x86: Support VEX/EVEX WIG encoding
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2018-09-14
Jan Beulich
x86: fold CRC32 templates
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2018-09-13
H.J. Lu
x86: Remove VexW=1 from WIG VEX movq and vmovq
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2018-09-13
H.J. Lu
i386: Update VexW field for VEX instructions
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2018-09-13
Jan Beulich
x86: drop bogus IgnoreSize from a few further insns
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2018-09-13
Jan Beulich
x86: drop bogus IgnoreSize from AVX512_4* insns
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2018-09-13
Jan Beulich
x86: drop bogus IgnoreSize from AVX512DQ insns
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2018-09-13
Jan Beulich
x86: drop bogus IgnoreSize from AVX512BW insns
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2018-09-13
Jan Beulich
x86: drop bogus IgnoreSize from AVX512VL insns
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2018-09-13
Jan Beulich
x86: drop bogus IgnoreSize from AVX512ER insns
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2018-09-13
Jan Beulich
x86: drop bogus IgnoreSize from AVX512F insns
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2018-09-13
Jan Beulich
x86: drop bogus IgnoreSize from SHA insns
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2018-09-13
Jan Beulich
x86: drop bogus IgnoreSize from XOP and SSE4a insns
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2018-09-13
Jan Beulich
x86: drop bogus IgnoreSize from AVX2 insns
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2018-09-13
Jan Beulich
x86: drop bogus IgnoreSize from AVX insns
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2018-09-13
Jan Beulich
x86: drop bogus IgnoreSize from GNFI insns
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2018-09-13
Jan Beulich
x86: drop bogus IgnoreSize from PCLMUL/VPCLMUL insns
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2018-09-13
Jan Beulich
x86: drop bogus IgnoreSize from AES/VAES insns
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2018-09-13
Jan Beulich
x86: drop bogus IgnoreSize from SSE4.2 insns
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2018-09-13
Jan Beulich
x86: drop bogus IgnoreSize from SSE4.1 insns
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2018-09-13
Jan Beulich
x86: drop bogus IgnoreSize from SSSE3 insns
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2018-09-13
Jan Beulich
x86: drop bogus IgnoreSize from SSE3 insns
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2018-09-13
Jan Beulich
x86: drop bogus IgnoreSize from SSE2 insns
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2018-09-13
Jan Beulich
x86: drop bogus IgnoreSize from SSE insns
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2018-09-13
Jan Beulich
x86: drop unnecessary {,No}Rex64
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2018-09-13
Jan Beulich
x86: also allow D on 3-operand insns
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2018-09-13
Jan Beulich
x86: use D attribute also for SIMD templates
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