merge from gcc

* dwarf2-frame.h (enum dwarf2_frame_reg_rule): Add
DWARF2_FRAME_REG_SAVED_VAL_OFFSET and
DWARF2_FRAME_REG_SAVED_VAL_EXP.
* dwarf2-frame.c (execute_cfa_program): Handle val_offset,
val_offset_sf and val_expression.
(dwarf2_frame_prev_register): Handle the new reg rules.
(dwarf2_frame_this_id): Use pc instead of function entry point.

* dwarf2-frame.c (struct dwarf2_cie): Add signal_frame field.
(dwarf2_frame_sniffer): Use it.
(decode_frame_entry_1): Set it according to augmentation "S".

* config/bfin-parse.y (check_macfunc): Loose the condition of
calling check_multiply_halfregs ().

daily update

*** empty log message ***

    From Peter Schauer <peterschauer@gmx.net>
        * m2-typeprint.c (m2_record_fields): Move variable declarations
        to the begining of the block.

bfd/
* elf.c (assign_file_positions_for_load_sections): Retrieve
maxpagesize from m->p_align if it is valid.  Set p_vaddr,
p_paddr and p_align earlier.  Revert 2006-05-19 change to p_align.
(copy_elf_program_header): Copy p_align.  Set p_align_valid.
include/elf/
* internal.h (elf_segment_map): Add p_align and p_align_valid.

daily update

*** empty log message ***

Remove ">>>>>>> 1.2917".

2006-05-26  H.J. Lu  <hongjiu.lu@intel.com>

* elf64-x86-64.c (ELF_MINPAGESIZE): Changed to 0x1000.

2006-05-25  H.J. Lu  <hongjiu.lu@intel.com>

* elf64-x86-64.c (ELF_MINPAGESIZE): Set to 0x100000.

bfd/

2006-05-25  H.J. Lu  <hongjiu.lu@intel.com>

* elf64-x86-64.c (ELF_MAXPAGESIZE): Updated to 0x200000.

ld/

2006-05-25  H.J. Lu  <hongjiu.lu@intel.com>

* emulparams/elf_x86_64.sh (MAXPAGESIZE): Updated to 0x200000.

ld/testsuite/

2006-05-25  H.J. Lu  <hongjiu.lu@intel.com>

* ld-x86-64/tlsbin.dd: Updated for 2MB maximum page size.
* ld-x86-64/tlsbin.rd: Likewise.
* ld-x86-64/tlsbin.sd: Likewise.
* ld-x86-64/tlsbin.td: Likewise.
* ld-x86-64/tlsbindesc.dd: Likewise.
* ld-x86-64/tlsbindesc.rd: Likewise.
* ld-x86-64/tlsbindesc.sd: Likewise.
* ld-x86-64/tlsbindesc.td: Likewise.
* ld-x86-64/tlsdesc.dd: Likewise.
* ld-x86-64/tlsdesc.pd: Likewise.
* ld-x86-64/tlsdesc.rd: Likewise.
* ld-x86-64/tlsdesc.sd: Likewise.
* ld-x86-64/tlsdesc.td: Likewise.
* ld-x86-64/tlsgdesc.dd: Likewise.
* ld-x86-64/tlspic.dd: Likewise.
* ld-x86-64/tlspic.rd: Likewise.
* ld-x86-64/tlspic.sd: Likewise.
* ld-x86-64/tlspic.td: Likewise.

daily update

*** empty log message ***

* src-release (DEVO_SUPPORT): Add config.rpath.

* elf.c (sym_is_global): Return a bfd_boolean.
(ignore_section_sym): New function.
(elf_map_symbols): Use ignore_section_sym to discard some syms.
(_bfd_elf_symbol_from_bfd_symbol): Ensure section belongs to
bfd before using elf_section_syms.

* MAINTAINERS: Update my email address.

2006-05-25  H.J. Lu  <hongjiu.lu@intel.com>

* config.bfd: (sh-*-linux*): Treat as 64bit target.
(sh*l*-*-netbsdelf*): Likewise.
(sh-*-netbsdelf*): Likewise.
(shl*-*-elf*): Likewise.
(sh[1234]l*-*-elf*): Likewise.
(sh3el*-*-elf*): Likewise.
(shl*-*-kaos*): Likewise.
(sh-*-elf*): Likewise.
(sh[1234]*-elf*): Likewise.
(sh-*-rtems*): Likewise.
(sh-*-kaos*): Likewise.

include/opcodes/
* m68k.h (mcf_mask): Define.

opcodes/
* m68k-opc.c (m68k_opcodes): Fix the masks of the Coldfire fmovemd
and fmovem entries.  Put register list entries before immediate
mask entries.  Use "l" rather than "L" in the fmovem entries.
* m68k-dis.c (match_insn_m68k): Remove the PRIV argument and work it
out from INFO.
(m68k_scan_mask): New function, split out from...
(print_insn_m68k): ...here.  If no architecture has been set,
first try printing an m680x0 instruction, then try a Coldfire one.

gas/testsuite/
* gas/m68k/mcf-fpu.s: Add fmovemd and fmovem instructions.
* gas/m68k/mcf-fpu.d: Adjust accordingly.

2006-05-25  Paolo Bonzini  <bonzini@gnu.org>

* Makefile.def (bfd, opcodes): Fix lib_path.
* Makefile.tpl (POSTSTAGE1_FLAGS_TO_PASS): Replace ADAC with ADAFLAGS.
(restrap): Move under "@if gcc-bootstrap".  Fix typo.
* Makefile.in: Regenerate.

* gas/bfin/vector2.s, gas/bfin/vector2.d: Test to ensure (m) is not
thrown away.

* config/bfin-parse.y (asm_1): Better check and deal with
vector and scalar Multiply 16-Bit Operands instructions.

bfd/

2006-05-24  H.J. Lu  <hongjiu.lu@intel.com>

PR ld/1485
* config.bfd: Set want64 to true if 64bit bfd is used.
(sh-*-linux*): Use targ64_selvecs for 64bit targets.
(sh*l*-*-netbsdelf*): Likewise.
(sh-*-netbsdelf*): Likewise.
(shl*-*-elf*): Likewise.
(sh[1234]l*-*-elf*): Likewise.
(sh3el*-*-elf*): Likewise.
(shl*-*-kaos*): Likewise.
(sh-*-elf*): Likewise.
(sh[1234]*-elf*): Likewise.
(sh-*-rtems*): Likewise.
(sh-*-kaos*): Likewise.

ld/

2006-05-24  H.J. Lu  <hongjiu.lu@intel.com>

PR ld/1485
* configure.in: Use ${srcdir}/../bfd/config.bfd to check 64bit
bfd.  Support 64bit host for --enable-targets=all.
* configure: Regenerated.

*** empty log message ***

daily update

2006-05-24  Paul Brook  <paul@codesourcery.com>

bfd/
* elf-bfd.h (elf_backend_data): Add elf_backend_output_arch_local_syms
* elf32-arm.c (output_arch_syminfo): Define.
(elf32_arm_ouput_plt_map_sym, elf32_arm_output_plt_map,
elf32_arm_output_arch_local_syms): New functions.
(elf_backend_output_arch_local_syms): Define.
* elflink.c (bfd_elf_final_link): Call
elf_backend_output_arch_local_syms.
* elfxx-target.h (elf_backend_output_arch_local_syms): Provide default
definition.
(elfNN_bed): Add elf_backend_output_arch_local_syms.
ld/testsuite/
* ld-arm/arm-app-abs32.d: Update expected output.
* ld-arm/arm-app.d: Ditto.
* ld-arm/arm-lib-plt32.d: Ditto.
* ld-arm/arm-lib.d: Ditto.
* ld-arm/mixed-app-v5.d: Ditto.
* ld-arm/mixed-app.d: Ditto.
* ld-arm/mixed-lib.d: Ditto.

2006-05-24  Paul Brook  <paul@codesourcery.com>

* elf32-arm.c (put_arm_insn, put_thumb_insn): New functions.
(elf32_thumb_to_arm_stub, elf32_arm_to_thumb_stub,
elf32_arm_finish_dynamic_symbol): Use them.

Enable gprof for cross builds.

Add TLS support for hppa-linux

Updated Frewnch translation

Updated Vietnamese and Irish translations

Add support for AVR6 family

2006-05-23  H.J. Lu  <hongjiu.lu@intel.com>

PR ld/2655
PR ld/2657
* ld-elf/eh1.d: New file.
* ld-elf/eh1.s: Likewise.
* ld-elf/eh1a.s: Likewise.
* ld-elf/eh2.d: Likewise.
* ld-elf/eh2a.s: Likewise.
* ld-elf/eh3.d: Likewise.
* ld-elf/eh3.s: Likewise.
* ld-elf/eh3a.s: Likewise.

2006-05-23  H.J. Lu  <hongjiu.lu@intel.com>

PR ld/2655
PR ld/2657
* elf-eh-frame.c (_bfd_elf_write_section_eh_frame): Properly
update CIE/FDE length.  Don't pad to the section alignment.

merge from gcc

*** empty log message ***

daily update

* mt-tdep.c (mt_register_name): Correct out-of-range logic to
include additional registers.

* mt-tdep.c (mt_gdb_regnums): Add ZI2, ZQ2, Ichannel2,
Iscramb2, Qscramb2, Qchannel2.
(mt_register_name): Likewise.
(mt_copro_register_type): Describe ZI2 and ZQ2.

* mt-tdep.c (mt_gdb_regnums): Define
MT_COPRO_PSEUDOREG_MAC_REGNUM.
(mt_register_name): Use it.
(mt_copro_register_type): Likewise.
(mt_register_type): Likewise.
(mt_pseudo_register_read): Likewise.  Read the MAC register, not
the coprocessor register.
(mt_pseudo_register_write): Likewise.

[ gas/ChangeLog ]
* config/tc-mips.c (ISA_SUPPORTS_SMARTMIPS): Rename.
(ISA_SUPPORTS_DSP_ASE, ISA_SUPPORTS_MT_ASE, ISA_HAS_64BIT_FPRS,
ISA_HAS_MXHC1): New macros.
(HAVE_32BIT_FPRS): Use ISA_HAS_64BIT_FPRS instead of
ISA_HAS_64BIT_REGS.  Formatting fixes.  Improved comments.
(mips_cpu_info): Change to use combined ASE/IS_ISA flag.
(MIPS_CPU_IS_ISA, MIPS_CPU_ASE_SMARTMIPS, MIPS_CPU_ASE_DSP,
MIPS_CPU_ASE_MT, MIPS_CPU_ASE_MIPS3D, MIPS_CPU_ASE_MDMX): New defines.
(mips_after_parse_args): Change default handling of float register
size to account for 32bit code with 64bit FP. Better sanity checking
of ISA/ASE/ABI option combinations.
(s_mipsset): Support switching of GPR and FPR sizes via
.set {g,f}p={32,64,default}. Better sanity checking for .set ASE
options.
(mips_elf_final_processing): We should record the use of 64bit FP
registers in 32bit code but we don't, because ELF header flags are
a scarce ressource.
(mips_cpu_info_table): Add ASE flags for CPUs with mandatory ASE
extensions. Add 4ksc, 4kec, 4kem, 4kep, 4ksd, m4kp, 24kec, 24kef,
24kex, 34kc, 34kf, 34kx, 25kf CPU definitions.
(mips_cpu_info_from_isa): Use MIPS_CPU_IS_ISA.
* doc/c-mips.texi: Document .set {g,f}p={32,64,default}. Document
missing -march options. Document .set arch=CPU. Move .set smartmips
to ASE page. Use @code for .set FOO examples.

[ gas/testsuite/Changelog ]
* gas/mips/mips-gp32-fp64-pic.d, mips/mips-gp32-fp64.d,
gas/mips/mips-gp64-fp32-pic.d, gas/mips/mips-gp64-fp32.l,
gas/mips/mips-gp64-fp64.d: Adjust test cases to the changes assembler
output.
* gas/mips/mips-gp32-fp64.l, gas/mips/mips-gp64-fp32-pic.l: New files,
catch assembler warnings.

Updated translation

* config/tc-bfin.c (bfin_start_line_hook): Bump line counters
if needed.

* elf32-bfin.c (bfinfdpic_relocate_section): Clear reloc for
deteted entries in .eh_frame section.

Commit the missing bits of my last patch.

* config/bfin-defs.h (bfin_equals): Remove declaration.
* config/bfin-parse.y (asm_1): Remove "expr ASSIGN expr".
* config/tc-bfin.c (bfin_name_is_register): Remove.
(bfin_equals): Remove.
* config/tc-bfin.h (TC_EQUAL_IN_INSN): Redefine as 1.
(bfin_name_is_register): Remove declaration.

* elf32-bfin.c (bfin_check_relocs): Use __GLOBAL_OFFSET_TABLE_
instead of _GLOBAL_OFFSET_TABLE_.
(bfin_relocate_section): Ditto.
(_bfin_create_got_section): Ditto.
(elf32_bfinfdpic_create_dynamic_sections): Use
__PROCEDURE_LINKAGE_TABLE_ instead of _PROCEDURE_LINKAGE_TABLE_.
(bfin_finish_dynamic_symbol): Use __DYNAMIC instead of _DYNAMIC.

* elf64-ppc.c (compare_symbols): Prefer strong dynamic global
function syms over other syms.

*** empty log message ***

daily update

(Cygwin Native): Fix last change.

2006-05-22  Steve Ellcey  <sje@cup.hp.com>

* MAINTAINERS: Change intl updating instructions.
* config.rpath: Copy from GCC tree.
* intl: Replace contents of intl directory with intl from GCC tree.

bfd/
* elflink.c (_bfd_elf_add_dynamic_entry): Remove DT_TEXTREL
check.
(bfd_elf_final_link): Add a late DT_TEXTREL check.
* elfxx-mips.c (MIPS_ELF_READONLY_SECTION): Define.
(mips_elf_create_dynamic_relocation): Set DF_TEXTREL.
(_bfd_mips_elf_check_relocs): Delete MIPS_READONLY_SECTION.
Use MIPS_ELF_READONLY_SECTION.
(_bfd_mips_elf_size_dynamic_sections): Clear DF_TEXTREL after
creating DT_TEXTREL.
(_bfd_mips_elf_finish_dynamic_sections): Clear textrel markers
if no text relocations were generated.
ld/testsuite/
* ld-mips-elf/textrel-1.d: Relax some patterns.

* po/ru.po: Updated translation.

* iq2000.cpu: Fix include paths for iq2000m.cpu and iq10.cpu.

* gas/mips/mips32-dsp.l: Fix expected unsigned decoding of -1 in warning messages.
* gas/mips/mips32-mt.l: Likewise.

* scripttempl/elf32crx.sc (.rdata): Add .rodata.*.

fix typo

* ld-eld/start.s (start): Add this symbol for SH targets.
  (main): Add this symbol for HPPA targets.

* crx-dis.c (EXTRACT): Make macro work on 64-bit hosts.

Updated Dutch translation

Remove ChangeLog entries, since the template files were already up to date.

Update translation templates

* gdb.texinfo (Cygwin Native): Document set/show cygwin-exceptions.

daily update

*** empty log message ***

(check in missing file)
* win32-nat.c (cygwin_exceptions): New variable.
(handle_exception): Treat a cygwin exception like a normal exception if
cygwin_exceptions is true.
(_initialize_win32_nat): Add "set cygwin-exceptions" handler.

* win32-nat.c (cygwin_exceptions): New variable.
(handle_exception): Treat a cygwin exception like a normal exception if
cygwin_exceptions is true.
(_initialize_win32_nat): Add "set cygwin-exceptions" handler.

daily update

*** empty log message ***

NEWS: (Improved Modula-2 language support): New section.

    * gdb.base/del.exp (test_delete_alias): New function.
        Now check that both "del" and "d" work as aliases for "delete".

    * configure: Regenerate using proper version of autoconf.

*** empty log message ***

daily update

* gas/mips/vxworks1-el.d, gas/mips/vxworks1-xgot-el.d: Add little
endian testcases.
* gas/mips/vxworks1.d, gas/mips/vxworks1-xgot.d: Build as big endian.
* gas/mips/mips.exp: Run new testcases.

Checked in under the 'obvious fix rule'

2006-05-19  Fred Fish  <fnf@specifix.com>
* Makefile.in: Fix spelling of 'explicitly' and 'explicit'.
* dwarfread.c: Fix spelling of 'unexpected'.
* mips-tdep.c: Fix spelling of 'possible' and 'Determine'.
* stack.c: Fix spelling of 'RETURN_VALUE'.

2006-05-19  H.J. Lu  <hongjiu.lu@intel.com>

* elfxx-ia64.c (ELF_MAXPAGESIZE): Fix a typo in comment.

* doc/Makefile.in: Regenerated.

* doc/Makefile.am (addr2line.1): Depend on $(binutils_TEXINFOS).
(ar.1): Likewise.
(dlltool.1): Likewise.
(nlmconv.1): Likewise.
(nm.1): Likewise.
(objcopy.1): Likewise.
(objdump.1): Likewise.
(ranlib.1): Likewise.
(readelf.1): Likewise.
(size.1): Likewise.
(strings.1): Likewise.
(strip.1): Likewise.
(windres.1): Likewise.
(cxxfilt.man): Likewise.
* doc/Makefile.in: Regenerated.

* config/tc-mipc.c (ISA_HAS_ODD_SINGLE_FPR): New define.
(mips_oddfpreg_ok): New function.
(mips_ip): Use it.
-------------------------------------------------------------------

* config/tc-mips.h (tc_mips_regname_to_dw2regnum): Declare.
* config/tc-mipc.c (ABI_NEEDS_64BIT_REGS, ISA_HAS_64BIT_REGS,
ISA_HAS_DROR, ISA_HAS_ROR): Reformat.
(regname, RTYPE_MASK, RTYPE_NUM, RTYPE_FPU, RTYPE_FCC, RTYPE_VEC,
RTYPE_GP, RTYPE_CP0, RTYPE_PC, RTYPE_ACC, RTYPE_CCC, RNUM_MASK,
RWARN, GENERIC_REGISTER_NUMBERS, FPU_REGISTER_NAMES,
FPU_CONDITION_CODE_NAMES, COPROC_CONDITION_CODE_NAMES,
N32N64_SYMBOLIC_REGISTER_NAMES, O32_SYMBOLIC_REGISTER_NAMES,
SYMBOLIC_REGISTER_NAMES, MIPS16_SPECIAL_REGISTER_NAMES,
MDMX_VECTOR_REGISTER_NAMES, MIPS_DSP_ACCUMULATOR_NAMES, reg_names,
reg_names_o32, reg_names_n32n64): Define register classes.
(reg_lookup): New function, use register classes.
(md_begin): Reserve register names in the symbol table. Simplify
OBJ_ELF defines.
(mips_ip): Fix comment formatting. Handle symbolic COP0 registers.
Use reg_lookup.
(mips16_ip): Use reg_lookup.
(tc_get_register): Likewise.
(tc_mips_regname_to_dw2regnum): New function.
-------------------------------------------------------------------

* ld-scripts/empty-orphan.d: Update again.

* config/tc-arm.c, config/tc-arm.h (tc_arm_regname_to_dw2regnum):
Un-constify string argument.
* config/tc-i386.c, config/tc-i386.h (tc_x86_regname_to_dw2regnum):
Likewise.
* config/tc-m68k.c, config/tc-m68k.h (tc_m68k_regname_to_dw2regnum):
Likewise.
* config/tc-ppc.c, config/tc-ppc.h (tc_ppc_regname_to_dw2regnum):
Likewise.
* config/tc-s390.c, config/tc-s390.h (tc_s390_regname_to_dw2regnum):
Likewise.
* config/tc-sh.c, config/tc-sh.h (sh_regname_to_dw2regnum):
Likewise.
* config/tc-sparc.c, config/tc-sparc.h (sparc_regname_to_dw2regnum):
Likewise.
-------------------------------------------------------------------

* gas/config/tc-m68k.c (m68k_init_arch): Move checking of
cfloat/m68881 to correct architecture before using it.

* ld-scripts/empty-orphan.t: Discard .reginfo.
* ld-scripts/empty-orphan.d: Update.

* ldlang.c (lang_size_sections_1): Don't check mem regions for
os->ignored sections.

* elf.c (elf_fake_sections): Formatting.
(assign_file_positions_for_load_sections): Only add SEC_ALLOC
sections to p_memsz.  Remove hack for PT_NOTE sections.  Allow
section alignment to increase p_align for PT_LOAD.
(assign_file_positions_for_non_load_sections): Remove ARM BPABI
hack for PT_DYNAMIC.  Instead, set p_filesz for all segments
other than PT_LOAD, and PT_NOTE in core.

daily update

*** empty log message ***

2006-05-18  Paul Gilliam  <pgilliam@us.ibm.com

* solib-svr4.c (enable_break): Breakup a long line into 3 shorter ones.

Reviewed and approved by Daniel Jacobowitz <drow@false.org>

2006-05-18  Fred Fish  <fnf@specifix.com>
* gdb.base/a2-run.exp: Allow part of test to run when args aren't
required.  Check for spurious output after program exits normally.

daily update

*** empty log message ***

Suggested, reviewed, and approved by Daniel Jacobowitz <drow@false.org>

2006-05-17  Fred Fish  <fnf@specifix.com>
* gdb.base/relocate.exp: Use gdb_file_cmd rather than
gdb_load, so it works in the simulator.

* avr-dis.c: Formatting fix.

2006-05-17  Carlos O'Donell  <carlos@codesourcery.com>

* doc/binutils.texi: Use "Binutils Index" for index name.

* src-release (MAKEINFOFLAGS): Define.
(do-proto-toplev): Pass MAKEINFOFLAGS to submakes.

* ldlang.c (lang_size_sections): Call lang_reset_memory_regions
before redoing one_lang_size_sections_pass.

Fix a typo.