Arnd Bergmann [Tue, 10 May 2016 20:19:36 +0000 (22:19 +0200)]
Merge tag 'imx-dt64-4.7' of git://git./linux/kernel/git/shawnguo/linux into next/dt64
Merge "The Freescale/NXP arm64 device tree updates for 4.7" from Shawn Guo:
- New board support of LS1043a-QDS from Freescale/NXP
- Add new compatible for LS1043A and LS2080A GPIO devices
- Update device tree bindings and sources for LS2080A fsl-mc device
- Update QSPI and DSPI support on LS1043A and LS2080A
* tag 'imx-dt64-4.7' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
arm64: dts: ls2080a: fsl-mc dt node updates
Documentation: fsl-mc: binding updates for MSIs, ranges, PHYs
arm64: dts: ls1043a: add the DTS node for QSPI support
Documentation: fsl-quadspi: Add fsl,ls1043a-qspi compatible string
arm64: dts: ls2080a: Add compatible "fsl,ls2080a-gpio" for ls2080a gpio nodes
arm64: dts: ls1043a: Add compatible "fsl,qoriq-gpio" for ls1043a gpio nodes
arm64: dts: ls2080a: update the DTS for QSPI and DSPI support
Documentation: fsl: dspi: Add fsl,ls2080a-dspi compatible string
arm64: dts: ls1043a-rdb: add the DTS for DSPI support
arm64: dts: add LS1043a-QDS board support
Documentation: DT: Add entry for Freescale LS1043a-QDS board
Arnd Bergmann [Tue, 10 May 2016 20:19:00 +0000 (22:19 +0200)]
Merge tag 'v4.6-next-dts64' of https://github.com/mbgg/linux-mediatek into next/dt64
Merge "ARM: mediatek: dts64 updates for v4.7" from Matthias Brugger:
- add thermal and auxadc device nodes to mt8173
- add thermal zone nodes to mt8173
* tag 'v4.6-next-dts64' of https://github.com/mbgg/linux-mediatek:
arm64: dts: mt8173: Add thermal zone node.
ARM64: dts: mt8173: Add thermal/auxadc device nodes
Arnd Bergmann [Tue, 10 May 2016 20:18:14 +0000 (22:18 +0200)]
Merge tag 'tegra-for-4.7-gm20b' of git://git./linux/kernel/git/tegra/linux into next/dt64
Merge "arm64: tegra: Enable GM20B GPU on Tegra210" from Thierry Reding:
Complement the GM20B GPU device tree node on Tegra210 with missing
properties to make it usable.
* tag 'tegra-for-4.7-gm20b' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
arm64: tegra: Add IOMMU node to GM20B on Tegra210
arm64: tegra: Add reference clock to GM20B on Tegra210
dt-bindings: Add documentation for GM20B GPU
dt-bindings: gk20a: Document iommus property
dt-bindings: gk20a: Fix typo in compatible name
Arnd Bergmann [Tue, 10 May 2016 20:16:51 +0000 (22:16 +0200)]
Merge tag 'tegra-for-4.7-gpio' of git://git./linux/kernel/git/tegra/linux into next/dt64
Merge "dt-bindings: gpio: tegra: Add Tegra186 support" from Thierry Reding:
Adds device tree bindings for the GPIO and AON controllers found on the
Tegra186 SoC.
* tag 'tegra-for-4.7-gpio' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
ARM: tegra: Add DT binding for Tegra186 GPIO controllers
ARM: tegra: Fix naming in GPIO DT binding header
Arnd Bergmann [Tue, 10 May 2016 20:14:52 +0000 (22:14 +0200)]
Merge tag 'mvebu-dt64-4.7-1' of git://git.infradead.org/linux-mvebu into next/dt64
Merge "mvebu dt64 for 4.7" from Gregory CLEMENT:
- switch to label in the mvebu arm64 device tree
- use new clock binding on Armada 7K/8K
- improve SPI and I2C description on Armada 7K/8k
- add CP110 block adding PCIe, SATA and USB3
- add XOR support on Armada 3700
- few more little fix
* tag 'mvebu-dt64-4.7-1' of git://git.infradead.org/linux-mvebu:
arm64: dts: marvell: add XOR node for Armada 3700 SoC
arm64: dts: marvell: Use a SoC-specific compatible for xHCI on Armada37xx
arm64: dts: marvell: Rename armada-37xx USB node
arm64: dts: marvell: Clean up armada-3720-db
arm64: dts: marvell: enable several CP interfaces on Armada 7040-DB
arm64: dts: marvell: initial DT description of Armada 7K/8K CP110 master
arm64: dts: marvell: use the proper I2C controller compatible string for 7K/8K
arm64: dts: marvell: improve SPI flash description on Armada 7040-DB
arm64: dts: marvell: use new clock binding on Armada AP806
arm64: dts: marvell: add UART aliases and define stdout-path
arm64: dts: marvell: rename armada-ap806 XOR nodes
arm64: dts: marvell: clean up armada-7040-db
Arnd Bergmann [Tue, 10 May 2016 20:06:49 +0000 (22:06 +0200)]
Merge tag 'v4.7-rockchip-dts64-2' of git://git./linux/kernel/git/mmind/linux-rockchip into next/dt64
Merge "Rockchip dts64 updates for v4.7 - part2" from Heiko Stübner:
Adding the new rk3399 core devicetree support as well as a board
dts for the evaluation board of this chip and similar to the arm32
side also move the rk3368 thermal data into the core soc dtsi, as
there really is no need to keep it separate.
* tag 'v4.7-rockchip-dts64-2' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
dt-bindings: document rockchip rk3399-evb board
arm64: dts: rockchip: add dts file for RK3399 evaluation board
arm64: dts: rockchip: add core dtsi file for RK3399 SoCs
dt-bindings: rockchip-dw-mshc: add description for rk3399
clk: rockchip: export some necessary rk3399 clock ids
clk: rockchip: rename rga clock-id on rk3399
clk: rockchip: add general gpu soft-reset on rk3399
arm64: dts: rockchip: move the rk3368 thermal data into rk3368.dtsi
clk: rockchip: fix checkpatch errors in rk3399 dt-binding header
clk: rockchip: add dt-binding header for rk3399
Arnd Bergmann [Tue, 10 May 2016 11:48:48 +0000 (13:48 +0200)]
Merge branch 'renesas/fixes-2' into next/dt64
This merges fixes from linux-4.6 into the next/dt64 tree to avoid
a later merge conflict.
* renesas/fixes-2:
arm64: dts: r8a7795: Don't disable referenced optional scif clock
ARM: shmobile: timer: Fix preset_lpj leading to too short delays
Revert "ARM: dts: porter: Enable SCIF_CLK frequency and pins"
ARM: dts: r8a7791: Don't disable referenced optional clocks
Gregory CLEMENT [Fri, 29 Apr 2016 07:49:09 +0000 (09:49 +0200)]
arm64: dts: marvell: add XOR node for Armada 3700 SoC
Armada 3700 SoC comprise one dual-channel XOR engine and this
patch adds its according representation.
Signed-off-by: Marcin Wojtas <mw@semihalf.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Jianqun Xu [Wed, 27 Apr 2016 07:54:52 +0000 (15:54 +0800)]
dt-bindings: document rockchip rk3399-evb board
Use "rockchip,rk3399-evb" compatible string for Rockchip RK3399
evaluation board.
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Jianqun Xu [Wed, 27 Apr 2016 07:54:53 +0000 (15:54 +0800)]
arm64: dts: rockchip: add dts file for RK3399 evaluation board
This patch add rk3399-evb.dts for RK3399 evaluation board.
Tested on RK3399 evb.
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Jianqun Xu [Wed, 27 Apr 2016 07:54:51 +0000 (15:54 +0800)]
arm64: dts: rockchip: add core dtsi file for RK3399 SoCs
This patch adds core dtsi file for Rockchip RK3399 SoCs.
The RK3399 has big/little architecture, which needs a separate
node for the PMU of each microarchitecture, for now it missing
the pmu node since the old one could not work well.
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
Tested-by: Brian Norris <briannorris@chromium.org>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Arnd Bergmann [Thu, 28 Apr 2016 14:16:00 +0000 (16:16 +0200)]
Merge tag 'hip0x-dt-for-4.7' of git://github.com/hisilicon/linux-hisi into next/dt64
Merge "ARM64: DT: Hisilicon hip05 and hip06 updates for 4.7" Wei Xu:
- Fix its node without msi-cells for hip05
- Add nor flash node for hip05 D02 board
- Add initial dts for hip06 D03 board
- Reorder and add the hip06 D03 binding in the binding document
* tag 'hip0x-dt-for-4.7' of git://github.com/hisilicon/linux-hisi:
Documentation: arm64: Add Hisilicon Hip06 D03 dts binding
arm64: dts: Add initial dts for Hisilicon Hip06 D03 board
arm64: dts: hip05: Add nor flash support
arm64: dts: hip05: fix its node without msi-cells
Arnd Bergmann [Thu, 28 Apr 2016 14:11:54 +0000 (16:11 +0200)]
Merge tag 'renesas-arm64-dt2-for-v4.7' of git://git./linux/kernel/git/horms/renesas into next/dt64
Merge "Second Round of Renesas ARM64 Based SoC DT Updates for v4.7" from Simon Horman:
* Don't disable referenced optional clocks in DT of r8a7795 SoC
* Populate EXTALR in DT of salvator-x board
* Enable PCIe in DT of salvator-x board
* tag 'renesas-arm64-dt2-for-v4.7' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
arm64: dts: r8a7795: Don't disable referenced optional clocks
arm64: dts: salvator-x: populate EXTALR
arm64: dts: r8a7795: enable PCIe on Salvator-X
arm64: dts: r8a7795: Add PCIe nodes
arm64: dts: r8a7795: Use USB3.0 fallback compatibility string
arm64: dts: r8a7795: Add CAN support
arm64: dts: r8a7795: Add CAN external clock support
Heiko Stuebner [Wed, 27 Apr 2016 21:22:04 +0000 (23:22 +0200)]
Merge branch 'v4.7-shared/clkids' into v4.7-armsoc/dts64
Shawn Lin [Wed, 27 Apr 2016 07:54:50 +0000 (15:54 +0800)]
dt-bindings: rockchip-dw-mshc: add description for rk3399
Add "rockchip,rk3399-dw-mshc", "rockchip,rk3288-dw-mshc" for
dwmmc on rk3399 platform.
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Gregory CLEMENT [Wed, 27 Apr 2016 13:36:42 +0000 (15:36 +0200)]
arm64: dts: marvell: Use a SoC-specific compatible for xHCI on Armada37xx
Even if the Armada 37xx does not any specific setup, the device tree
binding documentation requires to use a SoC-specific version
corresponding to the platform first followed by the generic version.
This patch introduce this new compatible string and updates the
documentation accordingly.
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Andreas Färber [Wed, 23 Mar 2016 22:24:19 +0000 (23:24 +0100)]
arm64: dts: marvell: Rename armada-37xx USB node
No need to reflect the USB version in the node name.
Cc: Gregory CLEMENT <gregory.clement@free-electrons.com>
Signed-off-by: Andreas Färber <afaerber@suse.de>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
[gregory.clement@free-electrons.com: drop Fixes tag as it is not a bug fix.]
Andreas Färber [Wed, 23 Mar 2016 22:24:18 +0000 (23:24 +0100)]
arm64: dts: marvell: Clean up armada-3720-db
Instead of duplicating the SoC's node hierarchy, including a bus node
named "internal-regs", reference the actually desired nodes by label,
like Berlin already does. Add labels where necessary.
Drop an inconsistent white line while at it.
Cc: Gregory CLEMENT <gregory.clement@free-electrons.com>
Signed-off-by: Andreas Färber <afaerber@suse.de>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
[gregory.clement@free-electrons.com: drop Fixes tag as it is not a bug fix.]
Kefeng Wang [Fri, 8 Apr 2016 07:27:12 +0000 (15:27 +0800)]
Documentation: arm64: Add Hisilicon Hip06 D03 dts binding
This patch adds documentation for the devicetree bindings used by
the DT files of Hisilicon Hip06 D03 board.
Meanwhile, reorder the soc/board name alphabetically.
Signed-off-by: Kefeng Wang <wangkefeng.wang@huawei.com>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
Kefeng Wang [Fri, 8 Apr 2016 07:27:11 +0000 (15:27 +0800)]
arm64: dts: Add initial dts for Hisilicon Hip06 D03 board
The Hip06 soc has same cpu topology compared with Hip05, four clusters
and each cluster has quard Cortex-A57, but with different IO part,
like HNS, SAS and PCI, they are all upgraded. There are also not same
in ITS, MBIGEN and SMMU, etc.
This patch adds the initial dts for hip06 d03 board.
Note, there is no serial, because the soc use LPC uart, the serial node
is not needed.
Signed-off-by: Kefeng Wang <wangkefeng.wang@huawei.com>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
Kefeng Wang [Fri, 8 Apr 2016 07:31:51 +0000 (15:31 +0800)]
arm64: dts: hip05: Add nor flash support
This patch is to add support nor-flash. Notice, the pre-defined
partitions may not be used.
Signed-off-by: Kefeng Wang <wangkefeng.wang@huawei.com>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
Kefeng Wang [Fri, 8 Apr 2016 07:31:50 +0000 (15:31 +0800)]
arm64: dts: hip05: fix its node without msi-cells
Fix commit
abf9c25d55e8 ("arm64: dts: hip05: Append all gicv3 ITS
entries"), it forgets the property msi-cell, see arm,gic-v3.txt.
Signed-off-by: Kefeng Wang <wangkefeng.wang@huawei.com>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
Geert Uytterhoeven [Mon, 25 Apr 2016 14:08:30 +0000 (16:08 +0200)]
arm64: dts: r8a7795: Don't disable referenced optional clocks
clk_get() on a disabled clock node will return -EPROBE_DEFER, which can
cause drivers to be deferred forever if such clocks are referenced in
their devices' clocks properties.
Update the various disabled external clock nodes to default to a
frequency of 0, but don't disable them, to prevent this.
Reported-by: Jürg Billeter <j@bitron.ch>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Wolfram Sang [Wed, 30 Mar 2016 14:58:22 +0000 (16:58 +0200)]
arm64: dts: salvator-x: populate EXTALR
It can be used for the watchdog.
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Phil Edworthy [Tue, 5 Apr 2016 10:51:27 +0000 (11:51 +0100)]
arm64: dts: r8a7795: enable PCIe on Salvator-X
Signed-off-by: Phil Edworthy <phil.edworthy@renesas.com>
Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Phil Edworthy [Tue, 5 Apr 2016 10:51:26 +0000 (11:51 +0100)]
arm64: dts: r8a7795: Add PCIe nodes
Signed-off-by: Phil Edworthy <phil.edworthy@renesas.com>
Acked-by: Geert Uytterhoeven <geert+renesas@glider.be
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Alexandre Courbot [Mon, 28 Mar 2016 09:23:04 +0000 (18:23 +0900)]
arm64: tegra: Add IOMMU node to GM20B on Tegra210
The operating system driver can take advantage of the IOMMU to remove
the need for physically contiguous memory buffers.
Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Alexandre Courbot [Mon, 28 Mar 2016 09:23:03 +0000 (18:23 +0900)]
arm64: tegra: Add reference clock to GM20B on Tegra210
This clock is required for the GPU to operate.
Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Alexandre Courbot [Mon, 28 Mar 2016 09:23:02 +0000 (18:23 +0900)]
dt-bindings: Add documentation for GM20B GPU
GM20B's definition is mostly similar to GK20A's, but requires an
additional clock.
Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Alexandre Courbot [Mon, 28 Mar 2016 09:23:01 +0000 (18:23 +0900)]
dt-bindings: gk20a: Document iommus property
GK20A can optionally make use of an IOMMU.
Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Alexandre Courbot [Mon, 28 Mar 2016 09:23:00 +0000 (18:23 +0900)]
dt-bindings: gk20a: Fix typo in compatible name
The correct compatible name is "nvidia,gk20a".
Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Thomas Petazzoni [Tue, 26 Apr 2016 07:58:37 +0000 (09:58 +0200)]
arm64: dts: marvell: enable several CP interfaces on Armada 7040-DB
This commit enables several interfaces of the CP side of the Armada
7040 for the Armada 7040 DB board:
- one PCIe interface
- one SPI controller with an attached SPI flash
- one I2C controller
- one SATA controller
- two USB3 controllers
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Thomas Petazzoni [Tue, 26 Apr 2016 07:58:36 +0000 (09:58 +0200)]
arm64: dts: marvell: initial DT description of Armada 7K/8K CP110 master
This commit adds an initial Device Tree description for the CP110
master that is found in the Armada 7K and 8K SoCs. This initial
description describes:
- the system controller (to provide clocks)
- three PCIe interfaces
- the SATA interface
- the I2C controllers
- the SPI controllers
For the record, the organization of the SoCs is as follows:
- 7020: dual-core AP, one CP110 (master)
- 7040: quad-core AP, one CP110 (master)
- 8020: dual-core AP, two CP110s (master and slave)
- 8040: quad-core AP, two CP110s (master and slave)
For this reason, all of the 7020, 7040, 8020 and 8040 include
armada-cp110-master.dtsi. When support for the second CP110 (slave)
used in 8020 and 8040 will be added, the .dtsi files for those SoCs
will in addition include armada-cp110-slave.dtsi.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Thomas Petazzoni [Tue, 26 Apr 2016 07:58:35 +0000 (09:58 +0200)]
arm64: dts: marvell: use the proper I2C controller compatible string for 7K/8K
The I2C controller found in the Marvell Armada 7K/8K provides the
bridge/offloading features, so the Device Tree should use the
marvell,mv78230-i2c compatible string instead of marvell,mv64xxx-i2c.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Thomas Petazzoni [Tue, 26 Apr 2016 07:58:34 +0000 (09:58 +0200)]
arm64: dts: marvell: improve SPI flash description on Armada 7040-DB
This commit slightly improves the description of the SPI flash
connected to the SPI controller of the Armada 7040, by:
- Using the more generic "jedec,spi-nor" compatible string, which
lets the driver auto-detect the exact SPI flash type.
- Removing the silly comment about the Chip Select, since reg = <0>
is explicit enough.
- Switching to the new Device Tree binding to describe flash
partitions.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Thomas Petazzoni [Tue, 26 Apr 2016 07:58:33 +0000 (09:58 +0200)]
arm64: dts: marvell: use new clock binding on Armada AP806
This commit updates the Marvell AP806 Device Tree description to make
use of the accepted clock Device Tree binding.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Thomas Petazzoni [Tue, 26 Apr 2016 07:58:32 +0000 (09:58 +0200)]
arm64: dts: marvell: add UART aliases and define stdout-path
This commit adds the necessary UART aliases to the main Armada 7K/8K
.dtsi file, and uses them to define the /chosen/stdout-path property
on the Armada 7040 DB board.
Suggested-by: Andreas Färber <afaerber@suse.de>
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Andreas Färber [Tue, 26 Apr 2016 07:58:31 +0000 (09:58 +0200)]
arm64: dts: marvell: rename armada-ap806 XOR nodes
Node names should not contain an instance number, the unit address
serves to distinguish nodes of the same name. So rename the XOR nodes
to just xor@<address>.
Cc: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Andreas Färber <afaerber@suse.de>
[Thomas:
- remove labels, they are really not needed for XOR engines.
- remove the Fixes: tag, as this is not a fix.]
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Andreas Färber [Tue, 26 Apr 2016 07:58:30 +0000 (09:58 +0200)]
arm64: dts: marvell: clean up armada-7040-db
Instead of duplicating the node hierarchy, reference the nodes by label,
adding labels where necessary.
Drop some trailing or inconsistent white lines while at it.
Cc: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Andreas Färber <afaerber@suse.de>
[Thomas: drop Fixes tag as it is not a bug fix.]
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Stuart Yoder [Tue, 19 Apr 2016 21:53:17 +0000 (16:53 -0500)]
arm64: dts: ls2080a: fsl-mc dt node updates
updates to the fsl-mc node for full functionality:
-msi-parent is needed for interrupt support
-ranges is needed to enable the bus driver to translate bus addresses
-dpmac nodes provide a basis for relating dpmac objects to PHYs
Signed-off-by: Stuart Yoder <stuart.yoder@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Stuart Yoder [Tue, 19 Apr 2016 21:53:08 +0000 (16:53 -0500)]
Documentation: fsl-mc: binding updates for MSIs, ranges, PHYs
-The Freescale Management Complex and all associated objects
use message interrupts, and thus an msi-parent is required.
-Define a ranges property to specify the mapping between
the MC address space and the system address space.
-The fsl-mc node may optionally have dpmac sub-nodes that describe
the relationship between the Ethernet MACs which belong to the MC
and the Ethernet PHYs on the system board.
Signed-off-by: Stuart Yoder <stuart.yoder@nxp.com>
Acked-by: J. German Rivera <German.Rivera@nxp.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Geert Uytterhoeven [Mon, 25 Apr 2016 14:08:30 +0000 (16:08 +0200)]
arm64: dts: r8a7795: Don't disable referenced optional scif clock
clk_get() on a disabled clock node will return -EPROBE_DEFER, which can
cause drivers to be deferred forever if such clocks are referenced in
their devices' clocks properties.
Update the disabled external scif clock node so that it
is not disabled to prevent this.
Reported-by: Jürg Billeter <j@bitron.ch>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
[simon: fix for v4.6 extracted from a larger patch targeted at v4.7]
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Masahiro Yamada [Thu, 21 Apr 2016 06:01:09 +0000 (15:01 +0900)]
arm64: dts: uniphier: add reference clock node for PH1-LD20
Add a master clock node generated by a 25MHz crystal oscillator.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Masahiro Yamada [Thu, 21 Apr 2016 05:58:41 +0000 (14:58 +0900)]
arm64: dts: uniphier: use Daughter board on PH1-LD20 reference board
Include the development base board, which is equipped with some
devices such as EEPROM.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Arnd Bergmann [Mon, 25 Apr 2016 20:54:20 +0000 (22:54 +0200)]
Merge tag 'arm-soc/for-4.7/devicetree-arm64' of github.com/Broadcom/stblinux into next/dt64
Pull "Broadcom ARM64-based SoC Device Tree changes" from Florian Fainelli:
- Anup enables a bunch of standard peripherals in the Northstar 2 DTS: PL330
DMA, GIC maintenance interrupt, PL022 SPI controller
- Anup also re-orgnanizes the clock Device Tree fragments into a separate file
for consistency with how other Broadcom SoCs are doing this
- Luke switches the SMP enable-method and reboot from a spin-table + syscon to
the standard PSCI 1.0 firmware interface
* tag 'arm-soc/for-4.7/devicetree-arm64' of http://github.com/Broadcom/stblinux:
arm64: dts: NS2 secondary core enablement via PSCI
arm64: dts: Add ARM PL022 SPI DT nodes for NS2
arm64: dts: Move NS2 clock DT nodes to separate DT file
arm64: dts: Add maintenance interrupt for GIC in NS2 DT
arm64: dts: Add ARM PL330 DMA DT node for NS2
Arnd Bergmann [Mon, 25 Apr 2016 20:53:01 +0000 (22:53 +0200)]
Merge tag 'xgene-dts-for-v4.7-part1' of https://github.com/AppliedMicro/xgene-next into next/dt64
Merge "First part of X-Gene DTS changes queued for v4.7" from Duc Dang:
This patch set only includes a single change to
fix the compatible string for SATA controllers on
X-Gene v2 SOC platforms.
* tag 'xgene-dts-for-v4.7-part1' of https://github.com/AppliedMicro/xgene-next:
arm64: dts: apm: Fix compatible string for X-Gene 2 SATA controller DTS node
Arnd Bergmann [Mon, 25 Apr 2016 20:51:50 +0000 (22:51 +0200)]
Merge tag 'hi6220-dt-for-4.7' of git://github.com/hisilicon/linux-hisi into next/dt64
Pull "ARM64: DT: Hisilicon Hi6220 soc and hikey board updates for 4.7" from Wei Xu
- Reserve memory regions for Hi6220
- Add sp804 timer node for Hi6220
- Add cpu and cluster level's low power state for Hi6220
- Add gpio configuration nodes for Hi6220
- Add pinctrl configuration nodes for Hi6220
- Add spi related nodes for Hi6220
- Add i2c nodes for Hi6220
- Add i2c nodes to work with mezzanine boards
- Add usb nodes for Hi6220
- Add mailobx node for Hi6220
- Add SRAM node and stub clock node for Hi6220
- Add pinctrl nodes for uarts and enable them
- Add LED nodes for hi6220-hikey board
- Add hi655x pmic node for Hi6220
- Add dwmmc nodes for Hi6220
- Add wifi nodes support for Hi6220-Hikey board
- Register thermal sensor for Hi6220
- Register Hi6220's thermal zone for power allocator
- Add L2 cache topology for Hi6220
* tag 'hi6220-dt-for-4.7' of git://github.com/hisilicon/linux-hisi:
arm64: dts: Add L2 cache topology to Hi6220
arm64: dts: register Hi6220's thermal zone for power allocator
arm64: dts: register Hi6220's thermal sensor
arm64: dts: add wifi nodes support for hi6220-hikey
arm64: dts: add dwmmc nodes for hi6220
arm64: dts: hikey: Add hi655x pmic dts node
arm64: dts: add LED nodes for hi6220-hikey
arm64: dts: hi6220: add pinctrl for uarts and enable them
arm64: dts: add Hi6220's stub clock node
arm64: dts: add mailbox node for Hi6220
arm64: dts: Add hi6220 usb node
arm64: dts: hikey: enable i2c0 and i2c1 for working with mezzanine boards
arm64: dts: add all hi6220 i2c nodes
arm64: dts: add Hi6220 spi configuration nodes
arm64: dts: add Hi6220 pinctrl configuration nodes
arm64: dts: Add Hi6220 gpio configuration nodes
arm64: dts: enable idle states for Hi6220
arm64: dts: add sp804 timer node for Hi6220
arm64: dts: Reserve memory regions for hi6220
Arnd Bergmann [Mon, 25 Apr 2016 20:50:23 +0000 (22:50 +0200)]
Merge tag 'juno-for-v4.7/dt-updates' of git://git./linux/kernel/git/sudeep.holla/linux into next/dt64
Pull "ARMv8 Juno DT updates for v4.7" from Sudeep Holla:
Just one update: Support for external expansion bus useful for
additional hardware e.g.LogicTile Express daughterboards (Brian Starkey)
* tag 'juno-for-v4.7/dt-updates' of git://git.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux:
arm64: dts: juno: Add external expansion bus to DT
Arnd Bergmann [Mon, 25 Apr 2016 20:48:51 +0000 (22:48 +0200)]
Merge tag 'tegra-for-4.7-arm64' of git://git./linux/kernel/git/tegra/linux into next/dt64
Merge "arm64: tegra: Changes for v4.7-rc1" from Thierry Reding
A couple of cleanups and fixes to various device trees, enable power and
volume keys on Jetson TX1, use stdout-path to define the serial port (so
it doesn't have to be specified on the kernel command-line) and add
Google Pixel C (a.k.a. Smaug) support.
* tag 'tegra-for-4.7-arm64' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
arm64: tegra: Enable cros-ec and charger on Smaug
arm64: tegra: Add pinmux for Smaug board
arm64: tegra: Add stdout-path for various boards
arm64: tegra: Remove unused #power-domain-cells property
arm64: tegra: Add gpio-keys nodes for Smaug
arm64: tegra: Enable power and volume keys on Jetson TX1
arm64: tegra: Add support for Google Pixel C
arm64: tegra: Replace legacy *,wakeup property with wakeup-source
arm64: tegra: Fix copy/paste typo in several DTS includes
arm64: tegra: Remove 0, prefix from unit-addresses
Arnd Bergmann [Mon, 25 Apr 2016 20:47:43 +0000 (22:47 +0200)]
Merge tag 'samsung-dt64-4.7' of git://git./linux/kernel/git/krzk/linux into next/dt64
Merge "Samsung Device Tree ARM64 updates and improvements for v4.7" from Krzysztof Kozlowski:
1. Add PL330 DMA controller and Thermal Management Unit to Exynos 7.
* tag 'samsung-dt64-4.7' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux:
arm64: dts: Add nodes for pdma0 and pdma1 for exynos7
arm64: dts: exynos: Add TMU node for exynos7
Xing Zheng [Wed, 20 Apr 2016 11:06:49 +0000 (19:06 +0800)]
clk: rockchip: export some necessary rk3399 clock ids
We export some clock IDs for the reference drivers need them.
Signed-off-by: Xing Zheng <zhengxing@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Xing Zheng [Wed, 20 Apr 2016 11:06:49 +0000 (19:06 +0800)]
clk: rockchip: rename rga clock-id on rk3399
The rga clock supplying the working clock on the rk3399 is actually
called rga-core in the manual. As the clock id has neither been
assigned nor released with a full kernel release, we can still change
the id to the more appropriate naming.
Signed-off-by: Xing Zheng <zhengxing@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Xing Zheng [Wed, 20 Apr 2016 11:06:49 +0000 (19:06 +0800)]
clk: rockchip: add general gpu soft-reset on rk3399
Add the id for the general gpu soft-reset, that got documented only in
newer TRM versions.
Signed-off-by: Xing Zheng <zhengxing@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Caesar Wang [Fri, 22 Apr 2016 10:02:54 +0000 (18:02 +0800)]
arm64: dts: rockchip: move the rk3368 thermal data into rk3368.dtsi
In order to be standard to manage for rockchip SoCs, move the thermal
data into rk3368 dtsi, we needn't to add a new file for thermal.
Signed-off-by: Caesar Wang <wxt@rock-chips.com>
Cc: Zhang Rui <rui.zhang@intel.com>
Cc: Eduardo Valentin <edubezval@gmail.com>
Cc: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Luke Starrett [Wed, 20 Apr 2016 17:40:02 +0000 (13:40 -0400)]
arm64: dts: NS2 secondary core enablement via PSCI
Declare PSCI-1.0 node and enable CPU_ON method via PSCI. Spin-table
memreserve has been removed as well as syscon based reset, as PSCI-1.0
expects reset implementation in firmware.
Signed-off-by: Luke Starrett <luke.starrett@broadcom.com>
Acked-by: Scott Branden <scott.branden@broadcom.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Stephen Warren [Tue, 12 Apr 2016 17:46:37 +0000 (11:46 -0600)]
ARM: tegra: Add DT binding for Tegra186 GPIO controllers
Tegra186 contains two separate but mostly similar GPIO controllers.
Register layout differs significantly from previous Tegra generations,
and so a new binding is required to describe them in device tree. This
patch adds that binding.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Rob Herring <robh@kernel.org>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Stephen Warren [Tue, 5 Apr 2016 19:25:07 +0000 (13:25 -0600)]
ARM: tegra: Fix naming in GPIO DT binding header
According to the Tegra TRM, GPIOs are aggregated into /ports/ of 8 GPIOs,
not into /banks/. Fix <dt-bindings/gpio/tegra-gpio.h> to correctly reflect
this naming convention. While this seems like silly churn, it will become
slightly more important once we introduce the GPIO binding for upcoming
Tegra chips.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Thierry Reding <treding@nvidia.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
dawei.chien@mediatek.com [Tue, 15 Mar 2016 08:10:36 +0000 (16:10 +0800)]
arm64: dts: mt8173: Add thermal zone node.
This adds thermal zone node to Mediatek MT8173 dtsi file.
Signed-off-by: Dawei Chien <dawei.chien@mediatek.com>
Acked-by: Eduardo Valentin <edubezval@gmail.com>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
Sascha Hauer [Mon, 30 Nov 2015 11:42:33 +0000 (12:42 +0100)]
ARM64: dts: mt8173: Add thermal/auxadc device nodes
This adds the thermal controller and auxadc nodes to the Mediatek MT8173
dtsi file.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Reviewed-by: Daniel Kurtz <djkurtz@chromium.org>
Acked-by: Eduardo Valentin <edubezval@gmail.com>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
Geert Uytterhoeven [Mon, 11 Jan 2016 18:41:12 +0000 (19:41 +0100)]
ARM: shmobile: timer: Fix preset_lpj leading to too short delays
On all shmobile ARM SoCs, loop-based delays may complete early, which
can be after only 1/3 (Cortex A9) or 1/2 (Cortex A7 or A15) of the
minimum required time.
This is caused by calculating preset_lpj based on incorrect assumptions
about the number of clock cycles per loop:
- All of Cortex A7, A9, and A15 run __loop_delay() at 1 loop per
CPU clock cycle,
- As of commit
11d4bb1bd067f9d0 ("ARM: 7907/1: lib: delay-loop: Add
align directive to fix BogoMIPS calculation"), Cortex A8 runs
__loop_delay() at 1 loop per 2 instead of 3 CPU clock cycles.
On SoCs with Cortex A7 and/or A15 CPU cores, this went unnoticed, as
delays use the ARM arch timer if available. R-Car Gen2 doesn't work if
the arch timer is disabled. However, APE6 can be used without the arch
timer.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Sjoerd Simons [Wed, 6 Apr 2016 19:32:06 +0000 (21:32 +0200)]
Revert "ARM: dts: porter: Enable SCIF_CLK frequency and pins"
This reverts commit
19417bd9c511 ("ARM: dts: porter: Enable SCIF_CLK
frequency and pins") as according to
http://elinux.org/File:R-CarM2-KOELSCH_PORTER-B_PORTER_C_Comparison.pdf
the external oscillator for SCIF_CLK is not mounted on the porter boards.
Signed-off-by: Sjoerd Simons <sjoerd.simons@collabora.co.uk>
Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Sjoerd Simons [Wed, 6 Apr 2016 12:52:53 +0000 (14:52 +0200)]
ARM: dts: r8a7791: Don't disable referenced optional clocks
clk_get on a disabled clock node will return EPROBE_DEFER, which can
cause drivers to be deferred forever if such clocks are referenced in
their clocks property.
Update the various disabled external clock nodes to default to a
frequency of 0, but don't disable them to prevent this.
Signed-off-by: Sjoerd Simons <sjoerd.simons@collabora.co.uk>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Yuan Yao [Wed, 13 Apr 2016 10:08:27 +0000 (18:08 +0800)]
arm64: dts: ls1043a: add the DTS node for QSPI support
Signed-off-by: Yuan Yao <yao.yuan@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Yuan Yao [Wed, 13 Apr 2016 10:08:26 +0000 (18:08 +0800)]
Documentation: fsl-quadspi: Add fsl,ls1043a-qspi compatible string
new compatible string: "fsl,ls1043a-qspi".
Signed-off-by: Yuan Yao <yao.yuan@nxp.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Heiko Stuebner [Sat, 16 Apr 2016 00:54:52 +0000 (02:54 +0200)]
clk: rockchip: fix checkpatch errors in rk3399 dt-binding header
Some "please, no space before tabs" checkpatch warnings slipped through
the recent addition of the rk3399 dt-binding header, so fix them.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Leo Yan [Fri, 26 Feb 2016 05:28:34 +0000 (13:28 +0800)]
arm64: dts: Add L2 cache topology to Hi6220
This patch adds the L2 cache topology on Hi6220. Hi6220 has two
clusters, every cluster has 512KiB L2 cache (32KiB x 16 ways).
Signed-off-by: Leo Yan <leo.yan@linaro.org>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
Leo Yan [Tue, 29 Mar 2016 11:27:15 +0000 (19:27 +0800)]
arm64: dts: register Hi6220's thermal zone for power allocator
With profiling Hi6220's power modeling so get dynamic coefficient and
sustainable power. So pass these parameters from DT.
Now enable power allocator with only one actor for CPU part, so directly
use cluster0's thermal sensor for monitoring temperature.
Reviewed-by: Javi Merino <javi.merino@arm.com>
Signed-off-by: Leo Yan <leo.yan@linaro.org>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
Leo Yan [Tue, 29 Mar 2016 11:27:14 +0000 (19:27 +0800)]
arm64: dts: register Hi6220's thermal sensor
Bind thermal sensor driver for Hi6220.
Signed-off-by: Leo Yan <leo.yan@linaro.org>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
Guodong Xu [Tue, 12 Apr 2016 23:55:52 +0000 (07:55 +0800)]
arm64: dts: add wifi nodes support for hi6220-hikey
Add wifi nodes support for hi6220-hikey
Signed-off-by: Guodong Xu <guodong.xu@linaro.org>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
Xinwei Kong [Tue, 12 Apr 2016 23:55:51 +0000 (07:55 +0800)]
arm64: dts: add dwmmc nodes for hi6220
Add all three dwmmc nodes description for hi6220
Signed-off-by: Guodong Xu <guodong.xu@linaro.org>
Signed-off-by: Xinwei Kong <kong.kongxinwei@hisilicon.com>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
Chen Feng [Tue, 12 Apr 2016 23:55:50 +0000 (07:55 +0800)]
arm64: dts: hikey: Add hi655x pmic dts node
Add the mfd hi655x dts node and regulator support on hi6220 platform.
Signed-off-by: Chen Feng <puck.chen@hisilicon.com>
Signed-off-by: Fei Wang <w.f@huawei.com>
Signed-off-by: Xinwei Kong <kong.kongxinwei@hisilicon.com>
Signed-off-by: Guodong Xu <guodong.xu@linaro.org>
Reviewed-by: Haojian Zhuang <haojian.zhuang@linaro.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Acked-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
Guodong Xu [Tue, 12 Apr 2016 23:55:49 +0000 (07:55 +0800)]
arm64: dts: add LED nodes for hi6220-hikey
Add LED nodes for hi6220-hikey. There are total 6 LEDs on HiKey.
Four general purposed, one for WiFi activity, and one for Bluetooth
activity.
Signed-off-by: Guodong Xu <guodong.xu@linaro.org>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
Guodong Xu [Tue, 12 Apr 2016 23:55:48 +0000 (07:55 +0800)]
arm64: dts: hi6220: add pinctrl for uarts and enable them
Add pinctrl for uart2 uart3 and uart4. Enable uart1 uart2 and uart3.
Signed-off-by: Guodong Xu <guodong.xu@linaro.org>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
Leo Yan [Tue, 12 Apr 2016 23:55:47 +0000 (07:55 +0800)]
arm64: dts: add Hi6220's stub clock node
Enable SRAM node and stub clock node for Hi6220, which uses mailbox
channel 1 for CPU's frequency change.
Furthermore, add the CPU clock phandle in CPU's node and using
operating-points-v2 to register operating points. So can be used by
cpufreq-dt driver.
Signed-off-by: Leo Yan <leo.yan@linaro.org>
Acked-by: Jassi Brar <jassisinghbrar@gmail.com>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
Leo Yan [Tue, 12 Apr 2016 23:55:46 +0000 (07:55 +0800)]
arm64: dts: add mailbox node for Hi6220
This patch add device mailbox node for Hi6220 in DT.
Signed-off-by: Leo Yan <leo.yan@linaro.org>
Acked-by: Jassi Brar <jassisinghbrar@gmail.com>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
Zhangfei Gao [Tue, 12 Apr 2016 23:55:45 +0000 (07:55 +0800)]
arm64: dts: Add hi6220 usb node
Add USB nodes for Hi6220
Signed-off-by: Zhangfei Gao <zhangfei.gao@linaro.org>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
Guodong Xu [Tue, 12 Apr 2016 23:55:44 +0000 (07:55 +0800)]
arm64: dts: hikey: enable i2c0 and i2c1 for working with mezzanine boards
In HiKey board dts file, enable i2c0 and i2c1 for working with 96boards' LS
mezzanine.
Signed-off-by: Guodong Xu <guodong.xu@linaro.org>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
Xinwei Kong [Tue, 12 Apr 2016 23:55:43 +0000 (07:55 +0800)]
arm64: dts: add all hi6220 i2c nodes
This patch adds all I2C nodes for the Hi6220 SoC. This hi6220 Soc
use this I2C IP of Synopsys Designware for HiKey board.
Signed-off-by: Xinwei Kong <kong.kongxinwei@hisilicon.com>
Signed-off-by: Chen Feng <puck.chen@hisilicon.com>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
Zhong Kaihua [Tue, 12 Apr 2016 23:55:42 +0000 (07:55 +0800)]
arm64: dts: add Hi6220 spi configuration nodes
Add Hi6220 spi configuration nodes. Disable by default in hi6220.dtsi
and enable it in board dts for usage of 96boards LS mezzanine board.
Signed-off-by: Zhong Kaihua <zhongkaihua@huawei.com>
Signed-off-by: Guodong Xu <guodong.xu@linaro.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
Zhong Kaihua [Tue, 12 Apr 2016 23:55:41 +0000 (07:55 +0800)]
arm64: dts: add Hi6220 pinctrl configuration nodes
Add Hi6220 pinctrl configuration nodes
Signed-off-by: Zhong Kaihua <zhongkaihua@huawei.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Acked-by: Haojian Zhuang <haojian.zhuang@linaro.org>
Acked-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
Zhong Kaihua [Tue, 12 Apr 2016 23:55:40 +0000 (07:55 +0800)]
arm64: dts: Add Hi6220 gpio configuration nodes
Add Hi6220 gpio configuration nodes
Signed-off-by: Zhong Kaihua <zhongkaihua@huawei.com>
Signed-off-by: Kong Xinwei <kong.kongxinwei@hisilicon.com>
Signed-off-by: Guodong Xu <guodong.xu@linaro.org>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
Leo Yan [Tue, 12 Apr 2016 23:55:39 +0000 (07:55 +0800)]
arm64: dts: enable idle states for Hi6220
Add cpu and cluster level's low power state for Hi6220.
Acked-by: Sudeep Holla <sudeep.holla@arm.com>
Signed-off-by: Leo Yan <leo.yan@linaro.org>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
Leo Yan [Tue, 12 Apr 2016 23:55:38 +0000 (07:55 +0800)]
arm64: dts: add sp804 timer node for Hi6220
Add sp804 timer for hi6220, so it can be used as broadcast timer.
Signed-off-by: Leo Yan <leo.yan@linaro.org>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
Leo Yan [Tue, 12 Apr 2016 23:55:37 +0000 (07:55 +0800)]
arm64: dts: Reserve memory regions for hi6220
On Hi6220, below memory regions in DDR have specific purpose:
0x05e0,0000 - 0x05ef,ffff: For MCU firmware using at runtime;
0x06df,f000 - 0x06df,ffff: For mailbox message data;
0x0740,f000 - 0x0740,ffff: For MCU firmware's section;
0x3e00,0000 - 0x3fff,ffff: For OP-TEE.
This patch reserves these memory regions in DT.
Signed-off-by: Leo Yan <leo.yan@linaro.org>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
Rhyland Klein [Thu, 14 Apr 2016 19:57:18 +0000 (15:57 -0400)]
arm64: tegra: Enable cros-ec and charger on Smaug
Add nodes for the ChromeOS Embedded Controller and for the gas gauge
connected to the I2C bus that it controls.
Signed-off-by: Rhyland Klein <rklein@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Brian Starkey [Thu, 14 Apr 2016 15:39:19 +0000 (16:39 +0100)]
arm64: dts: juno: Add external expansion bus to DT
The Juno development platform has an external expansion bus which can
be used for additional hardware (e.g. LogicTile Express daughterboards).
Add this bus to the Juno base device-tree.
Acked-by: Liviu Dudau <Liviu.Dudau@arm.com>
Signed-off-by: Brian Starkey <brian.starkey@arm.com>
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
Rameshwar Prasad Sahu [Tue, 29 Mar 2016 09:54:54 +0000 (15:24 +0530)]
arm64: dts: apm: Fix compatible string for X-Gene 2 SATA controller DTS node
Fix X-Gene SATA controller compatible string for Merlin board.
Signed-off-by: Rameshwar Prasad Sahu <rsahu@apm.com>
Acked-by: Suman Tripathi <stripathi@apm.com>
Olof Johansson [Wed, 13 Apr 2016 22:30:20 +0000 (15:30 -0700)]
Merge tag 'v4.7-rockchip-dts64-1' of git://git./linux/kernel/git/mmind/linux-rockchip into next/dt64
This contains the rk3368-geekbox as new board, mailbox device
nodes for the core rk3368 and some cleanups for gpio-keys,
mmc and tsadc.
* tag 'v4.7-rockchip-dts64-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
Documentation: devicetree: rockchip: Document rk3368-GeekBox
arm64: dts: rockchip: Add rk3368 GeekBox dts
arm64: dts: rockchip: Clean up gpio-keys nodes
dt-bindings: Add vendor prefix for GeekBuying.com
arm64: dts: rockchip: Add rk3368 mailbox device nodes
arm64: dts: rockchip: remove broken-cd from emmc and sdio
arm64: dts: rockchip: fix the incorrect otp-out pin on rk3368
Signed-off-by: Olof Johansson <olof@lixom.net>
Chanho Min [Mon, 11 Apr 2016 11:54:46 +0000 (20:54 +0900)]
arm64: dts: Add dts files for LG Electronics's lg1312 SoC
Add initial dtsi file to support lg1312 SoC which based on
Cortex-A53. Also add dts file to support lg1312 reference board
which based on lg1312 SoC.
Signed-off-by: Chanho Min <chanho.min@lge.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
Olof Johansson [Wed, 13 Apr 2016 19:00:41 +0000 (12:00 -0700)]
Merge tag 'renesas-arm64-cleanup-for-v4.7' of git://git./linux/kernel/git/horms/renesas into next/dt64
Renesas ARM64 Based SoC Cleanup for v4.7
* Use generic pinctrl properties in DT for salvator-x board
* tag 'renesas-arm64-cleanup-for-v4.7' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
arm64: dts: salvator-x: use generic pinctrl properties
Signed-off-by: Olof Johansson <olof@lixom.net>
Anup Patel [Tue, 29 Mar 2016 07:27:34 +0000 (12:57 +0530)]
arm64: dts: Add ARM PL022 SPI DT nodes for NS2
We have two ARM PL022 SPI instances in NS2 SoC. On NS2 SVK,
one of the ARM PL022 SPI host has Silabs si3226x slic connected
to chip-select #0 whereas second ARM PL022 SPI host has Atmel
AT25 EEPROM connected to chip-select #0.
This patch adds ARM PL022, Silabs si3226x, and Atmel AT25
DT nodes in NS2 DT and NS2 SVK DT respectively.
Signed-off-by: Anup Patel <anup.patel@broadcom.com>
Reviewed-by: Ray Jui <rjui@broadcom.com>
Reviewed-by: Scott Branden <sbranden@broadcom.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Anup Patel [Tue, 29 Mar 2016 07:27:33 +0000 (12:57 +0530)]
arm64: dts: Move NS2 clock DT nodes to separate DT file
For more readabilty and consistency with other Broadcom SoCs, we move
all NS2 clock DT nodes from main SoC DT file to a separate DT file.
We also update the license header in ns2.dtsi as-per new Broadcom
convention.
Signed-off-by: Anup Patel <anup.patel@broadcom.com>
Reviewed-by: Ray Jui <rjui@broadcom.com>
Reviewed-by: Scott Branden <sbranden@broadcom.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Anup Patel [Tue, 29 Mar 2016 07:27:32 +0000 (12:57 +0530)]
arm64: dts: Add maintenance interrupt for GIC in NS2 DT
The KVM ARM64 requires GIC maintenance interrupt for VGIC emulation
so this patch adds the missing "interrupts" attribute to GIC node in
NS2 DT.
Signed-off-by: Anup Patel <anup.patel@broadcom.com>
Reviewed-by: Ray Jui <rjui@broadcom.com>
Reviewed-by: Scott Branden <sbranden@broadcom.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Anup Patel [Tue, 29 Mar 2016 07:27:31 +0000 (12:57 +0530)]
arm64: dts: Add ARM PL330 DMA DT node for NS2
We have one ARM PL330 DMA instance with 8 channels in
NS2 SoC. Let's enable it for NS2 in NS2 DT.
Signed-off-by: Anup Patel <anup.patel@broadcom.com>
Reviewed-by: Ray Jui <rjui@broadcom.com>
Reviewed-by: Pramod KUMAR <pramodku@broadcom.com>
Reviewed-by: Scott Branden <sbranden@broadcom.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Olof Johansson [Wed, 13 Apr 2016 17:19:35 +0000 (10:19 -0700)]
Merge tag 'gxbb-dt64' of https://github.com/carlocaione/linux-meson into next/dt64
Add support for a few more Amlogic S905/GXBB based boards: Hardkernel ODROID-C2
and Amlogic P200/P201 boards.
We also fix the memory nodes on the Vega S95 DTS.
* tag 'gxbb-dt64' of https://github.com/carlocaione/linux-meson:
ARM64: dts: amlogic: Add P200/P201 boards
ARM64: dts: amlogic: add Hardkernel ODROID-C2
Documentation: devicetree: amlogic: Document P20x and ODROID-C2 boards
ARM64: dts: amlogic: update serial aliases
ARM64: dts: amlogic: Clean up Vega S95 /memory nodes
Signed-off-by: Olof Johansson <olof@lixom.net>
Alim Akhtar [Wed, 13 Apr 2016 04:42:03 +0000 (10:12 +0530)]
arm64: dts: Add nodes for pdma0 and pdma1 for exynos7
This patch adds device tree nodes for pdma0 and pdma1 controllers
found on exynos7 SoCs.
Signed-off-by: Alim Akhtar <alim.akhtar@samsung.com>
Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Liu Gang [Wed, 23 Mar 2016 09:47:22 +0000 (17:47 +0800)]
arm64: dts: ls2080a: Add compatible "fsl,ls2080a-gpio" for ls2080a gpio nodes
The compatible "fsl,qoriq-gpio" is used by gpio driver:
drivers/gpio/gpio-mpc8xxx.c to implement general gpio
functionalities.
The chip-specific compatible "fsl,ls2080a-gpio" may be
used to fix potential gpio IP block errata or other
chip-specific gpio issues.
Signed-off-by: Liu Gang <Gang.Liu@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Liu Gang [Wed, 23 Mar 2016 09:47:21 +0000 (17:47 +0800)]
arm64: dts: ls1043a: Add compatible "fsl,qoriq-gpio" for ls1043a gpio nodes
The compatible "fsl,qoriq-gpio" is used by gpio driver:
drivers/gpio/gpio-mpc8xxx.c to implement general gpio
functionalities.
The chip-specific compatible "fsl,ls1043a-gpio" may be
used to fix potential gpio IP block errata or other
chip-specific gpio issues.
Signed-off-by: Liu Gang <Gang.Liu@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Yuan Yao [Wed, 9 Mar 2016 10:22:06 +0000 (18:22 +0800)]
arm64: dts: ls2080a: update the DTS for QSPI and DSPI support
Signed-off-by: Yuan Yao <yao.yuan@nxp.com>
Acked-by: Han xu <han.xu@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Yuan Yao [Wed, 9 Mar 2016 10:22:05 +0000 (18:22 +0800)]
Documentation: fsl: dspi: Add fsl,ls2080a-dspi compatible string
new compatible string: "fsl,ls2080a-dspi".
Signed-off-by: Yuan Yao <yao.yuan@nxp.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
This page took 0.049173 seconds and 5 git commands to generate.