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MIPS: Optimise TLB handlers for MIPS32/64 R2 cores.
authorSteven J. Hill <sjhill@mips.com>
Wed, 29 Aug 2012 04:20:39 +0000 (23:20 -0500)
committerSteven J. Hill <sjhill@mips.com>
Thu, 13 Sep 2012 20:43:54 +0000 (15:43 -0500)
commitff401e52100dcdc85e572d1ad376d3307b3fe28e
tree2ba28fa473249e6b9daebf76a3d1835650e3f5detree | snapshot
parente6de1a09a2f6a6825341e8463866553b77848ed6commit | diff
MIPS: Optimise TLB handlers for MIPS32/64 R2 cores.

The EXT and INS instructions can be used to decrease code size and
thus speed up TLB handlers on MIPS32R2 and MIPS64R2 cores.

Signed-off-by: Steven J. Hill <sjhill@mips.com>
arch/mips/mm/tlbex.c diff | blob | blame | history
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