From 66ef5847c3a5ec17259f47f6ab52ebd470c0650c Mon Sep 17 00:00:00 2001 From: Alan Modra Date: Mon, 11 May 2020 09:46:45 +0930 Subject: [PATCH] Power10 string operations opcodes/ * ppc-opc.c (powerpc_opcodes): Add vstribl, vstribr, vstrihl, vstrihr, vclrlb, vclrrb, vstribl., vstribr., vstrihl., vstrihr.. gas/ * testsuite/gas/ppc/stringop.d, * testsuite/gas/ppc/stringop.s: New test. * testsuite/gas/ppc/ppc.exp: Run it. --- gas/ChangeLog | 6 ++++++ gas/testsuite/gas/ppc/ppc.exp | 1 + gas/testsuite/gas/ppc/stringop.d | 20 ++++++++++++++++++++ gas/testsuite/gas/ppc/stringop.s | 12 ++++++++++++ opcodes/ChangeLog | 5 +++++ opcodes/ppc-opc.c | 10 ++++++++++ 6 files changed, 54 insertions(+) create mode 100644 gas/testsuite/gas/ppc/stringop.d create mode 100644 gas/testsuite/gas/ppc/stringop.s diff --git a/gas/ChangeLog b/gas/ChangeLog index a7fbadc683..48559068ce 100644 --- a/gas/ChangeLog +++ b/gas/ChangeLog @@ -1,3 +1,9 @@ +2020-05-11 Alan Modra + + * testsuite/gas/ppc/stringop.d, + * testsuite/gas/ppc/stringop.s: New test. + * testsuite/gas/ppc/ppc.exp: Run it. + 2020-05-11 Peter Bergner * testsuite/gas/ppc/set_bool.d, diff --git a/gas/testsuite/gas/ppc/ppc.exp b/gas/testsuite/gas/ppc/ppc.exp index e1c7bdefb0..127829f365 100644 --- a/gas/testsuite/gas/ppc/ppc.exp +++ b/gas/testsuite/gas/ppc/ppc.exp @@ -142,3 +142,4 @@ run_dump_test "maskmanip" run_dump_test "genpcv" run_dump_test "bitmanip" run_dump_test "set_bool" +run_dump_test "stringop" diff --git a/gas/testsuite/gas/ppc/stringop.d b/gas/testsuite/gas/ppc/stringop.d new file mode 100644 index 0000000000..be4c3cb937 --- /dev/null +++ b/gas/testsuite/gas/ppc/stringop.d @@ -0,0 +1,20 @@ +#as: -mpower10 +#objdump: -dr -Mpower10 +#name: string operations + +.* + + +Disassembly of section \.text: + +0+0 <_start>: +.*: (10 01 08 0d|0d 08 01 10) vstribr v0,v1 +.*: (10 41 1c 0d|0d 1c 41 10) vstribr. v2,v3 +.*: (10 80 28 0d|0d 28 80 10) vstribl v4,v5 +.*: (10 c0 3c 0d|0d 3c c0 10) vstribl. v6,v7 +.*: (11 03 48 0d|0d 48 03 11) vstrihr v8,v9 +.*: (11 43 5c 0d|0d 5c 43 11) vstrihr. v10,v11 +.*: (11 82 68 0d|0d 68 82 11) vstrihl v12,v13 +.*: (11 c2 7c 0d|0d 7c c2 11) vstrihl. v14,v15 +.*: (12 11 91 8d|8d 91 11 12) vclrlb v16,v17,r18 +.*: (12 74 a9 cd|cd a9 74 12) vclrrb v19,v20,r21 diff --git a/gas/testsuite/gas/ppc/stringop.s b/gas/testsuite/gas/ppc/stringop.s new file mode 100644 index 0000000000..8f80afc82d --- /dev/null +++ b/gas/testsuite/gas/ppc/stringop.s @@ -0,0 +1,12 @@ + .text +_start: + vstribr 0,1 + vstribr. 2,3 + vstribl 4,5 + vstribl. 6,7 + vstrihr 8,9 + vstrihr. 10,11 + vstrihl 12,13 + vstrihl. 14,15 + vclrlb 16,17,18 + vclrrb 19,20,21 diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog index e5cf925e1c..69c98de9a2 100644 --- a/opcodes/ChangeLog +++ b/opcodes/ChangeLog @@ -1,3 +1,8 @@ +2020-05-11 Alan Modra + + * ppc-opc.c (powerpc_opcodes): Add vstribl, vstribr, vstrihl, vstrihr, + vclrlb, vclrrb, vstribl., vstribr., vstrihl., vstrihr.. + 2020-05-11 Peter Bergner * ppc-opc.c (powerpc_opcodes) : New diff --git a/opcodes/ppc-opc.c b/opcodes/ppc-opc.c index e15fcf5ea6..efaa06cfc9 100644 --- a/opcodes/ppc-opc.c +++ b/opcodes/ppc-opc.c @@ -4118,6 +4118,10 @@ const struct powerpc_opcode powerpc_opcodes[] = { {"vdivuq", VX (4, 11), VX_MASK, POWER10, 0, {VD, VA, VB}}, {"psq_lx", XW (4, 6,0), XW_MASK, PPCPS, 0, {FRT,RA,RB,PSWM,PSQM}}, {"vmrghb", VX (4, 12), VX_MASK, PPCVEC, 0, {VD, VA, VB}}, +{"vstribl", VXVA(4,13,0), VXVA_MASK, POWER10, 0, {VD, VB}}, +{"vstribr", VXVA(4,13,1), VXVA_MASK, POWER10, 0, {VD, VB}}, +{"vstrihl", VXVA(4,13,2), VXVA_MASK, POWER10, 0, {VD, VB}}, +{"vstrihr", VXVA(4,13,3), VXVA_MASK, POWER10, 0, {VD, VB}}, {"psq_stx", XW (4, 7,0), XW_MASK, PPCPS, 0, {FRS,RA,RB,PSWM,PSQM}}, {"vpkuhum", VX (4, 14), VX_MASK, PPCVEC, 0, {VD, VA, VB}}, {"vinsbvlx", VX (4, 15), VX_MASK, POWER10, 0, {VD, RA, VB}}, @@ -4293,6 +4297,7 @@ const struct powerpc_opcode powerpc_opcodes[] = { {"vexptefp", VX (4, 394), VXVA_MASK, PPCVEC, 0, {VD, VB}}, {"vdivsw", VX (4, 395), VX_MASK, POWER10, 0, {VD, VA, VB}}, {"vmrglw", VX (4, 396), VX_MASK, PPCVEC, 0, {VD, VA, VB}}, +{"vclrlb", VX (4, 397), VX_MASK, POWER10, 0, {VD, VA, RB}}, {"vpkshss", VX (4, 398), VX_MASK, PPCVEC, 0, {VD, VA, VB}}, {"vinswvrx", VX (4, 399), VX_MASK, POWER10, 0, {VD, RA, VB}}, {"macchwsu", XO (4, 204,0,0), XO_MASK, MULHW, 0, {RT, RA, RB}}, @@ -4306,6 +4311,7 @@ const struct powerpc_opcode powerpc_opcodes[] = { {"vmulld", VX (4, 457), VX_MASK, POWER10, 0, {VD, VA, VB}}, {"vlogefp", VX (4, 458), VXVA_MASK, PPCVEC, 0, {VD, VB}}, {"vdivsd", VX (4, 459), VX_MASK, POWER10, 0, {VD, VA, VB}}, +{"vclrrb", VX (4, 461), VX_MASK, POWER10, 0, {VD, VA, RB}}, {"vpkswss", VX (4, 462), VX_MASK, PPCVEC, 0, {VD, VA, VB}}, {"vinsd", VX (4, 463), VXUIMM4_MASK, POWER10, 0, {VD, RB, UIMM4}}, {"macchws", XO (4, 236,0,0), XO_MASK, MULHW, 0, {RT, RA, RB}}, @@ -4654,6 +4660,10 @@ const struct powerpc_opcode powerpc_opcodes[] = { {"evmhesmf", VX (4,1035), VX_MASK, PPCSPE, 0, {RS, RA, RB}}, {"evmhoumi", VX (4,1036), VX_MASK, PPCSPE, 0, {RS, RA, RB}}, {"vslo", VX (4,1036), VX_MASK, PPCVEC, 0, {VD, VA, VB}}, +{"vstribl.", VXVA(4,1037,0), VXVA_MASK, POWER10, 0, {VD, VB}}, +{"vstribr.", VXVA(4,1037,1), VXVA_MASK, POWER10, 0, {VD, VB}}, +{"vstrihl.", VXVA(4,1037,2), VXVA_MASK, POWER10, 0, {VD, VB}}, +{"vstrihr.", VXVA(4,1037,3), VXVA_MASK, POWER10, 0, {VD, VB}}, {"evmhosmi", VX (4,1037), VX_MASK, PPCSPE, 0, {RS, RA, RB}}, {"evmhosmf", VX (4,1039), VX_MASK, PPCSPE, 0, {RS, RA, RB}}, {"machhwuo", XO (4, 12,1,0), XO_MASK, MULHW, 0, {RT, RA, RB}}, -- 2.34.1