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x86: CpuXSAVE is a prereq for various other features
2018-04-26  Jan Beulichx86: CpuXSAVE is a prereq for various other features
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2018-04-26  Jan Beulichx86: drop CpuRegMMX, CpuReg[XYZ]MM, and CpuRegMask
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2018-04-26  Jan Beulichx86: don't recognize bnd<N> as registers without CpuMPX
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2018-04-26  Jan Beulichx86: x87-related adjustments
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2018-04-26  Jan Beulichx86: fix indentation in build_modrm_byte()
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2018-04-26  Jan Beulichx86: move and fold common code in build_modrm_byte()
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2018-04-26  Jan Beulichx86: drop VexImmExt
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2018-04-26  Jan Beulichx86: tighten assertion in build_modrm_byte()
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2018-04-26  Jan Beulichx86: drop dead code from build_modrm_byte()
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2018-04-25  Jan Beulichx86: drop redundant AVX512VL shift templates
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2018-03-28  Jan Beulichx86: drop VecESize
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2018-03-28  Jan Beulichx86: convert broadcast insn attribute to boolean
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2018-03-28  Jan Beulichx86: fold to-scalar-int conversion insns
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2018-03-28  Jan Beulichx86: don't show suffixes for to-scalar-int conversion...
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2018-03-22  Jan Beulichx86: use local variable in check_VecOperands()
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2018-03-22  Jan Beulichx86: drop pointless VecESize
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2018-03-22  Jan Beulichx86: drop remaining redundant DispN
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2018-03-22  Jan Beulichix86: allow HLE store of accumulator to absolute address
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2018-03-22  Jan Beulichx86: fix swapped operand handling for BNDMOV
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2018-03-22  Jan Beulichx86/Intel: fix fallout from earlier template folding
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2018-03-22  Jan Beulichx86: fold a few XOP templates
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2018-03-08  Jan Beulichx86: fold several AVX512VL templates
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2018-03-08  Jan Beulichx86: fold certain AVX512 rotate and shift templates
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2018-03-08  Jan Beulichx86: fold VEX-encoded GFNI templates
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2018-03-08  Jan Beulichx86: fold a few AVX512F templates
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2018-03-08  Jan Beulichx86: fold LWP templates
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2018-03-08  Jan Beulichx86: fold FMA and FMA4 templates
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2018-03-08  Jan Beulichx86: drop {X,Y,Z}MMWORD_MNEM_SUFFIX
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2018-03-08  Jan Beulichx86: correct operand size match checks for BMI/BMI2...
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2018-03-08  Jan Beulichx86: fold redundant expressions in process_suffix()
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2018-03-08  Jan Beulichx86: simplify result processing of cpu_flags_match()
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2018-03-08  Jan Beulichx86: add GFNI, VAES, and VPCLMUL checking to cpu_flags_match()
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2018-03-08  Jan Beulichx86: change AVX512VL handling in cpu_flags_match()
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2018-03-08  Jan Beulichx86: drop CPU_FLAGS_32BIT_MATCH
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2018-03-08  Jan Beulichx86: simplify AVX checks in cpu_flags_match()
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2018-03-08  Jan Beulichx86: avoid cpu_flags_match() bogusly setting CPU_FLAGS_ARCH_...
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2018-03-08  Jan Beulichx86: drop bogus NoAVX
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2018-03-08  Jan Beulichx86: avoid SSE check for LDMXCSR/STMXCSR
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2018-03-08  Jan Beulichx86: extend SSE check to PCLMULQDQ, AES, and GFNI insns
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2018-03-08  Jan Beulichx86: drop FloatD
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2018-03-08  Jan Beulichx86/Intel: correct disassembly of fsub*/fdiv*
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2018-03-08  Jan Beulichx86: adjust 4-XMM-register-group related warning
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2018-03-08  Jan Beulichx86: bogus VMOVD with 64-bit operands should only allow...
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2018-03-08  Jan Beulichx86: fold AVX vcvtpd2ps memory forms
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2018-01-10  Jan Beulichx86: fix Disp8 handling for scalar AVX512_4FMAPS insns
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2018-01-10  Jan Beulichx86: fix Disp8 handling for AVX512VL VPCMP*{B,W} variants
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2018-01-02  Jan Beulichx86: partial revert of 10c17abdd0
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2017-12-18  Jan Beulichx86: fold certain AVX and AVX2 templates
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2017-12-18  Jan Beulichx86: fold RegXMM/RegYMM/RegZMM into RegSIMD
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2017-12-18  Jan Beulichx86: drop FloatReg and FloatAcc
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2017-12-18  Jan Beulichx86: replace Reg8, Reg16, Reg32, and Reg64
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2017-12-15  Jan Beulichx86: correct operand type checks
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2017-12-15  Jan Beulichx86: drop stray CheckRegSize uses
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2017-12-15  Jan Beulichx86: correct abort check
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2017-11-30  Jan Beulichx86: derive DispN from BaseIndex
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2017-11-30  Jan Beulichx86: drop Vec_Disp8
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2017-11-30  Jan Beulichx86/Intel: issue diagnostics for redundant segment...
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2017-11-30  Jan BeulichRevert "x86: Update segment register check in Intel...
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2017-11-24  Jan Beulichx86: reject further invalid AVX-512 masking constructs
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2017-11-24  Jan Beulichx86: don't omit disambiguating suffixes from "fi*"
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2017-11-23  Jan Beulichx86: fix AVX-512 16-bit addressing
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2017-11-23  Jan Beulichx86-64: always use unsigned 32-bit reloc for 32-bit...
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2017-11-23  Jan Beulichx86: drop redundant VSIB handling code
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2017-11-23  Jan Beulichx86: correct UDn
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2017-11-23  Jan Beulichx86/Intel: don't report multiple errors for a single...
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2017-11-16  Jan Beulichx86: ignore high register select bit(s) in 32- and...
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2017-11-16  Jan Beulichix86/Intel: don't require memory operand size specifier...
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2017-11-15  Jan Beulichx86: use correct register names
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2017-11-15  Jan Beulichx86: drop VEXI4_Fixup()
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2017-11-15  Jan Beulichx86-64: don't allow use of %axl as accumulator
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2017-11-14  Jan Beulichx86: add disassembler support for XOP VPCOM* pseudo-ops
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2017-11-14  Jan Beulichx86: add support for AVX-512 VPCMP*{B,W} pseudo-ops
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2017-11-14  Jan Beulichx86: string insns don't allow displacements
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2017-11-13  Jan Beulichgas/arm64: don't emit stack pointer symbol table entries
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2017-11-13  Jan Beulichgas/ia64: fix testsuite failures
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2017-11-13  Jan BeulichPE: don't corrupt section flags when linking from ELF...
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2017-11-13  Jan Beulichx86: don't default variable shift count insns to 8...
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2017-11-13  Jan Beulichx86: {f,}xsave64 / {f,}xrstor64 / xsaveopt64 should...
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2017-11-13  Jan Beulichx86/Intel: don't mistake riz/eiz as base register
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2017-11-13  Jan Beulichx86-64/Intel: issue diagnostic for out of range displacement
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2017-07-05  Borislav PetkovX86: Disassemble primary opcode map's group 2 ModRM...
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2017-02-28  Jan Beulichx86: fix handling of 64-bit operand size VPCMPESTR...
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2017-02-24  Jan Beulichx86: also correctly support TEST opcode aliases
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2017-02-23  Jan Beulichgas: slightly relax .startof.()/.sizeof.() testcase
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2017-02-23  Jan Beulichx86: drop stray VEX opcode 82 references
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2017-02-23  Jan Beulichx86: extend 64-bit invalid MPX insn forms testcase
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2017-02-22  Jan Beulichgas: require an operand to .startof.()/.sizeof.()
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2017-02-22  Jan Beulichaarch64: actually copy first operand in convert_bfc_to_bfm()
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2016-07-05  Jan Beulichld: track linker-definedness of symbols
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2016-07-05  Jan Beulichx86: fix register check in check_qword_reg()
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2016-07-01  Jan Beulichx86-64/MPX: relax no-RIP-relative-addressing testcase
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2016-07-01  Jan Beulichx86-64/MPX: bndmk, bndldx, and bndstx don't allow RIP...
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2016-07-01  Jan Beulichx86/MPX: fix address size handling
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2016-07-01  Jan Beulichx86/Intel: don't accept bogus instructions
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2016-07-01  Jan Beulichx86: allow suffix-less movzw and 64-bit movzb
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2016-07-01  Jan Beulichx86: remove stray instruction attributes
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2016-07-01  Jan Beulichx86/Intel: fix operand checking for MOVSD
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2015-12-15  Jan Beulichbfd: don't produce corrupt COFF symbol table due to...
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2015-12-14  Jan Beulichgas: free allocated symbol name in .cfi_label handling
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2015-12-14  Jan Beulichnm: basic COFF symbol type support for SysV-style symbol...
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GDB Binutils - Deliverables
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