| 2018-04-25 |
 Jan Beulich | x86: drop redundant AVX512VL shift templates
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| 2018-03-28 |
Jan Beulich | x86: drop VecESize
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| 2018-03-28 |
Jan Beulich | x86: convert broadcast insn attribute to boolean
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| 2018-03-28 |
Jan Beulich | x86: fold to-scalar-int conversion insns
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| 2018-03-28 |
Jan Beulich | x86: don't show suffixes for to-scalar-int conversion...
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| 2018-03-22 |
Jan Beulich | x86: use local variable in check_VecOperands()
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| 2018-03-22 |
Jan Beulich | x86: drop pointless VecESize
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| 2018-03-22 |
Jan Beulich | x86: drop remaining redundant DispN
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| 2018-03-22 |
Jan Beulich | ix86: allow HLE store of accumulator to absolute address
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| 2018-03-22 |
Jan Beulich | x86: fix swapped operand handling for BNDMOV
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| 2018-03-22 |
Jan Beulich | x86/Intel: fix fallout from earlier template folding
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| 2018-03-22 |
Jan Beulich | x86: fold a few XOP templates
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| 2018-03-08 |
Jan Beulich | x86: fold several AVX512VL templates
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| 2018-03-08 |
Jan Beulich | x86: fold certain AVX512 rotate and shift templates
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| 2018-03-08 |
Jan Beulich | x86: fold VEX-encoded GFNI templates
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| 2018-03-08 |
Jan Beulich | x86: fold a few AVX512F templates
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| 2018-03-08 |
Jan Beulich | x86: fold LWP templates
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| 2018-03-08 |
Jan Beulich | x86: fold FMA and FMA4 templates
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| 2018-03-08 |
Jan Beulich | x86: drop {X,Y,Z}MMWORD_MNEM_SUFFIX
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| 2018-03-08 |
Jan Beulich | x86: correct operand size match checks for BMI/BMI2...
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| 2018-03-08 |
Jan Beulich | x86: fold redundant expressions in process_suffix()
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| 2018-03-08 |
Jan Beulich | x86: simplify result processing of cpu_flags_match()
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| 2018-03-08 |
Jan Beulich | x86: add GFNI, VAES, and VPCLMUL checking to cpu_flags_match()
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| 2018-03-08 |
Jan Beulich | x86: change AVX512VL handling in cpu_flags_match()
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| 2018-03-08 |
Jan Beulich | x86: drop CPU_FLAGS_32BIT_MATCH
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| 2018-03-08 |
Jan Beulich | x86: simplify AVX checks in cpu_flags_match()
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| 2018-03-08 |
Jan Beulich | x86: avoid cpu_flags_match() bogusly setting CPU_FLAGS_ARCH_...
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| 2018-03-08 |
Jan Beulich | x86: drop bogus NoAVX
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| 2018-03-08 |
Jan Beulich | x86: avoid SSE check for LDMXCSR/STMXCSR
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| 2018-03-08 |
Jan Beulich | x86: extend SSE check to PCLMULQDQ, AES, and GFNI insns
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| 2018-03-08 |
Jan Beulich | x86: drop FloatD
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| 2018-03-08 |
Jan Beulich | x86/Intel: correct disassembly of fsub*/fdiv*
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| 2018-03-08 |
Jan Beulich | x86: adjust 4-XMM-register-group related warning
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| 2018-03-08 |
Jan Beulich | x86: bogus VMOVD with 64-bit operands should only allow...
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| 2018-03-08 |
Jan Beulich | x86: fold AVX vcvtpd2ps memory forms
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| 2018-01-10 |
Jan Beulich | x86: fix Disp8 handling for scalar AVX512_4FMAPS insns
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| 2018-01-10 |
Jan Beulich | x86: fix Disp8 handling for AVX512VL VPCMP*{B,W} variants
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| 2018-01-02 |
Jan Beulich | x86: partial revert of 10c17abdd0
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| 2017-12-18 |
Jan Beulich | x86: fold certain AVX and AVX2 templates
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| 2017-12-18 |
Jan Beulich | x86: fold RegXMM/RegYMM/RegZMM into RegSIMD
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| 2017-12-18 |
Jan Beulich | x86: drop FloatReg and FloatAcc
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| 2017-12-18 |
Jan Beulich | x86: replace Reg8, Reg16, Reg32, and Reg64
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| 2017-12-15 |
Jan Beulich | x86: correct operand type checks
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| 2017-12-15 |
Jan Beulich | x86: drop stray CheckRegSize uses
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| 2017-12-15 |
Jan Beulich | x86: correct abort check
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| 2017-11-30 |
Jan Beulich | x86: derive DispN from BaseIndex
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| 2017-11-30 |
Jan Beulich | x86: drop Vec_Disp8
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| 2017-11-30 |
Jan Beulich | x86/Intel: issue diagnostics for redundant segment...
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| 2017-11-30 |
Jan Beulich | Revert "x86: Update segment register check in Intel...
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| 2017-11-24 |
Jan Beulich | x86: reject further invalid AVX-512 masking constructs
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| 2017-11-24 |
Jan Beulich | x86: don't omit disambiguating suffixes from "fi*"
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| 2017-11-23 |
Jan Beulich | x86: fix AVX-512 16-bit addressing
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| 2017-11-23 |
Jan Beulich | x86-64: always use unsigned 32-bit reloc for 32-bit...
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| 2017-11-23 |
Jan Beulich | x86: drop redundant VSIB handling code
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| 2017-11-23 |
Jan Beulich | x86: correct UDn
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| 2017-11-23 |
Jan Beulich | x86/Intel: don't report multiple errors for a single...
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| 2017-11-16 |
Jan Beulich | x86: ignore high register select bit(s) in 32- and...
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| 2017-11-16 |
Jan Beulich | ix86/Intel: don't require memory operand size specifier...
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| 2017-11-15 |
Jan Beulich | x86: use correct register names
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| 2017-11-15 |
Jan Beulich | x86: drop VEXI4_Fixup()
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| 2017-11-15 |
Jan Beulich | x86-64: don't allow use of %axl as accumulator
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| 2017-11-14 |
Jan Beulich | x86: add disassembler support for XOP VPCOM* pseudo-ops
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| 2017-11-14 |
Jan Beulich | x86: add support for AVX-512 VPCMP*{B,W} pseudo-ops
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| 2017-11-14 |
Jan Beulich | x86: string insns don't allow displacements
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| 2017-11-13 |
Jan Beulich | gas/arm64: don't emit stack pointer symbol table entries
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| 2017-11-13 |
Jan Beulich | gas/ia64: fix testsuite failures
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| 2017-11-13 |
Jan Beulich | PE: don't corrupt section flags when linking from ELF...
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| 2017-11-13 |
Jan Beulich | x86: don't default variable shift count insns to 8...
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| 2017-11-13 |
Jan Beulich | x86: {f,}xsave64 / {f,}xrstor64 / xsaveopt64 should...
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| 2017-11-13 |
Jan Beulich | x86/Intel: don't mistake riz/eiz as base register
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| 2017-11-13 |
Jan Beulich | x86-64/Intel: issue diagnostic for out of range displacement
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| 2017-07-05 |
 Borislav Petkov | X86: Disassemble primary opcode map's group 2 ModRM...
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| 2017-02-28 |
Jan Beulich | x86: fix handling of 64-bit operand size VPCMPESTR...
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| 2017-02-24 |
Jan Beulich | x86: also correctly support TEST opcode aliases
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| 2017-02-23 |
Jan Beulich | gas: slightly relax .startof.()/.sizeof.() testcase
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| 2017-02-23 |
Jan Beulich | x86: drop stray VEX opcode 82 references
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| 2017-02-23 |
Jan Beulich | x86: extend 64-bit invalid MPX insn forms testcase
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| 2017-02-22 |
Jan Beulich | gas: require an operand to .startof.()/.sizeof.()
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| 2017-02-22 |
Jan Beulich | aarch64: actually copy first operand in convert_bfc_to_bfm()
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| 2016-07-05 |
Jan Beulich | ld: track linker-definedness of symbols
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commit | commitdiff | tree |
| 2016-07-05 |
Jan Beulich | x86: fix register check in check_qword_reg()
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| 2016-07-01 |
Jan Beulich | x86-64/MPX: relax no-RIP-relative-addressing testcase
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| 2016-07-01 |
Jan Beulich | x86-64/MPX: bndmk, bndldx, and bndstx don't allow RIP...
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| 2016-07-01 |
Jan Beulich | x86/MPX: fix address size handling
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| 2016-07-01 |
Jan Beulich | x86/Intel: don't accept bogus instructions
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| 2016-07-01 |
Jan Beulich | x86: allow suffix-less movzw and 64-bit movzb
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| 2016-07-01 |
Jan Beulich | x86: remove stray instruction attributes
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| 2016-07-01 |
Jan Beulich | x86/Intel: fix operand checking for MOVSD
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| 2015-12-15 |
Jan Beulich | bfd: don't produce corrupt COFF symbol table due to...
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| 2015-12-14 |
Jan Beulich | gas: free allocated symbol name in .cfi_label handling
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| 2015-12-14 |
Jan Beulich | nm: basic COFF symbol type support for SysV-style symbol...
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| 2015-12-09 |
Jan Beulich | gas/ELF: slightly relax elf/file*.d expectations
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| 2015-12-08 |
Jan Beulich | gas: consistently emit diagnostics for non-zero data...
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| 2015-12-08 |
Jan Beulich | gas: don't get confused by .asci{i,z} after .struct
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| 2015-12-08 |
Jan Beulich | ELF: don't re-order SHF_FILE symbols
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| 2015-12-07 |
Jan Beulich | ld: relax alignment requirements of compressed .debug_...
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| 2015-06-01 |
Jan Beulich | x86/Intel: fix i386_optab[] for vcvt{,u}si2s{d,s}
2015-06-01 Jan Beulich <jbeulich@suse.com>
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| 2015-06-01 |
Jan Beulich | x86/Intel: disassemble vcvt{,u}si2s{d,s} with correct...
2015-06-01 Jan Beulich <jbeulich@suse.com>
2015-06-01 Jan Beulich <jbeulich@suse.com>
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| 2015-06-01 |
Jan Beulich | x86/Intel: accept mandated operand order for vcvt{...
2015-06-01 Jan Beulich <jbeulich@suse.com>
2015-06-01 Jan Beulich <jbeulich@suse.com>
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| 2015-04-23 |
Jan Beulich | x86: disambiguate disassembly of certain AVX512 insns
2015-04-23 Jan Beulich <jbeulich@suse.com>
2015-04-23 Jan Beulich <jbeulich@suse.com>
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Jan Beulich
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