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fd936b4c
JR		 12011-10-26 Joern Rennecke <joern.rennecke@embecosm.com>
2
3 * epiphany.opc (parse_branch_addr): Fix type of valuep.
4 Cast value before printing it as a long.
5 (parse_postindex): Fix type of valuep.
6
cfb8c092
NC		 72011-10-25 Joern Rennecke <joern.rennecke@embecosm.com>
8
9 * cpu/epiphany.cpu: New file.
10 * cpu/epiphany.opc: New file.
11
dc15e575
NC		 122011-08-22 Nick Clifton <nickc@redhat.com>
13
14 * fr30.cpu: Newly contributed file.
15 * fr30.opc: Likewise.
16 * ip2k.cpu: Likewise.
17 * ip2k.opc: Likewise.
18 * mep-avc.cpu: Likewise.
19 * mep-avc2.cpu: Likewise.
20 * mep-c5.cpu: Likewise.
21 * mep-core.cpu: Likewise.
22 * mep-default.cpu: Likewise.
23 * mep-ext-cop.cpu: Likewise.
24 * mep-fmax.cpu: Likewise.
25 * mep-h1.cpu: Likewise.
26 * mep-ivc2.cpu: Likewise.
27 * mep-rhcop.cpu: Likewise.
28 * mep-sample-ucidsp.cpu: Likewise.
29 * mep.cpu: Likewise.
30 * mep.opc: Likewise.
31 * openrisc.cpu: Likewise.
32 * openrisc.opc: Likewise.
33 * xstormy16.cpu: Likewise.
34 * xstormy16.opc: Likewise.
35
9ccb8af9
AM		 362010-10-08 Pierre Muller <muller@ics.u-strasbg.fr>
37
38 * frv.opc: #undef DEBUG.
39
21375995
DD		 402010-07-03 DJ Delorie <dj@delorie.com>
41
42 * m32c.cpu (f-dsp-8-s24): Mask high byte after shifting it.
43
5ff58fb0
DE		 442010-02-11 Doug Evans <dje@sebabeach.org>
45
46 * m32r.cpu (HASH-PREFIX): Delete.
47 (duhpo, dshpo): New pmacros.
48 (simm8, simm16): Delete HASH-PREFIX attribute, define with dshpo.
49 (uimm3, uimm4, uimm5, uimm8, uimm16, imm1): Delete HASH-PREFIX
50 attribute, define with dshpo.
51 (uimm24): Delete HASH-PREFIX attribute.
52 * m32r.opc (CGEN_PRINT_NORMAL): Delete.
53 (print_signed_with_hash_prefix): New function.
54 (print_unsigned_with_hash_prefix): New function.
55 * xc16x.cpu (dowh): New pmacro.
56 (upof16): Define with dowh, specify print handler.
57 (qbit, qlobit, qhibit): Ditto.
58 (upag16): Ditto.
59 * xc16x.opc (CGEN_PRINT_NORMAL): Delete.
60 (print_with_dot_prefix): New functions.
61 (print_with_pof_prefix, print_with_pag_prefix): New functions.
62
3fa5b97b
DE		 632010-01-24 Doug Evans <dje@sebabeach.org>
64
65 * frv.cpu (floating-point-conversion): Update call to fp conv op.
66 (floating-point-dual-conversion, ne-floating-point-dual-conversion,
67 conditional-floating-point-conversion, ne-floating-point-conversion,
68 float-parallel-mul-add-double-semantics): Ditto.
69
fe8afbc4
DE		 702010-01-05 Doug Evans <dje@sebabeach.org>
71
72 * m32c.cpu (f-dsp-32-u24): Fix mode of extract handler.
73 (f-dsp-40-u20, f-dsp-40-u24): Ditto.
74
caaf56fb
DE		 752010-01-02 Doug Evans <dje@sebabeach.org>
76
77 * m32c.opc (parse_signed16): Fix typo.
78
91d6fa6a
NC		 792009-12-11 Nick Clifton <nickc@redhat.com>
80
81 * frv.opc: Fix shadowed variable warnings.
82 * m32c.opc: Fix shadowed variable warnings.
83
ec84cc2b
DE		 842009-11-14 Doug Evans <dje@sebabeach.org>
85
86 Must use VOID expression in VOID context.
87 * xc16x.cpu (mov4): Fix mode of `sequence'.
88 (mov9, mov10): Ditto.
89 (movbsrr, moveb1, jmprel, jmpseg, jmps): Fix mode of `if'.
90 (callr, callseg, calls, trap, rets, reti): Ditto.
91 (jb, jbc, jnb, jnbs): Fix mode of `if'. Comment out no-op `sll'.
92 (atomic, extr, extp, extp1, extpg1, extpr, extpr1): Fix mode of `cond'.
93 (exts, exts1, extsr, extsr1, prior): Ditto.
94
ac1e9eca
DE		 952009-10-23 Doug Evans <dje@sebabeach.org>
96
97 * m32c.opc (opc.h): cgen-types.h -> cgen/basic-modes.h.
98 cgen-ops.h -> cgen/basic-ops.h.
99
b4744b17
AM		 1002009-09-25 Alan Modra <amodra@bigpond.net.au>
101
102 * m32r.cpu (stb-plus): Typo fix.
103
ab5f875d
DE		 1042009-09-23 Doug Evans <dje@sebabeach.org>
105
106 * m32r.cpu (sth-plus): Fix address mode and calculation.
107 (stb-plus): Ditto.
108 (clrpsw): Fix mask calculation.
109 (bset, bclr, btst): Make mode in bit calculation match expression.
110
111 * xc16x.cpu (rtl-version): Set to 0.8.
112 (gr-names, ext-names,psw-names): Update, print-name -> enum-prefix,
113 make uppercase. Remove unnecessary name-prefix spec.
114 (grb-names, conditioncode-names, extconditioncode-names): Ditto.
115 (grb8-names, r8-names, regmem8-names, regdiv8-names): Ditto.
116 (reg0-name, reg0-name1, regbmem8-names, memgr8-names): Ditto.
117 (h-cr): New hardware.
118 (muls): Comment out parts that won't compile, add fixme.
119 (mulu, divl, divlu, jmpabs, jmpa-, jmprel, jbc, jnbs, callr): Ditto.
120 (scxti, scxtmg, scxtm, bclear, bclr18, bset19, bitset, bmov): Ditto.
121 (bmovn, band, bor, bxor, bcmp, bfldl, bfldh): Ditto.
122
0aaaf7c3
DE		 1232009-07-16 Doug Evans <dje@sebabeach.org>
124
125 * cpu/simplify.inc (*): One line doc strings don't need \n.
126 (df): Invoke define-full-ifield instead of claiming it's an alias.
127 (dno): Define.
128 (dnop): Mark as deprecated.
129
1998a8e0
AM		 1302009-06-22 Alan Modra <amodra@bigpond.net.au>
131
132 * m32c.opc (parse_lab_5_3): Use correct enum.
133
6347aad8
HPN		 1342009-01-07 Hans-Peter Nilsson <hp@axis.com>
135
136 * frv.cpu (mabshs): Explicitly sign-extend arguments of abs to DI.
137 (DI-ext-HI, DI-ext-UHI, DI-ext-DI): New pmacros.
138 (media-arith-sat-semantics): Explicitly sign- or zero-extend
139 arguments of "operation" to DI using "mode" and the new pmacros.
140
2c06b7a6
HPN		 1412009-01-03 Hans-Peter Nilsson <hp@axis.com>
142
143 * cris.cpu (cris-implemented-writable-specregs-v32): Correct size
144 of number 2, PID.
145
84e94c90
NC		 1462008-12-23 Jon Beniston <jon@beniston.com>
147
148 * lm32.cpu: New file.
149 * lm32.opc: New file.
150
90518ff4
AM		 1512008-01-29 Alan Modra <amodra@bigpond.net.au>
152
153 * mt.opc (parse_imm16): Apply 2007-09-26 opcodes/mt-asm.c change
154 to source.
155
a69f60de
HPN		 1562007-10-22 Hans-Peter Nilsson <hp@axis.com>
157
158 * cris.cpu (movs, movu): Use result of extension operation when
159 updating flags.
160
9b201bb5
NC		 1612007-07-04 Nick Clifton <nickc@redhat.com>
162
163 * cris.cpu: Update copyright notice to refer to GPLv3.
164 * frv.cpu, frv.opc, iq10.cpu, iq2000m.cpu, iq2000.opc, m32c.cpu,
165 m32c.opc, m32r.cpu, m32r.opc, mt.cpu, mt.opc, sh64-compact.cpu,
166 sh64-media.cpu, sh.cpu, sh.opc, simplify.inc, xc16x.cpu,
167 xc16x.opc: Likewise.
168 * iq2000.cpu: Fix copyright notice to refer to FSF.
169
53289dcd
MS		 1702007-04-30 Mark Salter <msalter@sadr.localdomain>
171
172 * frv.cpu (spr-names): Support new coprocessor SPR registers.
173
f6da2ec2
NC		 1742007-04-20 Nick Clifton <nickc@redhat.com>
175
176 * xc16x.cpu: Restore after accidentally overwriting this file with
177 xc16x.opc.
178
144f4bc6
DD		 1792007-03-29 DJ Delorie <dj@redhat.com>
180
181 * m32c.cpu (Imm-8-s4n): Fix print hook.
182 (Lab-24-8, Lab-32-8, Lab-40-8): Fix.
183 (arith-jnz-imm4-dst-defn): Make relaxable.
184 (arith-jnz16-imm4-dst-defn): Fix encodings.
185
75b06e7b
DD		 1862007-03-20 DJ Delorie <dj@redhat.com>
187
188 * m32c.cpu (f-dsp-40-u20, f-dsp-48-u20, Dsp-40-u20, Dsp-40-u20,
189 mem20): New.
190 (src16-16-20-An-relative-*): New.
191 (dst16-*-20-An-relative-*): New.
192 (dst16-16-16sa-*): New
193 (dst16-16-16ar-*): New
194 (dst32-16-16sa-Unprefixed-*): New
195 (jsri): Fix operands.
196 (setzx): Fix encoding.
197
a5da764d
AM		 1982007-03-08 Alan Modra <amodra@bigpond.net.au>
199
200 * m32r.opc: Formatting.
201
b497d0b0
NC		 2022006-05-22 Nick Clifton <nickc@redhat.com>
203
204 * iq2000.cpu: Fix include paths for iq2000m.cpu and iq10.cpu.
205
e78efa90
DD		 2062006-04-10 DJ Delorie <dj@redhat.com>
207
208 * m32c.opc (parse_unsigned_bitbase): Take a new parameter which
209 decides if this function accepts symbolic constants or not.
210 (parse_signed_bitbase): Likewise.
211 (parse_unsigned_bitbase8): Pass the new parameter.
212 (parse_unsigned_bitbase11): Likewise.
213 (parse_unsigned_bitbase16): Likewise.
214 (parse_unsigned_bitbase19): Likewise.
215 (parse_unsigned_bitbase27): Likewise.
216 (parse_signed_bitbase8): Likewise.
217 (parse_signed_bitbase11): Likewise.
218 (parse_signed_bitbase19): Likewise.
219
8d0e2679
DD		 2202006-03-13 DJ Delorie <dj@redhat.com>
221
43aa3bb1
DD		 222 * m32c.cpu (Bit3-S): New.
223 (btst:s): New.
224 * m32c.opc (parse_bit3_S): New.
225
8d0e2679
DD		 226 * m32c.cpu (decimal-subtraction16-insn): Add second operand.
227 (btst): Add optional :G suffix for MACH32.
228 (or.b:S): New.
229 (pop.w:G): Add optional :G suffix for MACH16.
230 (push.b.imm): Fix syntax.
231
253d272c
DD		 2322006-03-10 DJ Delorie <dj@redhat.com>
233
234 * m32c.cpu (mul.l): New.
235 (mulu.l): New.
236
c7d41dc5
NC		 2372006-03-03 Shrirang Khisti <shrirangk@kpitcummins.com)
238
239 * xc16x.opc (parse_hash): Return NULL if the input was parsed or
240 an error message otherwise.
241 (parse_dot, parse_pof, parse_pag, parse_sof, parse_seg): Likewise.
242 Fix up comments to correctly describe the functions.
243
6772dd07
DD		 2442006-02-24 DJ Delorie <dj@redhat.com>
245
246 * m32c.cpu (RL_TYPE): New attribute, with macros.
247 (Lab-8-24): Add RELAX.
248 (unary-insn-defn-g, binary-arith-imm-dst-defn,
249 binary-arith-imm4-dst-defn): Add 1ADDR attribute.
250 (binary-arith-src-dst-defn): Add 2ADDR attribute.
251 (jcnd16-5, jcnd16, jcnd32, jmp16.s, jmp16.b, jmp16.w, jmp16.a,
252 jmp32.s, jmp32.b, jmp32.w, jmp32.a, jsr16.w, jsr16.a): Add JUMP
253 attribute.
254 (jsri16, jsri32): Add 1ADDR attribute.
255 (jsr32.w, jsr32.a): Add JUMP attribute.
256
d70c5fc7
NC		 2572006-02-17 Shrirang Khisti <shrirangk@kpitcummins.com>
258 Anil Paranjape <anilp1@kpitcummins.com>
259 Shilin Shakti <shilins@kpitcummins.com>
260
261 * xc16x.cpu: New file containing complete CGEN specific XC16X CPU
262 description.
263 * xc16x.opc: New file containing supporting XC16C routines.
264
8536c657
NC		 2652006-02-10 Nick Clifton <nickc@redhat.com>
266
267 * iq2000.opc (parse_hi16): Truncate shifted values to 16 bits.
268
458f7770
DD		 2692006-01-06 DJ Delorie <dj@redhat.com>
270
271 * m32c.cpu (mov.w:q): Fix mode.
272 (push32.b.imm): Likewise, for the comment.
273
d031aafb
NS		 2742005-12-16 Nathan Sidwell <nathan@codesourcery.com>
275
276 Second part of ms1 to mt renaming.
277 * mt.cpu (define-arch, define-isa): Set name to mt.
278 (define-mach): Adjust.
279 * mt.opc (CGEN_ASM_HASH): Update.
280 (mt_asm_hash, mt_cgen_insn_supported): Renamed.
281 (parse_loopsize, parse_imm16): Adjust.
282
eda87aba
DD		 2832005-12-13 DJ Delorie <dj@redhat.com>
284
285 * m32c.cpu (jsri): Fix order so register names aren't treated as
286 symbols.
287 (indexb, indexbd, indexbs, indexl, indexld, indexls, indexw,
288 indexwd, indexws): Fix encodings.
289
4970f871
NS		 2902005-12-12 Nathan Sidwell <nathan@codesourcery.com>
291
292 * mt.cpu: Rename from ms1.cpu.
293 * mt.opc: Rename from ms1.opc.
294
48ad8298
HPN		 2952005-12-06 Hans-Peter Nilsson <hp@axis.com>
296
297 * cris.cpu (simplecris-common-writable-specregs)
298 (simplecris-common-readable-specregs): Split from
299 simplecris-common-specregs. All users changed.
300 (cris-implemented-writable-specregs-v0)
301 (cris-implemented-readable-specregs-v0): Similar from
302 cris-implemented-specregs-v0.
303 (cris-implemented-writable-specregs-v3)
304 (cris-implemented-readable-specregs-v3)
305 (cris-implemented-writable-specregs-v8)
306 (cris-implemented-readable-specregs-v8)
307 (cris-implemented-writable-specregs-v10)
308 (cris-implemented-readable-specregs-v10)
309 (cris-implemented-writable-specregs-v32)
310 (cris-implemented-readable-specregs-v32): Similar.
311 (bdap-32-pc, move-m-pcplus-p0, move-m-spplus-p8): New
312 insns and specializations.
313
6f84a2a6
NS		 3142005-11-08 Nathan Sidwell <nathan@codesourcery.com>
315
316 Add ms2
317 * ms1.cpu (ms2, ms2bf): New architecture variant, cpu, machine and
318 model.
319 (f-uu8, f-uu1, f-imm16l, f-loopo, f-cb1sel, f-cb2sel, f-cb1incr,
320 f-cb2incr, f-rc3): New fields.
321 (LOOP): New instruction.
322 (JAL-HAZARD): New hazard.
323 (imm16o, loopsize, imm16l, rc3, cb1sel, cb2sel, cb1incr, cb2incr):
324 New operands.
325 (mul, muli, dbnz, iflush): Enable for ms2
326 (jal, reti): Has JAL-HAZARD.
327 (ldctxt, ldfb, stfb): Only ms1.
328 (fbcb): Only ms1,ms1-003.
329 (wfbinc, mefbinc, wfbincr, mwfbincr, fbcbincs, mfbcbincs,
330 fbcbincrs, mfbcbincrs): Enable for ms2.
331 (loop, loopu, dfbc, dwfb, fbwfb, dfbr): New ms2 insns.
332 * ms1.opc (parse_loopsize): New.
333 (parse_imm16): hi16/lo16 relocs are applicable to IMM16L.
334 (print_pcrel): New.
335
95b96521
DB		 3362005-10-28 Dave Brolley <brolley@redhat.com>
337
338 Contribute the following change:
339 2003-09-24 Dave Brolley <brolley@redhat.com>
340
341 * frv.opc: Use CGEN_ATTR_VALUE_ENUM_TYPE in place of
342 CGEN_ATTR_VALUE_TYPE.
343 * m32c.opc (m32c_cgen_insn_supported): Use CGEN_INSN_BITSET_ATTR_VALUE.
344 Use cgen_bitset_intersect_p.
345
c6552317
DD		 3462005-10-27 DJ Delorie <dj@redhat.com>
347
348 * m32c.cpu (Imm-8-s4n, Imm-12-s4n): New.
349 (arith-jnz16-imm4-dst-defn, arith-jnz32-imm4-dst-defn,
350 arith-jnz-imm4-dst-mach, arith-jnz-imm4-dst): Keep track of which
351 imm operand is needed.
352 (adjnz, sbjnz): Pass the right operands.
353 (unary-insn-defn, unary16-defn, unary32-defn, unary-insn-mach,
354 unary-insn): Add -g variants for opcodes that need to support :G.
355 (not.BW:G, push.BW:G): Call it.
356 (stzx16-imm8-imm8-dsp8sb, stzx16-imm8-imm8-dsp8fb,
357 stzx16-imm8-imm8-abs16): Fix operand typos.
358 * m32c.opc (m32c_asm_hash): Support bnCND.
359 (parse_signed4n, print_signed4n): New.
360
f75eb1c0
DD		 3612005-10-26 DJ Delorie <dj@redhat.com>
362
363 * m32c.cpu (f-dsp-8-s24, Dsp-8-s24): New.
364 (mov-dspsp-dst-defn, mov-src-dspsp-defn, mov16-dspsp-dst-defn,
365 mov16-src-dspsp-defn, mov32-dspsp-dst-defn, mov32-src-dspsp-defn):
366 dsp8[sp] is signed.
367 (mov.WL:S #imm,A0/A1): dsp24 is signed (i.e. -0x800000..0xffffff).
368 (mov.BW:S r0,r1): Fix typo r1l->r1.
369 (tst): Allow :G suffix.
370 * m32c.opc (parse_signed24): New, for -0x800000..0xffffff.
371
e277c00b
AM		 3722005-10-26 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
373
374 * m32r.opc (parse_hi16): Do not assume a 32-bit host word size.
375
92e0a941
DD		 3762005-10-25 DJ Delorie <dj@redhat.com>
377
378 * m32c.cpu (add16-bQ-sp,add16-wQ-sp): Fix to allow either width by
379 making one a macro of the other.
380
a1a280bb
DD		 3812005-10-21 DJ Delorie <dj@redhat.com>
382
383 * m32c.cpu (lde, ste): Add dsp[a0] and [a1a] addressing.
384 (indexb, indexbd, indexbs, indexw, indexwd, indexws, indexl,
385 indexld, indexls): .w variants have `1' bit.
386 (rot32.b): QI, not SI.
387 (rot32.w): HI, not SI.
388 (xchg16): HI for .w variant.
389
e74eb924
NC		 3902005-10-19 Nick Clifton <nickc@redhat.com>
391
392 * m32r.opc (parse_slo16): Fix bad application of previous patch.
393
5e03663f
NC		 3942005-10-18 Andreas Schwab <schwab@suse.de>
395
396 * m32r.opc (parse_slo16): Better version of previous patch.
397
ab7c9a26
NC		 3982005-10-14 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
399
400 * cpu/m32r.opc (parse_slo16): Do not assume a 32-bit host word
401 size.
402
fd54057a
DD		 4032005-07-25 DJ Delorie <dj@redhat.com>
404
405 * m32c.opc (parse_unsigned8): Add %dsp8().
406 (parse_signed8): Add %hi8().
407 (parse_unsigned16): Add %dsp16().
408 (parse_signed16): Add %lo16() and %hi16().
409 (parse_lab_5_3): Make valuep a bfd_vma *.
410
85da3a56
NC		 4112005-07-18 Nick Clifton <nickc@redhat.com>
412
413 * m32c.cpu (f-16-8, f-24-8, f-32-16, f-dsp-8-u24): New opcode
414 components.
415 (f-lab32-jmp-s): Fix insertion sequence.
416 (Dsp-8-u24, Lab-5-3, Lab32-jmp-s): New operands.
417 (Dsp-40-s8): Make parameter be signed.
418 (Dsp-40-s16): Likewise.
419 (Dsp-48-s8): Likewise.
420 (Dsp-48-s16): Likewise.
421 (Imm-13-u3): Likewise. (Despite its name!)
422 (BitBase16-16-s8): Make the parameter be unsigned.
423 (BitBase16-8-u11-S): Likewise.
424 (Lab-8-8, Lab-8-16, Lab-16-8, jcnd16-5, jcnd16, jcnd32, jmp16.s,
425 jmp16.b, jmp16.w, jmp32.s, jmp32.b, jmp32.w, jsp16.w, jsr32.w): Allow
426 relaxation.
427
428 * m32c.opc: Fix formatting.
429 Use safe-ctype.h instead of ctype.h
430 Move duplicated code sequences into a macro.
431 Fix compile time warnings about signedness mismatches.
432 Remove dead code.
433 (parse_lab_5_3): New parser function.
434
aa260854
JB		 4352005-07-16 Jim Blandy <jimb@redhat.com>
436
437 * m32c.opc (m32c_cgen_insn_supported): Use int, not CGEN_BITSET,
438 to represent isa sets.
439
0a665bfd
JB		 4402005-07-15 Jim Blandy <jimb@redhat.com>
441
442 * m32c.cpu, m32c.opc: Fix copyright.
443
49f58d10
JB		 4442005-07-14 Jim Blandy <jimb@redhat.com>
445
446 * m32c.cpu, m32c.opc: Machine description for the Renesas M32C.
447
0e6b69be
AM		 4482005-07-14 Alan Modra <amodra@bigpond.net.au>
449
450 * ms1.opc (print_dollarhex): Correct format string.
451
f9210e37
AM		 4522005-07-06 Alan Modra <amodra@bigpond.net.au>
453
454 * iq2000.cpu: Include from binutils cpu dir.
455
3ec2b351
NC		 4562005-07-05 Nick Clifton <nickc@redhat.com>
457
458 * iq2000.opc (parse_lo16, parse_mlo16): Make value parameter
459 unsigned in order to avoid compile time warnings about sign
460 conflicts.
461
462 * ms1.opc (parse_*): Likewise.
463 (parse_imm16): Use a "void *" as it is passed both signed and
464 unsigned arguments.
465
47b0e7ad
NC		 4662005-07-01 Nick Clifton <nickc@redhat.com>
467
468 * frv.opc: Update to ISO C90 function declaration style.
469 * iq2000.opc: Likewise.
470 * m32r.opc: Likewise.
471 * sh.opc: Likewise.
472
b081650b
DB		 4732005-06-15 Dave Brolley <brolley@redhat.com>
474
475 Contributed by Red Hat.
476 * ms1.cpu: New file. Written by Nick Clifton, Stan Cox.
477 * ms1.opc: New file. Written by Stan Cox.
478
e172dbf8
NC		 4792005-05-10 Nick Clifton <nickc@redhat.com>
480
481 * Update the address and phone number of the FSF organization in
482 the GPL notices in the following files:
483 cris.cpu, frv.cpu, frv.opc, iq10.cpu, iq2000.opc, iq2000m.cpu,
484 m32r.cpu, m32r.opc, sh.cpu, sh.opc, sh64-compact.cpu,
485 sh64-media.cpu, simplify.inc
486
b2d52a48
AM		 4872005-02-24 Alan Modra <amodra@bigpond.net.au>
488
489 * frv.opc (parse_A): Warning fix.
490
33b71eeb
NC		 4912005-02-23 Nick Clifton <nickc@redhat.com>
492
493 * frv.opc: Fixed compile time warnings about differing signed'ness
494 of pointers passed to functions.
495 * m32r.opc: Likewise.
496
bc18c937
NC		 4972005-02-11 Nick Clifton <nickc@redhat.com>
498
499 * iq2000.opc (parse_jtargq10): Change type of valuep argument to
500 'bfd_vma *' in order avoid compile time warning message.
501
46da9a19
HPN		 5022005-01-28 Hans-Peter Nilsson <hp@axis.com>
503
504 * cris.cpu (mstep): Add missing insn.
505
90219bd0
AO		 5062005-01-25 Alexandre Oliva <aoliva@redhat.com>
507
508 2004-11-10 Alexandre Oliva <aoliva@redhat.com>
509 * frv.cpu: Add support for TLS annotations in loads and calll.
510 * frv.opc (parse_symbolic_address): New.
511 (parse_ldd_annotation): New.
512 (parse_call_annotation): New.
513 (parse_ld_annotation): New.
514 (parse_ulo16, parse_uslo16): Use parse_symbolic_address.
515 Introduce TLS relocations.
516 (parse_d12, parse_s12, parse_u12): Likewise.
517 (parse_uhi16): Likewise. Fix constant checking on 64-bit host.
518 (parse_call_label, print_at): New.
519
c3d75c30
HPN		 5202004-12-21 Mikael Starvik <starvik@axis.com>
521
522 * cris.cpu (cris-set-mem): Correct integral write semantics.
523
68800d83
HPN		 5242004-11-29 Hans-Peter Nilsson <hp@axis.com>
525
526 * cris.cpu: New file.
527
4bd1d37b
NC		 5282004-11-15 Michael K. Lechner <mike.lechner@gmail.com>
529
530 * iq2000.cpu: Added quotes around macro arguments so that they
531 will work with newer versions of guile.
532
4030fa5a
NC		 5332004-10-27 Nick Clifton <nickc@redhat.com>
534
535 * iq2000m.cpu (pkrlr1, pkrlr30, rbr1, rbr30, rxr1, rxr30, wbr1,
536 wbr1u, wbr30, wbr30u, wxr1, wxr1u, wxr30, wxr30u): Add an index
537 operand.
538 * iq2000.cpu (dnop index): Rename to _index to avoid complications
539 with guile.
540
ac28a1cb
RS		 5412004-08-27 Richard Sandiford <rsandifo@redhat.com>
542
543 * frv.cpu (cfmovs): Change UNIT attribute to FMALL.
544
dc4c54bb
NC		 5452004-05-15 Nick Clifton <nickc@redhat.com>
546
547 * iq2000.opc (iq2000_cgen_insn_supported): Make 'insn' argument const.
548
f4453dfa
NC		 5492004-03-30 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
550
551 * m32r.opc (parse_hi16): Fixed shigh(0xffff8000) bug.
552
676a64f4
RS		 5532004-03-01 Richard Sandiford <rsandifo@redhat.com>
554
555 * frv.cpu (define-arch frv): Add fr450 mach.
556 (define-mach fr450): New.
557 (define-model fr450): New. Add profile units to every fr450 insn.
558 (define-attr UNIT): Add MDCUTSSI.
559 (define-attr FR450-MAJOR): New enum. Add to every fr450 insn.
560 (define-attr AUDIO): New boolean.
561 (f-LRAE, f-LRAD, f-LRAS, f-TLBPRopx, f-TLBPRL)
562 (f-LRA-null, f-TLBPR-null): New fields.
563 (scr0, scr1, scr2, scr3, imavr1, damvr1, cxnr, ttbr)
564 (tplr, tppr, tpxr, timerh, timerl, timerd, btbr): New SPRs.
565 (LRAE, LRAD, LRAS, TLBPRopx, TLBPRL): New operands.
566 (LRA-null, TLBPR-null): New macros.
567 (iacc-multiply-r-r, slass, scutss, int-arith-ss-r-r): Add AUDIO attr.
568 (load-real-address): New macro.
569 (lrai, lrad, tlbpr): New instructions.
570 (media-cut-acc, media-cut-acc-ss): Add fr450-major argument.
571 (mcut, mcuti, mcutss, mcutssi): Adjust accordingly.
572 (mdcutssi): Change UNIT attribute to MDCUTSSI.
573 (media-low-clear-semantics, media-scope-limit-semantics)
574 (media-quad-limit, media-quad-shift): New macros.
575 (mqlclrhs, mqlmths, mqsllhi, mqsrahi): New instructions.
576 * frv.opc (frv_is_branch_major, frv_is_float_major, frv_is_media_major)
577 (frv_is_branch_insn, frv_is_float_insn, frv_is_media_insn)
578 (frv_vliw_reset, frv_vliw_add_insn): Handle bfd_mach_fr450.
579 (fr450_unit_mapping): New array.
580 (fr400_unit_mapping, fr500_unit_mapping, fr550_unit_mapping): Add entry
581 for new MDCUTSSI unit.
582 (fr450_check_insn_major_constraints): New function.
583 (check_insn_major_constraints): Use it.
584
c7a48b9a
RS		 5852004-03-01 Richard Sandiford <rsandifo@redhat.com>
586
587 * frv.cpu (nsdiv, nudiv, nsdivi, nudivi): Remove fr400 profiling unit.
588 (scutss): Change unit to I0.
589 (calll, callil, ccalll): Add missing FR550-MAJOR and profile unit.
590 (mqsaths): Fix FR400-MAJOR categorization.
591 (media-quad-multiply-cross-acc, media-quad-cross-multiply-cross-acc)
592 (media-quad-cross-multiply-acc): Change unit from MDUALACC to FMALL.
593 * frv.opc (fr400_check_insn_major_constraints): Check for (M-2,M-1)
594 combinations.
595
8ae0baa2
RS		 5962004-03-01 Richard Sandiford <rsandifo@redhat.com>
597
598 * frv.cpu (r-store, r-store-dual, r-store-quad): Delete.
599 (rstb, rsth, rst, rstd, rstq): Delete.
600 (rstbf, rsthf, rstf, rstdf, rstqf): Delete.
601
8ee9a8b2
NC		 6022004-02-23 Nick Clifton <nickc@redhat.com>
603
604 * Apply these patches from Renesas:
605
606 2004-02-10 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
607
608 * cpu/m32r.opc (my_print_insn): Fixed incorrect output when
609 disassembling codes for 0x*2 addresses.
610
611 2003-12-15 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
612
613 * cpu/m32r.cpu: Add PIPE_O attribute to "pop" instruction.
614
615 2003-12-03 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
616
617 * cpu/m32r.cpu : Add new model m32r2.
618 Add new instructions.
619 Replace occurrances of 'Mitsubishi' with 'Renesas'.
620 Changed PIPE attr of push from O to OS.
621 Care for Little-endian of M32R.
622 * cpu/m32r.opc (CGEN_DIS_HASH, my_print_insn):
623 Care for Little-endian of M32R.
624 (parse_slo16): signed extension for value.
625
299d901c
AC		 6262004-02-20 Andrew Cagney <cagney@redhat.com>
627
e866a257
AC		 628 * m32r.opc, m32r.cpu: New files. Written by , Doug Evans, Nick
629 Clifton, Ben Elliston, Matthew Green, and Andrew Haley.
630
299d901c
AC		 631 * sh.cpu, sh.opc, sh64-compact.cpu, sh64-media.cpu: New files, all
632 written by Ben Elliston.
633
cb10e79a
RS		 6342004-01-14 Richard Sandiford <rsandifo@redhat.com>
635
636 * frv.cpu (UNIT): Add IACC.
637 (iacc-multiply-r-r): Use it.
638 * frv.opc (fr400_unit_mapping): Add entry for IACC.
639 (fr500_unit_mapping, fr550_unit_mapping): Likewise.
640
d4e4dc14
AO		 6412004-01-06 Alexandre Oliva <aoliva@redhat.com>
642
643 2003-12-19 Alexandre Oliva <aoliva@redhat.com>
644 * frv.opc (parse_ulo16, parse_uhi16, parse_d12): Fix some
645 cut&paste errors in shifting/truncating numerical operands.
646 2003-08-08 Alexandre Oliva <aoliva@redhat.com>
647 * frv.opc (parse_ulo16): Parse gotofflo and gotofffuncdesclo.
648 (parse_uslo16): Likewise.
649 (parse_uhi16): Parse gotoffhi and gotofffuncdeschi.
650 (parse_d12): Parse gotoff12 and gotofffuncdesc12.
651 (parse_s12): Likewise.
652 2003-08-04 Alexandre Oliva <aoliva@redhat.com>
653 * frv.opc (parse_ulo16): Parse gotlo and gotfuncdesclo.
654 (parse_uslo16): Likewise.
655 (parse_uhi16): Parse gothi and gotfuncdeschi.
656 (parse_d12): Parse got12 and gotfuncdesc12.
657 (parse_s12): Likewise.
658
1340b9a9
DB		 6592003-10-10 Dave Brolley <brolley@redhat.com>
660
661 * frv.cpu (dnpmop): New p-macro.
662 (GRdoublek): Use dnpmop.
663 (CPRdoublek, FRdoublei, FRdoublej, FRdoublek): Ditto.
664 (store-double-r-r): Use (.sym regtype doublek).
665 (r-store-double): Ditto.
666 (store-double-r-r-u): Ditto.
667 (conditional-store-double): Ditto.
668 (conditional-store-double-u): Ditto.
669 (store-double-r-simm): Ditto.
670 (fmovs): Assign to UNIT FMALL.
671
ac7c07ac
DB		 6722003-10-06 Dave Brolley <brolley@redhat.com>
673
674 * frv.cpu, frv.opc: Add support for fr550.
675
d0312406
DB		 6762003-09-24 Dave Brolley <brolley@redhat.com>
677
678 * frv.cpu (u-commit): New modelling unit for fr500.
679 (mwtaccg): Use frv_ref_SI to reference ACC40Sk as an input operand.
680 (commit-r): Use u-commit model for fr500.
681 (commit): Ditto.
682 (conditional-float-binary-op): Take profiling data as an argument.
683 Update callers.
684 (ne-float-binary-op): Ditto.
685
c6945302
MS		 6862003-09-19 Michael Snyder <msnyder@redhat.com>
687
688 * frv.cpu (nldqi): Delete unimplemented instruction.
689
23600bb3
DB		 6902003-09-12 Dave Brolley <brolley@redhat.com>
691
692 * frv.cpu (u-clrgr, u-clrfr): New units of model fr500.
693 (clear-ne-flag-r): Pass insn profiling in as an argument. Call
694 frv_ref_SI to get input register referenced for profiling.
695 (clear-ne-flag-all): Pass insn profiling in as an argument.
696 (clrgr,clrfr,clrga,clrfa): Add profiling information.
697
6f18ad70
MS		 6982003-09-11 Michael Snyder <msnyder@redhat.com>
699
700 * frv.cpu: Typographical corrections.
701
96486995
DB		 7022003-09-09 Dave Brolley <brolley@redhat.com>
703
704 * frv.cpu (media-dual-complex): Change UNIT to FMALL.
705 (conditional-media-dual-complex, media-quad-complex): Likewise.
706
0457efce
DB		 7072003-09-04 Dave Brolley <brolley@redhat.com>
708
709 * frv.cpu (register-transfer): Pass in all attributes in on argument.
710 Update all callers.
711 (conditional-register-transfer): Ditto.
712 (cache-preload): Ditto.
713 (floating-point-conversion): Ditto.
714 (floating-point-neg): Ditto.
715 (float-abs): Ditto.
716 (float-binary-op-s): Ditto.
717 (conditional-float-binary-op): Ditto.
718 (ne-float-binary-op): Ditto.
719 (float-dual-arith): Ditto.
720 (ne-float-dual-arith): Ditto.
721
8caa9169
DB		 7222003-09-03 Dave Brolley <brolley@redhat.com>
723
724 * frv.opc (parse_A, parse_A0, parse_A1): New parse handlers.
725 * frv.cpu (UNIT): Add IALL, FMALL, FMLOW, STORE, SCAN, DCPL, MDUALACC,
726 MCLRACC-1.
727 (A): Removed operand.
728 (A0,A1): New operands replace operand A.
729 (mnop): Now a real insn
730 (mclracc): Removed insn.
731 (mclracc-0, mclracc-1): New insns replace mclracc.
732 (all insns): Use new UNIT attributes.
733
6d9ab561
NC		 7342003-08-21 Nick Clifton <nickc@redhat.com>
735
736 * frv.cpu (mbtoh): Replace input parameter to u-media-dual-expand
737 and u-media-dual-btoh with output parameter.
738 (cmbtoh): Add profiling hack.
739
741a7751
NC		 7402003-08-19 Michael Snyder <msnyder@redhat.com>
741
742 * frv.cpu: Fix typo, Frintkeven -> FRintkeven
743
5b5b78da
DE		 7442003-06-10 Doug Evans <dje@sebabeach.org>
745
746 * frv.cpu: Add IDOC attribute.
747
539ee71a
AC		 7482003-06-06 Andrew Cagney <cagney@redhat.com>
749
750 Contributed by Red Hat.
751 * iq2000.cpu: New file. Written by Ben Elliston, Jeff Johnston,
752 Stan Cox, and Frank Ch. Eigler.
753 * iq2000.opc: New file. Written by Ben Elliston, Frank
754 Ch. Eigler, Chris Moller, Jeff Johnston, and Stan Cox.
755 * iq2000m.cpu: New file. Written by Jeff Johnston.
756 * iq10.cpu: New file. Written by Jeff Johnston.
757
36c3ae24
NC		 7582003-06-05 Nick Clifton <nickc@redhat.com>
759
760 * frv.cpu (FRintieven): New operand. An even-numbered only
761 version of the FRinti operand.
762 (FRintjeven): Likewise for FRintj.
763 (FRintkeven): Likewise for FRintk.
764 (mdcutssi, media-dual-word-rotate-r-r, mqsaths,
765 media-quad-arith-sat-semantics, media-quad-arith-sat,
766 conditional-media-quad-arith-sat, mdunpackh,
767 media-quad-multiply-semantics, media-quad-multiply,
768 conditional-media-quad-multiply, media-quad-complex-i,
769 media-quad-multiply-acc-semantics, media-quad-multiply-acc,
770 conditional-media-quad-multiply-acc, munpackh,
771 media-quad-multiply-cross-acc-semantics, mdpackh,
772 media-quad-multiply-cross-acc, mbtoh-semantics,
773 media-quad-cross-multiply-cross-acc-semantics,
774 media-quad-cross-multiply-cross-acc, mbtoh, mhtob-semantics,
775 media-quad-cross-multiply-acc-semantics, cmbtoh,
776 media-quad-cross-multiply-acc, media-quad-complex, mhtob,
777 media-expand-halfword-to-double-semantics, mexpdhd, cmexpdhd,
778 cmhtob): Use new operands.
779 * frv.opc (CGEN_VERBOSE_ASSEMBLER_ERRORS): Define.
0e6b69be 780 (parse_even_register): New function.
36c3ae24 781
75798298
NC		 7822003-06-03 Nick Clifton <nickc@redhat.com>
783
784 * frv.cpu (media-dual-word-rotate-r-r): Use a signed 6-bit
785 immediate value not unsigned.
786
9aab5aa3
AC		 7872003-06-03 Andrew Cagney <cagney@redhat.com>
788
789 Contributed by Red Hat.
790 * frv.cpu: New file. Written by Dave Brolley, Catherine Moore,
791 and Eric Christopher.
792 * frv.opc: New file. Written by Catherine Moore, and Dave
793 Brolley.
794 * simplify.inc: New file. Written by Doug Evans.
795
2739f79a
AC		 7962003-05-02 Andrew Cagney <cagney@redhat.com>
797
798 * New file.
799
800\f
801Local Variables:
802mode: change-log
803left-margin: 8
804fill-column: 74
805version-control: never
806End:
GDB Binutils - Deliverables
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