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b3adc24a | 1 | # Copyright (C) 2003-2020 Free Software Foundation, Inc. |
64543e1a | 2 | # |
f96b4a7b NC |
3 | # This file is part of the GNU Binutils. |
4 | # | |
5 | # This program is free software; you can redistribute it and/or modify | |
64543e1a | 6 | # it under the terms of the GNU General Public License as published by |
f96b4a7b | 7 | # the Free Software Foundation; either version 3 of the License, or |
64543e1a RS |
8 | # (at your option) any later version. |
9 | # | |
10 | # This program is distributed in the hope that it will be useful, | |
11 | # but WITHOUT ANY WARRANTY; without even the implied warranty of | |
12 | # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
13 | # GNU General Public License for more details. | |
14 | # | |
15 | # You should have received a copy of the GNU General Public License | |
16 | # along with this program; if not, write to the Free Software | |
f96b4a7b NC |
17 | # Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, |
18 | # MA 02110-1301, USA. | |
64543e1a RS |
19 | |
20 | if {![istarget mips*-*-*] || ![is_elf_format]} { | |
21 | return | |
22 | } | |
23 | ||
697380b3 | 24 | if {[istarget mips*-*-irix6*]} { |
0c29b4cc | 25 | set ldemul "-melf32bsmip" |
697380b3 AO |
26 | } elseif {[istarget mips*el-*-linux*]} { |
27 | set ldemul "-melf32ltsmip" | |
28 | } elseif {[istarget mips*-*-linux*]} { | |
29 | set ldemul "-melf32btsmip" | |
aeffff67 RS |
30 | } elseif {[istarget mips*el-*-*freebsd*]} { |
31 | set ldemul "-melf32ltsmip_fbsd" | |
32 | } elseif {[istarget mips*-*-*freebsd*]} { | |
33 | set ldemul "-melf32btsmip_fbsd" | |
697380b3 AO |
34 | } else { |
35 | set ldemul "" | |
36 | } | |
37 | ||
3da65cd2 CX |
38 | # Check is ld supported 32bit emulations. |
39 | proc check_ld_support_32bit { } { | |
40 | global ld | |
41 | global echo | |
42 | ||
43 | set ld_output [remote_exec host $ld "-V"] | |
44 | if [string match "*elf32*" $ld_output] then { | |
45 | return 1 | |
46 | } else { | |
47 | return 0 | |
48 | } | |
49 | } | |
50 | ||
51 | # Check args is 32bit abis. | |
52 | proc check_is_32bit_args {arg} { | |
53 | ||
54 | if { [string match "*-32*" $arg] | |
55 | || [string match "*-mabi=32*" $arg] | |
56 | || [string match "*-mabi=o64*" $arg] | |
57 | || [string match "*-mgp32*" $arg] } { | |
58 | return 1 | |
59 | } else { | |
60 | return 0 | |
61 | } | |
62 | } | |
63 | ||
64543e1a RS |
64 | # Assemble jr.s using each of the argument lists in ARGLIST. Return the |
65 | # list of object files on success and an empty list on failure. | |
66 | proc assemble_for_flags {arglist} { | |
67 | global as srcdir subdir | |
68 | ||
69 | set objs {} | |
70 | set index 1 | |
71 | ||
72 | foreach args $arglist { | |
73 | set obj "tmpdir/mips-flags-${index}.o" | |
74 | if {![ld_assemble $as "$args $srcdir/$subdir/jr.s" $obj]} { | |
75 | return "" | |
76 | } | |
77 | lappend objs $obj | |
78 | incr index | |
79 | } | |
80 | return $objs | |
81 | } | |
82 | ||
83 | # Assemble a file using each set of arguments in ARGLIST. Check that | |
b1a2d7a0 | 84 | # the objects can be linked together and that the `readelf -h' output |
7575e6a7 MR |
85 | # includes each flag named in FLAGS. Additional one or more arguments |
86 | # request the addition of the `-A' option to `readelf' invocation. In | |
87 | # this case check MIPS ABI Flags reported for the ISA to match the | |
88 | # first of these arguments, the ISA Extension to match the second, and | |
89 | # the ASEs listed are exactly the same as those listed in the third, | |
90 | # passed as a TCL list. | |
91 | proc good_combination {arglist flags args} { | |
697380b3 | 92 | global ld ldemul READELF |
64543e1a RS |
93 | |
94 | set finalobj "tmpdir/mips-flags.o" | |
95 | set testname "MIPS compatible objects: $arglist" | |
96 | set objs [assemble_for_flags $arglist] | |
97 | ||
3da65cd2 CX |
98 | foreach argsl $arglist { |
99 | if { [check_is_32bit_args $argsl] && ![check_ld_support_32bit] } { | |
100 | unsupported $testname | |
101 | return 0 | |
102 | } | |
103 | } | |
104 | ||
64543e1a RS |
105 | if {$objs == ""} { |
106 | unresolved $testname | |
d9816402 | 107 | } elseif {![ld_link "$ld $ldemul" $finalobj "-r $objs"]} { |
64543e1a RS |
108 | fail $testname |
109 | } else { | |
7575e6a7 MR |
110 | set A [expr {[llength $args] > 0} ? {"A"} : {""}] |
111 | set cmd "$READELF -h$A $finalobj" | |
1284e99a MR |
112 | send_log "$cmd\n" |
113 | set cmdret [remote_exec host [concat sh -c [list "$cmd 2>&1"]]] | |
114 | set output [lindex $cmdret 1] | |
115 | set cmdret [lindex $cmdret 0] | |
116 | if {$cmdret != 0 \ | |
117 | || ![regexp "Flags: *(\[^\n\r\]*)" $output full gotflags]} { | |
64543e1a RS |
118 | unresolved $testname |
119 | } else { | |
120 | set failed 0 | |
121 | ||
122 | # GOTFLAGS is a list of flags separated by ", ". | |
123 | # Convert it to a tcl list. | |
124 | regsub -all ", " $gotflags "," gotflags | |
125 | set gotflags [split $gotflags ","] | |
126 | ||
127 | foreach flag $flags { | |
128 | if {[lsearch -exact $gotflags $flag] < 0} { | |
bc672693 CX |
129 | # The mips*-*-irix* not use o32 flags. |
130 | if {[istarget mips*-*-irix*] && $flag == "o32"} { | |
131 | set failed 0 | |
132 | } else { | |
133 | set failed 1 | |
134 | } | |
64543e1a RS |
135 | } |
136 | } | |
7575e6a7 MR |
137 | |
138 | set isa [string trim [lindex $args 0]] | |
139 | if {$isa != "" | |
140 | && (![regexp "ISA: *(\[^\n\r\]*)" $output full gotisa] | |
141 | || ![string match $isa $gotisa])} { | |
142 | set failed 1 | |
143 | } | |
144 | ||
145 | set ext [string trim [lindex $args 1]] | |
146 | if {$ext != "" | |
147 | && (![regexp "ISA Extension: *(\[^\n\r\]*)" \ | |
148 | $output full gotext] | |
149 | || ![string match $ext $gotext])} { | |
150 | set failed 1 | |
151 | } | |
152 | ||
153 | set ases [string trim [lindex $args 2]] | |
154 | if {[llength $ases] > 0} { | |
155 | if {![regexp "ASEs:\[\n\r\]+((?:\t\[^\n\r\]*\[\n\r\]+)*)" \ | |
156 | $output full gotases]} { | |
157 | set failed 1 | |
158 | } else { | |
159 | # GOTASES is a list of strings separated by tab and | |
160 | # line separator characters. Convert it to a TCL list. | |
161 | regsub -all "\[\n\r\t\]+" $gotases "\n" gotases | |
162 | set gotases [split [string trim $gotases] "\n"] | |
163 | ||
164 | foreach ase $ases { | |
165 | set aseidx [lsearch -exact $gotases $ase] | |
166 | if {$aseidx >= 0} { | |
167 | set gotases [lreplace $gotases $aseidx $aseidx] | |
168 | } else { | |
169 | set failed 1 | |
170 | } | |
171 | } | |
172 | if {[llength $gotases] > 0} { | |
173 | set failed 1 | |
174 | } | |
175 | } | |
176 | } | |
177 | ||
64543e1a RS |
178 | if {$failed} { |
179 | fail $testname | |
180 | } else { | |
181 | pass $testname | |
182 | } | |
183 | } | |
184 | } | |
185 | } | |
186 | ||
187 | # Like good_combination, but check that the objects can't be linked | |
188 | # together successfully and that the output includes MESSAGE. | |
189 | proc bad_combination {arglist message} { | |
697380b3 | 190 | global link_output ld ldemul |
64543e1a RS |
191 | |
192 | set finalobj "tmpdir/mips-flags.o" | |
193 | set testname "MIPS incompatible objects: $arglist" | |
194 | set objs [assemble_for_flags $arglist] | |
195 | ||
3da65cd2 CX |
196 | foreach argsl $arglist { |
197 | if { [check_is_32bit_args $argsl] && ![check_ld_support_32bit] } { | |
198 | unsupported $testname | |
199 | return 0 | |
200 | } | |
201 | } | |
202 | ||
64543e1a RS |
203 | if {$objs == ""} { |
204 | unresolved $testname | |
d9816402 | 205 | } elseif {[ld_link "$ld $ldemul" $finalobj "-r $objs"] |
64543e1a RS |
206 | || [string first $message $link_output] < 0} { |
207 | fail $testname | |
208 | } else { | |
209 | pass $testname | |
210 | } | |
211 | } | |
212 | ||
213 | # Routines to check for various kinds of incompatibility. | |
214 | ||
215 | proc abi_conflict {arglist firstabi secondabi} { | |
216 | bad_combination $arglist \ | |
217 | "linking $secondabi module with previous $firstabi modules" | |
218 | } | |
219 | ||
220 | proc isa_conflict {arglist firstisa secondisa} { | |
221 | bad_combination $arglist \ | |
222 | "linking mips:$secondisa module with previous mips:$firstisa modules" | |
223 | } | |
224 | ||
225 | proc regsize_conflict {arglist} { | |
226 | bad_combination $arglist \ | |
227 | "linking 32-bit code with 64-bit code" | |
228 | } | |
229 | ||
230 | abi_conflict { "-mabi=eabi -mgp32" "-mips4 -mabi=32" } EABI32 O32 | |
c97c330b | 231 | abi_conflict { "-mips4 -mabi=o64" "-mips3 -mabi=eabi" } O64 EABI64 |
64543e1a | 232 | |
c97c330b MF |
233 | isa_conflict { "-march=vr5500 -32" "-march=sb1 -32" } 5500 sb1 |
234 | isa_conflict { "-march=vr5400 -32" "-march=4120 -32" } 5400 4120 | |
235 | isa_conflict { "-march=r3900 -32" "-march=r6000 -32" } 3900 6000 | |
236 | isa_conflict { "-march=r4010 -32" "-march=r4650 -32" } 4010 4650 | |
237 | isa_conflict { "-mips3 -mgp32 -32" "-mips32 -32" } 4000 isa32 | |
697380b3 | 238 | isa_conflict { "-march=sb1 -mgp32 -32" "-mips32r2 -32" } sb1 isa32r2 |
c97c330b MF |
239 | isa_conflict { "-march=sb1 -32" "-mips64r2 -32" } sb1 isa64r2 |
240 | ||
241 | isa_conflict { "-march=vr4100 -32" "-march=r10000 -32" } 4100 8000 | |
242 | isa_conflict { "-march=r5900 -32" "-march=vr4111 -32" } 5900 4111 | |
243 | isa_conflict { "-march=loongson2e -32" "-march=loongson2f -32" } loongson_2e loongson_2f | |
ac8cb70f | 244 | isa_conflict { "-march=gs464 -32" "-march=loongson2f -32" } gs464 loongson_2f |
c97c330b | 245 | |
819e1f86 MR |
246 | isa_conflict { "-march=interaptiv-mr2 -32" \ |
247 | "-march=r4010 -32" } interaptiv-mr2 4010 | |
248 | isa_conflict { "-march=interaptiv-mr2 -mnan=2008 -mfp64 -32" \ | |
249 | "-mips32r6 -32" } interaptiv-mr2 isa32r6 | |
250 | isa_conflict { "-march=interaptiv-mr2 -32" \ | |
251 | "-mips3 -32" } interaptiv-mr2 4000 | |
252 | isa_conflict { "-march=interaptiv-mr2 -32" \ | |
253 | "-mips64r2 -32" } interaptiv-mr2 isa64r2 | |
254 | isa_conflict { "-march=interaptiv-mr2 -32" \ | |
255 | "-march=octeon -32" } interaptiv-mr2 octeon | |
256 | ||
c97c330b MF |
257 | regsize_conflict { "-mips4 -mgp64 -mabi=o64" "-mips2 -32" } |
258 | regsize_conflict { "-mips4 -mabi=o64" "-mips4 -mabi=32" } | |
259 | regsize_conflict { "-mips4 -mabi=eabi -mgp32" "-mips4 -mabi=eabi -mgp64" } | |
260 | regsize_conflict { "-march=vr5000 -mgp64 -mabi=o64" "-march=vr5000 -mgp32 -32" } | |
261 | regsize_conflict { "-mips32 -32" "-mips64 -mabi=o64" } | |
262 | regsize_conflict { "-mips32r2 -32" "-mips64 -mabi=o64" } | |
263 | regsize_conflict { "-mips32r2 -32" "-mips64r2 -mabi=o64" } | |
264 | ||
265 | good_combination { "-mips4 -mgp32 -32" "-mips2 -32" } { mips4 o32 } | |
266 | good_combination { "-mips4 -mabi=32" "-mips2 -32" } { mips4 o32 } | |
267 | good_combination { "-mips2 -32" "-mips4 -mabi=32" } { mips4 o32 } | |
268 | good_combination { "-mips2 -mabi=eabi" "-mips4 -mabi=eabi -mgp32" } { mips4 eabi32 } | |
269 | good_combination { "-mips2 -32" "-mips32 -32" "-mips32r2 -32" } { mips32r2 } | |
270 | good_combination { "-mips1 -32" "-mips32r2 -32" "-mips32 -32" } { mips32r2 } | |
271 | ||
272 | good_combination { "-march=vr4100 -32" "-march=vr4120 -32" } { 4120 } | |
273 | good_combination { "-march=vr5400 -32" "-march=vr5500 -32" "-mips4 -32" } { 5500 } | |
274 | good_combination { "-mips3 -32" "-mips4 -32" "-march=sb1 -32" "-mips5 -32" } { sb1 } | |
275 | good_combination { "-mips1 -32" "-march=3900 -32" } { 3900 } | |
276 | good_combination { "-mips3 -32" "-mips64r2 -32" " -mips64 -32" } { mips64r2 } | |
277 | ||
278 | good_combination { "-march=vr4120 -mabi=32" "-mips3 -mabi=32" } { 4120 o32 } | |
279 | good_combination { "-march=sb1 -mgp32 -32" "-march=4000 -mgp32 -32" } { sb1 o32 } | |
280 | good_combination { "-mips32 -mabi=32" "-march=sb1 -mabi=32" } { sb1 o32 } | |
281 | good_combination { "-mips64r2 -mabi=32" "-mips32 -mabi=32" } { mips64r2 o32 } | |
282 | good_combination { "-mips5 -mabi=o64" "-mips64r2 -mabi=o64" } { mips64r2 o64 } | |
819e1f86 MR |
283 | |
284 | good_combination { "-march=interaptiv-mr2 -32" "-mips1 -32" } \ | |
285 | { mips32r2 interaptiv-mr2 } \ | |
286 | MIPS32r3 "Imagination interAptiv MR2" \ | |
287 | { "DSP ASE" "Enhanced VA Scheme" "MT ASE" } | |
288 | good_combination { "-march=interaptiv-mr2 -32" "-mips32r2 -32" } \ | |
289 | { mips32r2 interaptiv-mr2 } \ | |
290 | MIPS32r3 "Imagination interAptiv MR2" \ | |
291 | { "DSP ASE" "Enhanced VA Scheme" "MT ASE" } | |
292 | good_combination { "-march=interaptiv-mr2 -32" "-march=interaptiv -32" } \ | |
293 | { mips32r2 interaptiv-mr2 } \ | |
294 | MIPS32r3 "Imagination interAptiv MR2" \ | |
295 | { "DSP ASE" "Enhanced VA Scheme" "MT ASE" } | |
296 | good_combination { "-march=interaptiv-mr2 -32" "-mips32r3 -32" } \ | |
297 | { mips32r2 interaptiv-mr2 } \ | |
298 | MIPS32r3 "Imagination interAptiv MR2" \ | |
299 | { "DSP ASE" "Enhanced VA Scheme" "MT ASE" } | |
300 | good_combination { "-march=interaptiv-mr2 -32" "-mips32r3 -mips16 -32" } \ | |
301 | { mips32r2 interaptiv-mr2 } \ | |
302 | MIPS32r3 "Imagination interAptiv MR2" \ | |
303 | { "DSP ASE" "Enhanced VA Scheme" "MT ASE" "MIPS16 ASE" } | |
304 | good_combination { "-march=interaptiv-mr2 -mips16 -32" "-mips32r3 -32" } \ | |
305 | { mips32r2 interaptiv-mr2 } \ | |
306 | MIPS32r3 "Imagination interAptiv MR2" \ | |
307 | { "DSP ASE" "Enhanced VA Scheme" "MT ASE" \ | |
308 | "MIPS16 ASE" "MIPS16e2 ASE" } | |
309 | good_combination { "-march=interaptiv-mr2 -32" "-mips32r5 -32" } \ | |
310 | { mips32r2 interaptiv-mr2 } \ | |
311 | MIPS32r5 "Imagination interAptiv MR2" \ | |
312 | { "DSP ASE" "Enhanced VA Scheme" "MT ASE" } | |
313 | good_combination { "-march=interaptiv-mr2 -32" "-march=m5100 -32" } \ | |
314 | { mips32r2 interaptiv-mr2 } \ | |
315 | MIPS32r5 "Imagination interAptiv MR2" \ | |
6f38008b MF |
316 | { "DSP ASE" "Enhanced VA Scheme" \ |
317 | "MCU (MicroController) ASE" "MT ASE" } | |
bd782c07 CX |
318 | |
319 | good_combination { "-march=gs464 -32" "-march=gs464e -32" } \ | |
320 | { gs464e o32 } \ | |
321 | MIPS64r2 "None" \ | |
322 | { "Loongson MMI ASE" "Loongson CAM ASE" "Loongson EXT ASE" "Loongson EXT2 ASE" } | |
9108bc33 CX |
323 | good_combination { "-march=gs264e -32" "-march=gs464e -32" } \ |
324 | { gs264e o32 } \ | |
325 | MIPS64r2 "None" \ | |
326 | { "Loongson MMI ASE" "Loongson CAM ASE" "Loongson EXT ASE" "Loongson EXT2 ASE" } |