KVM: MMU: Add for_each_shadow_entry(), a simpler alternative to walk_shadow()
[deliverable/linux.git] / arch / x86 / kvm / mmu.c
CommitLineData
6aa8b732
AK
1/*
2 * Kernel-based Virtual Machine driver for Linux
3 *
4 * This module enables machines with Intel VT-x extensions to run virtual
5 * machines without emulation or binary translation.
6 *
7 * MMU support
8 *
9 * Copyright (C) 2006 Qumranet, Inc.
10 *
11 * Authors:
12 * Yaniv Kamay <yaniv@qumranet.com>
13 * Avi Kivity <avi@qumranet.com>
14 *
15 * This work is licensed under the terms of the GNU GPL, version 2. See
16 * the COPYING file in the top-level directory.
17 *
18 */
e495606d 19
1d737c8a 20#include "mmu.h"
e495606d 21
edf88417 22#include <linux/kvm_host.h>
6aa8b732
AK
23#include <linux/types.h>
24#include <linux/string.h>
6aa8b732
AK
25#include <linux/mm.h>
26#include <linux/highmem.h>
27#include <linux/module.h>
448353ca 28#include <linux/swap.h>
05da4558 29#include <linux/hugetlb.h>
2f333bcb 30#include <linux/compiler.h>
6aa8b732 31
e495606d
AK
32#include <asm/page.h>
33#include <asm/cmpxchg.h>
4e542370 34#include <asm/io.h>
13673a90 35#include <asm/vmx.h>
6aa8b732 36
18552672
JR
37/*
38 * When setting this variable to true it enables Two-Dimensional-Paging
39 * where the hardware walks 2 page tables:
40 * 1. the guest-virtual to guest-physical
41 * 2. while doing 1. it walks guest-physical to host-physical
42 * If the hardware supports that we don't need to do shadow paging.
43 */
2f333bcb 44bool tdp_enabled = false;
18552672 45
37a7d8b0
AK
46#undef MMU_DEBUG
47
48#undef AUDIT
49
50#ifdef AUDIT
51static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg);
52#else
53static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg) {}
54#endif
55
56#ifdef MMU_DEBUG
57
58#define pgprintk(x...) do { if (dbg) printk(x); } while (0)
59#define rmap_printk(x...) do { if (dbg) printk(x); } while (0)
60
61#else
62
63#define pgprintk(x...) do { } while (0)
64#define rmap_printk(x...) do { } while (0)
65
66#endif
67
68#if defined(MMU_DEBUG) || defined(AUDIT)
6ada8cca
AK
69static int dbg = 0;
70module_param(dbg, bool, 0644);
37a7d8b0 71#endif
6aa8b732 72
582801a9
MT
73static int oos_shadow = 1;
74module_param(oos_shadow, bool, 0644);
75
d6c69ee9
YD
76#ifndef MMU_DEBUG
77#define ASSERT(x) do { } while (0)
78#else
6aa8b732
AK
79#define ASSERT(x) \
80 if (!(x)) { \
81 printk(KERN_WARNING "assertion failed %s:%d: %s\n", \
82 __FILE__, __LINE__, #x); \
83 }
d6c69ee9 84#endif
6aa8b732 85
6aa8b732
AK
86#define PT_FIRST_AVAIL_BITS_SHIFT 9
87#define PT64_SECOND_AVAIL_BITS_SHIFT 52
88
6aa8b732
AK
89#define VALID_PAGE(x) ((x) != INVALID_PAGE)
90
91#define PT64_LEVEL_BITS 9
92
93#define PT64_LEVEL_SHIFT(level) \
d77c26fc 94 (PAGE_SHIFT + (level - 1) * PT64_LEVEL_BITS)
6aa8b732
AK
95
96#define PT64_LEVEL_MASK(level) \
97 (((1ULL << PT64_LEVEL_BITS) - 1) << PT64_LEVEL_SHIFT(level))
98
99#define PT64_INDEX(address, level)\
100 (((address) >> PT64_LEVEL_SHIFT(level)) & ((1 << PT64_LEVEL_BITS) - 1))
101
102
103#define PT32_LEVEL_BITS 10
104
105#define PT32_LEVEL_SHIFT(level) \
d77c26fc 106 (PAGE_SHIFT + (level - 1) * PT32_LEVEL_BITS)
6aa8b732
AK
107
108#define PT32_LEVEL_MASK(level) \
109 (((1ULL << PT32_LEVEL_BITS) - 1) << PT32_LEVEL_SHIFT(level))
110
111#define PT32_INDEX(address, level)\
112 (((address) >> PT32_LEVEL_SHIFT(level)) & ((1 << PT32_LEVEL_BITS) - 1))
113
114
27aba766 115#define PT64_BASE_ADDR_MASK (((1ULL << 52) - 1) & ~(u64)(PAGE_SIZE-1))
6aa8b732
AK
116#define PT64_DIR_BASE_ADDR_MASK \
117 (PT64_BASE_ADDR_MASK & ~((1ULL << (PAGE_SHIFT + PT64_LEVEL_BITS)) - 1))
118
119#define PT32_BASE_ADDR_MASK PAGE_MASK
120#define PT32_DIR_BASE_ADDR_MASK \
121 (PAGE_MASK & ~((1ULL << (PAGE_SHIFT + PT32_LEVEL_BITS)) - 1))
122
79539cec
AK
123#define PT64_PERM_MASK (PT_PRESENT_MASK | PT_WRITABLE_MASK | PT_USER_MASK \
124 | PT64_NX_MASK)
6aa8b732
AK
125
126#define PFERR_PRESENT_MASK (1U << 0)
127#define PFERR_WRITE_MASK (1U << 1)
128#define PFERR_USER_MASK (1U << 2)
73b1087e 129#define PFERR_FETCH_MASK (1U << 4)
6aa8b732 130
6aa8b732
AK
131#define PT_DIRECTORY_LEVEL 2
132#define PT_PAGE_TABLE_LEVEL 1
133
cd4a4e53
AK
134#define RMAP_EXT 4
135
fe135d2c
AK
136#define ACC_EXEC_MASK 1
137#define ACC_WRITE_MASK PT_WRITABLE_MASK
138#define ACC_USER_MASK PT_USER_MASK
139#define ACC_ALL (ACC_EXEC_MASK | ACC_WRITE_MASK | ACC_USER_MASK)
140
135f8c2b
AK
141#define SHADOW_PT_INDEX(addr, level) PT64_INDEX(addr, level)
142
cd4a4e53
AK
143struct kvm_rmap_desc {
144 u64 *shadow_ptes[RMAP_EXT];
145 struct kvm_rmap_desc *more;
146};
147
3d000db5
AK
148struct kvm_shadow_walk {
149 int (*entry)(struct kvm_shadow_walk *walk, struct kvm_vcpu *vcpu,
d40a1ee4 150 u64 addr, u64 *spte, int level);
3d000db5
AK
151};
152
2d11123a
AK
153struct kvm_shadow_walk_iterator {
154 u64 addr;
155 hpa_t shadow_addr;
156 int level;
157 u64 *sptep;
158 unsigned index;
159};
160
161#define for_each_shadow_entry(_vcpu, _addr, _walker) \
162 for (shadow_walk_init(&(_walker), _vcpu, _addr); \
163 shadow_walk_okay(&(_walker)); \
164 shadow_walk_next(&(_walker)))
165
166
4731d4c7
MT
167struct kvm_unsync_walk {
168 int (*entry) (struct kvm_mmu_page *sp, struct kvm_unsync_walk *walk);
169};
170
ad8cfbe3
MT
171typedef int (*mmu_parent_walk_fn) (struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp);
172
b5a33a75
AK
173static struct kmem_cache *pte_chain_cache;
174static struct kmem_cache *rmap_desc_cache;
d3d25b04 175static struct kmem_cache *mmu_page_header_cache;
b5a33a75 176
c7addb90
AK
177static u64 __read_mostly shadow_trap_nonpresent_pte;
178static u64 __read_mostly shadow_notrap_nonpresent_pte;
7b52345e
SY
179static u64 __read_mostly shadow_base_present_pte;
180static u64 __read_mostly shadow_nx_mask;
181static u64 __read_mostly shadow_x_mask; /* mutual exclusive with nx_mask */
182static u64 __read_mostly shadow_user_mask;
183static u64 __read_mostly shadow_accessed_mask;
184static u64 __read_mostly shadow_dirty_mask;
64d4d521 185static u64 __read_mostly shadow_mt_mask;
c7addb90
AK
186
187void kvm_mmu_set_nonpresent_ptes(u64 trap_pte, u64 notrap_pte)
188{
189 shadow_trap_nonpresent_pte = trap_pte;
190 shadow_notrap_nonpresent_pte = notrap_pte;
191}
192EXPORT_SYMBOL_GPL(kvm_mmu_set_nonpresent_ptes);
193
7b52345e
SY
194void kvm_mmu_set_base_ptes(u64 base_pte)
195{
196 shadow_base_present_pte = base_pte;
197}
198EXPORT_SYMBOL_GPL(kvm_mmu_set_base_ptes);
199
200void kvm_mmu_set_mask_ptes(u64 user_mask, u64 accessed_mask,
64d4d521 201 u64 dirty_mask, u64 nx_mask, u64 x_mask, u64 mt_mask)
7b52345e
SY
202{
203 shadow_user_mask = user_mask;
204 shadow_accessed_mask = accessed_mask;
205 shadow_dirty_mask = dirty_mask;
206 shadow_nx_mask = nx_mask;
207 shadow_x_mask = x_mask;
64d4d521 208 shadow_mt_mask = mt_mask;
7b52345e
SY
209}
210EXPORT_SYMBOL_GPL(kvm_mmu_set_mask_ptes);
211
6aa8b732
AK
212static int is_write_protection(struct kvm_vcpu *vcpu)
213{
ad312c7c 214 return vcpu->arch.cr0 & X86_CR0_WP;
6aa8b732
AK
215}
216
217static int is_cpuid_PSE36(void)
218{
219 return 1;
220}
221
73b1087e
AK
222static int is_nx(struct kvm_vcpu *vcpu)
223{
ad312c7c 224 return vcpu->arch.shadow_efer & EFER_NX;
73b1087e
AK
225}
226
6aa8b732
AK
227static int is_present_pte(unsigned long pte)
228{
229 return pte & PT_PRESENT_MASK;
230}
231
c7addb90
AK
232static int is_shadow_present_pte(u64 pte)
233{
c7addb90
AK
234 return pte != shadow_trap_nonpresent_pte
235 && pte != shadow_notrap_nonpresent_pte;
236}
237
05da4558
MT
238static int is_large_pte(u64 pte)
239{
240 return pte & PT_PAGE_SIZE_MASK;
241}
242
6aa8b732
AK
243static int is_writeble_pte(unsigned long pte)
244{
245 return pte & PT_WRITABLE_MASK;
246}
247
e3c5e7ec
AK
248static int is_dirty_pte(unsigned long pte)
249{
7b52345e 250 return pte & shadow_dirty_mask;
e3c5e7ec
AK
251}
252
cd4a4e53
AK
253static int is_rmap_pte(u64 pte)
254{
4b1a80fa 255 return is_shadow_present_pte(pte);
cd4a4e53
AK
256}
257
35149e21 258static pfn_t spte_to_pfn(u64 pte)
0b49ea86 259{
35149e21 260 return (pte & PT64_BASE_ADDR_MASK) >> PAGE_SHIFT;
0b49ea86
AK
261}
262
da928521
AK
263static gfn_t pse36_gfn_delta(u32 gpte)
264{
265 int shift = 32 - PT32_DIR_PSE36_SHIFT - PAGE_SHIFT;
266
267 return (gpte & PT32_DIR_PSE36_MASK) << shift;
268}
269
e663ee64
AK
270static void set_shadow_pte(u64 *sptep, u64 spte)
271{
272#ifdef CONFIG_X86_64
273 set_64bit((unsigned long *)sptep, spte);
274#else
275 set_64bit((unsigned long long *)sptep, spte);
276#endif
277}
278
e2dec939 279static int mmu_topup_memory_cache(struct kvm_mmu_memory_cache *cache,
2e3e5882 280 struct kmem_cache *base_cache, int min)
714b93da
AK
281{
282 void *obj;
283
284 if (cache->nobjs >= min)
e2dec939 285 return 0;
714b93da 286 while (cache->nobjs < ARRAY_SIZE(cache->objects)) {
2e3e5882 287 obj = kmem_cache_zalloc(base_cache, GFP_KERNEL);
714b93da 288 if (!obj)
e2dec939 289 return -ENOMEM;
714b93da
AK
290 cache->objects[cache->nobjs++] = obj;
291 }
e2dec939 292 return 0;
714b93da
AK
293}
294
295static void mmu_free_memory_cache(struct kvm_mmu_memory_cache *mc)
296{
297 while (mc->nobjs)
298 kfree(mc->objects[--mc->nobjs]);
299}
300
c1158e63 301static int mmu_topup_memory_cache_page(struct kvm_mmu_memory_cache *cache,
2e3e5882 302 int min)
c1158e63
AK
303{
304 struct page *page;
305
306 if (cache->nobjs >= min)
307 return 0;
308 while (cache->nobjs < ARRAY_SIZE(cache->objects)) {
2e3e5882 309 page = alloc_page(GFP_KERNEL);
c1158e63
AK
310 if (!page)
311 return -ENOMEM;
312 set_page_private(page, 0);
313 cache->objects[cache->nobjs++] = page_address(page);
314 }
315 return 0;
316}
317
318static void mmu_free_memory_cache_page(struct kvm_mmu_memory_cache *mc)
319{
320 while (mc->nobjs)
c4d198d5 321 free_page((unsigned long)mc->objects[--mc->nobjs]);
c1158e63
AK
322}
323
2e3e5882 324static int mmu_topup_memory_caches(struct kvm_vcpu *vcpu)
714b93da 325{
e2dec939
AK
326 int r;
327
ad312c7c 328 r = mmu_topup_memory_cache(&vcpu->arch.mmu_pte_chain_cache,
2e3e5882 329 pte_chain_cache, 4);
e2dec939
AK
330 if (r)
331 goto out;
ad312c7c 332 r = mmu_topup_memory_cache(&vcpu->arch.mmu_rmap_desc_cache,
c41ef344 333 rmap_desc_cache, 4);
d3d25b04
AK
334 if (r)
335 goto out;
ad312c7c 336 r = mmu_topup_memory_cache_page(&vcpu->arch.mmu_page_cache, 8);
d3d25b04
AK
337 if (r)
338 goto out;
ad312c7c 339 r = mmu_topup_memory_cache(&vcpu->arch.mmu_page_header_cache,
2e3e5882 340 mmu_page_header_cache, 4);
e2dec939
AK
341out:
342 return r;
714b93da
AK
343}
344
345static void mmu_free_memory_caches(struct kvm_vcpu *vcpu)
346{
ad312c7c
ZX
347 mmu_free_memory_cache(&vcpu->arch.mmu_pte_chain_cache);
348 mmu_free_memory_cache(&vcpu->arch.mmu_rmap_desc_cache);
349 mmu_free_memory_cache_page(&vcpu->arch.mmu_page_cache);
350 mmu_free_memory_cache(&vcpu->arch.mmu_page_header_cache);
714b93da
AK
351}
352
353static void *mmu_memory_cache_alloc(struct kvm_mmu_memory_cache *mc,
354 size_t size)
355{
356 void *p;
357
358 BUG_ON(!mc->nobjs);
359 p = mc->objects[--mc->nobjs];
360 memset(p, 0, size);
361 return p;
362}
363
714b93da
AK
364static struct kvm_pte_chain *mmu_alloc_pte_chain(struct kvm_vcpu *vcpu)
365{
ad312c7c 366 return mmu_memory_cache_alloc(&vcpu->arch.mmu_pte_chain_cache,
714b93da
AK
367 sizeof(struct kvm_pte_chain));
368}
369
90cb0529 370static void mmu_free_pte_chain(struct kvm_pte_chain *pc)
714b93da 371{
90cb0529 372 kfree(pc);
714b93da
AK
373}
374
375static struct kvm_rmap_desc *mmu_alloc_rmap_desc(struct kvm_vcpu *vcpu)
376{
ad312c7c 377 return mmu_memory_cache_alloc(&vcpu->arch.mmu_rmap_desc_cache,
714b93da
AK
378 sizeof(struct kvm_rmap_desc));
379}
380
90cb0529 381static void mmu_free_rmap_desc(struct kvm_rmap_desc *rd)
714b93da 382{
90cb0529 383 kfree(rd);
714b93da
AK
384}
385
05da4558
MT
386/*
387 * Return the pointer to the largepage write count for a given
388 * gfn, handling slots that are not large page aligned.
389 */
390static int *slot_largepage_idx(gfn_t gfn, struct kvm_memory_slot *slot)
391{
392 unsigned long idx;
393
394 idx = (gfn / KVM_PAGES_PER_HPAGE) -
395 (slot->base_gfn / KVM_PAGES_PER_HPAGE);
396 return &slot->lpage_info[idx].write_count;
397}
398
399static void account_shadowed(struct kvm *kvm, gfn_t gfn)
400{
401 int *write_count;
402
2843099f
IE
403 gfn = unalias_gfn(kvm, gfn);
404 write_count = slot_largepage_idx(gfn,
405 gfn_to_memslot_unaliased(kvm, gfn));
05da4558 406 *write_count += 1;
05da4558
MT
407}
408
409static void unaccount_shadowed(struct kvm *kvm, gfn_t gfn)
410{
411 int *write_count;
412
2843099f
IE
413 gfn = unalias_gfn(kvm, gfn);
414 write_count = slot_largepage_idx(gfn,
415 gfn_to_memslot_unaliased(kvm, gfn));
05da4558
MT
416 *write_count -= 1;
417 WARN_ON(*write_count < 0);
418}
419
420static int has_wrprotected_page(struct kvm *kvm, gfn_t gfn)
421{
2843099f 422 struct kvm_memory_slot *slot;
05da4558
MT
423 int *largepage_idx;
424
2843099f
IE
425 gfn = unalias_gfn(kvm, gfn);
426 slot = gfn_to_memslot_unaliased(kvm, gfn);
05da4558
MT
427 if (slot) {
428 largepage_idx = slot_largepage_idx(gfn, slot);
429 return *largepage_idx;
430 }
431
432 return 1;
433}
434
435static int host_largepage_backed(struct kvm *kvm, gfn_t gfn)
436{
437 struct vm_area_struct *vma;
438 unsigned long addr;
4c2155ce 439 int ret = 0;
05da4558
MT
440
441 addr = gfn_to_hva(kvm, gfn);
442 if (kvm_is_error_hva(addr))
4c2155ce 443 return ret;
05da4558 444
4c2155ce 445 down_read(&current->mm->mmap_sem);
05da4558
MT
446 vma = find_vma(current->mm, addr);
447 if (vma && is_vm_hugetlb_page(vma))
4c2155ce
MT
448 ret = 1;
449 up_read(&current->mm->mmap_sem);
05da4558 450
4c2155ce 451 return ret;
05da4558
MT
452}
453
454static int is_largepage_backed(struct kvm_vcpu *vcpu, gfn_t large_gfn)
455{
456 struct kvm_memory_slot *slot;
457
458 if (has_wrprotected_page(vcpu->kvm, large_gfn))
459 return 0;
460
461 if (!host_largepage_backed(vcpu->kvm, large_gfn))
462 return 0;
463
464 slot = gfn_to_memslot(vcpu->kvm, large_gfn);
465 if (slot && slot->dirty_bitmap)
466 return 0;
467
468 return 1;
469}
470
290fc38d
IE
471/*
472 * Take gfn and return the reverse mapping to it.
473 * Note: gfn must be unaliased before this function get called
474 */
475
05da4558 476static unsigned long *gfn_to_rmap(struct kvm *kvm, gfn_t gfn, int lpage)
290fc38d
IE
477{
478 struct kvm_memory_slot *slot;
05da4558 479 unsigned long idx;
290fc38d
IE
480
481 slot = gfn_to_memslot(kvm, gfn);
05da4558
MT
482 if (!lpage)
483 return &slot->rmap[gfn - slot->base_gfn];
484
485 idx = (gfn / KVM_PAGES_PER_HPAGE) -
486 (slot->base_gfn / KVM_PAGES_PER_HPAGE);
487
488 return &slot->lpage_info[idx].rmap_pde;
290fc38d
IE
489}
490
cd4a4e53
AK
491/*
492 * Reverse mapping data structures:
493 *
290fc38d
IE
494 * If rmapp bit zero is zero, then rmapp point to the shadw page table entry
495 * that points to page_address(page).
cd4a4e53 496 *
290fc38d
IE
497 * If rmapp bit zero is one, (then rmap & ~1) points to a struct kvm_rmap_desc
498 * containing more mappings.
cd4a4e53 499 */
05da4558 500static void rmap_add(struct kvm_vcpu *vcpu, u64 *spte, gfn_t gfn, int lpage)
cd4a4e53 501{
4db35314 502 struct kvm_mmu_page *sp;
cd4a4e53 503 struct kvm_rmap_desc *desc;
290fc38d 504 unsigned long *rmapp;
cd4a4e53
AK
505 int i;
506
507 if (!is_rmap_pte(*spte))
508 return;
290fc38d 509 gfn = unalias_gfn(vcpu->kvm, gfn);
4db35314
AK
510 sp = page_header(__pa(spte));
511 sp->gfns[spte - sp->spt] = gfn;
05da4558 512 rmapp = gfn_to_rmap(vcpu->kvm, gfn, lpage);
290fc38d 513 if (!*rmapp) {
cd4a4e53 514 rmap_printk("rmap_add: %p %llx 0->1\n", spte, *spte);
290fc38d
IE
515 *rmapp = (unsigned long)spte;
516 } else if (!(*rmapp & 1)) {
cd4a4e53 517 rmap_printk("rmap_add: %p %llx 1->many\n", spte, *spte);
714b93da 518 desc = mmu_alloc_rmap_desc(vcpu);
290fc38d 519 desc->shadow_ptes[0] = (u64 *)*rmapp;
cd4a4e53 520 desc->shadow_ptes[1] = spte;
290fc38d 521 *rmapp = (unsigned long)desc | 1;
cd4a4e53
AK
522 } else {
523 rmap_printk("rmap_add: %p %llx many->many\n", spte, *spte);
290fc38d 524 desc = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
cd4a4e53
AK
525 while (desc->shadow_ptes[RMAP_EXT-1] && desc->more)
526 desc = desc->more;
527 if (desc->shadow_ptes[RMAP_EXT-1]) {
714b93da 528 desc->more = mmu_alloc_rmap_desc(vcpu);
cd4a4e53
AK
529 desc = desc->more;
530 }
531 for (i = 0; desc->shadow_ptes[i]; ++i)
532 ;
533 desc->shadow_ptes[i] = spte;
534 }
535}
536
290fc38d 537static void rmap_desc_remove_entry(unsigned long *rmapp,
cd4a4e53
AK
538 struct kvm_rmap_desc *desc,
539 int i,
540 struct kvm_rmap_desc *prev_desc)
541{
542 int j;
543
544 for (j = RMAP_EXT - 1; !desc->shadow_ptes[j] && j > i; --j)
545 ;
546 desc->shadow_ptes[i] = desc->shadow_ptes[j];
11718b4d 547 desc->shadow_ptes[j] = NULL;
cd4a4e53
AK
548 if (j != 0)
549 return;
550 if (!prev_desc && !desc->more)
290fc38d 551 *rmapp = (unsigned long)desc->shadow_ptes[0];
cd4a4e53
AK
552 else
553 if (prev_desc)
554 prev_desc->more = desc->more;
555 else
290fc38d 556 *rmapp = (unsigned long)desc->more | 1;
90cb0529 557 mmu_free_rmap_desc(desc);
cd4a4e53
AK
558}
559
290fc38d 560static void rmap_remove(struct kvm *kvm, u64 *spte)
cd4a4e53 561{
cd4a4e53
AK
562 struct kvm_rmap_desc *desc;
563 struct kvm_rmap_desc *prev_desc;
4db35314 564 struct kvm_mmu_page *sp;
35149e21 565 pfn_t pfn;
290fc38d 566 unsigned long *rmapp;
cd4a4e53
AK
567 int i;
568
569 if (!is_rmap_pte(*spte))
570 return;
4db35314 571 sp = page_header(__pa(spte));
35149e21 572 pfn = spte_to_pfn(*spte);
7b52345e 573 if (*spte & shadow_accessed_mask)
35149e21 574 kvm_set_pfn_accessed(pfn);
b4231d61 575 if (is_writeble_pte(*spte))
35149e21 576 kvm_release_pfn_dirty(pfn);
b4231d61 577 else
35149e21 578 kvm_release_pfn_clean(pfn);
05da4558 579 rmapp = gfn_to_rmap(kvm, sp->gfns[spte - sp->spt], is_large_pte(*spte));
290fc38d 580 if (!*rmapp) {
cd4a4e53
AK
581 printk(KERN_ERR "rmap_remove: %p %llx 0->BUG\n", spte, *spte);
582 BUG();
290fc38d 583 } else if (!(*rmapp & 1)) {
cd4a4e53 584 rmap_printk("rmap_remove: %p %llx 1->0\n", spte, *spte);
290fc38d 585 if ((u64 *)*rmapp != spte) {
cd4a4e53
AK
586 printk(KERN_ERR "rmap_remove: %p %llx 1->BUG\n",
587 spte, *spte);
588 BUG();
589 }
290fc38d 590 *rmapp = 0;
cd4a4e53
AK
591 } else {
592 rmap_printk("rmap_remove: %p %llx many->many\n", spte, *spte);
290fc38d 593 desc = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
cd4a4e53
AK
594 prev_desc = NULL;
595 while (desc) {
596 for (i = 0; i < RMAP_EXT && desc->shadow_ptes[i]; ++i)
597 if (desc->shadow_ptes[i] == spte) {
290fc38d 598 rmap_desc_remove_entry(rmapp,
714b93da 599 desc, i,
cd4a4e53
AK
600 prev_desc);
601 return;
602 }
603 prev_desc = desc;
604 desc = desc->more;
605 }
606 BUG();
607 }
608}
609
98348e95 610static u64 *rmap_next(struct kvm *kvm, unsigned long *rmapp, u64 *spte)
374cbac0 611{
374cbac0 612 struct kvm_rmap_desc *desc;
98348e95
IE
613 struct kvm_rmap_desc *prev_desc;
614 u64 *prev_spte;
615 int i;
616
617 if (!*rmapp)
618 return NULL;
619 else if (!(*rmapp & 1)) {
620 if (!spte)
621 return (u64 *)*rmapp;
622 return NULL;
623 }
624 desc = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
625 prev_desc = NULL;
626 prev_spte = NULL;
627 while (desc) {
628 for (i = 0; i < RMAP_EXT && desc->shadow_ptes[i]; ++i) {
629 if (prev_spte == spte)
630 return desc->shadow_ptes[i];
631 prev_spte = desc->shadow_ptes[i];
632 }
633 desc = desc->more;
634 }
635 return NULL;
636}
637
b1a36821 638static int rmap_write_protect(struct kvm *kvm, u64 gfn)
98348e95 639{
290fc38d 640 unsigned long *rmapp;
374cbac0 641 u64 *spte;
caa5b8a5 642 int write_protected = 0;
374cbac0 643
4a4c9924 644 gfn = unalias_gfn(kvm, gfn);
05da4558 645 rmapp = gfn_to_rmap(kvm, gfn, 0);
374cbac0 646
98348e95
IE
647 spte = rmap_next(kvm, rmapp, NULL);
648 while (spte) {
374cbac0 649 BUG_ON(!spte);
374cbac0 650 BUG_ON(!(*spte & PT_PRESENT_MASK));
374cbac0 651 rmap_printk("rmap_write_protect: spte %p %llx\n", spte, *spte);
caa5b8a5 652 if (is_writeble_pte(*spte)) {
9647c14c 653 set_shadow_pte(spte, *spte & ~PT_WRITABLE_MASK);
caa5b8a5
ED
654 write_protected = 1;
655 }
9647c14c 656 spte = rmap_next(kvm, rmapp, spte);
374cbac0 657 }
855149aa 658 if (write_protected) {
35149e21 659 pfn_t pfn;
855149aa
IE
660
661 spte = rmap_next(kvm, rmapp, NULL);
35149e21
AL
662 pfn = spte_to_pfn(*spte);
663 kvm_set_pfn_dirty(pfn);
855149aa
IE
664 }
665
05da4558
MT
666 /* check for huge page mappings */
667 rmapp = gfn_to_rmap(kvm, gfn, 1);
668 spte = rmap_next(kvm, rmapp, NULL);
669 while (spte) {
670 BUG_ON(!spte);
671 BUG_ON(!(*spte & PT_PRESENT_MASK));
672 BUG_ON((*spte & (PT_PAGE_SIZE_MASK|PT_PRESENT_MASK)) != (PT_PAGE_SIZE_MASK|PT_PRESENT_MASK));
673 pgprintk("rmap_write_protect(large): spte %p %llx %lld\n", spte, *spte, gfn);
674 if (is_writeble_pte(*spte)) {
675 rmap_remove(kvm, spte);
676 --kvm->stat.lpages;
677 set_shadow_pte(spte, shadow_trap_nonpresent_pte);
6597ca09 678 spte = NULL;
05da4558
MT
679 write_protected = 1;
680 }
681 spte = rmap_next(kvm, rmapp, spte);
682 }
683
b1a36821 684 return write_protected;
374cbac0
AK
685}
686
e930bffe
AA
687static int kvm_unmap_rmapp(struct kvm *kvm, unsigned long *rmapp)
688{
689 u64 *spte;
690 int need_tlb_flush = 0;
691
692 while ((spte = rmap_next(kvm, rmapp, NULL))) {
693 BUG_ON(!(*spte & PT_PRESENT_MASK));
694 rmap_printk("kvm_rmap_unmap_hva: spte %p %llx\n", spte, *spte);
695 rmap_remove(kvm, spte);
696 set_shadow_pte(spte, shadow_trap_nonpresent_pte);
697 need_tlb_flush = 1;
698 }
699 return need_tlb_flush;
700}
701
702static int kvm_handle_hva(struct kvm *kvm, unsigned long hva,
703 int (*handler)(struct kvm *kvm, unsigned long *rmapp))
704{
705 int i;
706 int retval = 0;
707
708 /*
709 * If mmap_sem isn't taken, we can look the memslots with only
710 * the mmu_lock by skipping over the slots with userspace_addr == 0.
711 */
712 for (i = 0; i < kvm->nmemslots; i++) {
713 struct kvm_memory_slot *memslot = &kvm->memslots[i];
714 unsigned long start = memslot->userspace_addr;
715 unsigned long end;
716
717 /* mmu_lock protects userspace_addr */
718 if (!start)
719 continue;
720
721 end = start + (memslot->npages << PAGE_SHIFT);
722 if (hva >= start && hva < end) {
723 gfn_t gfn_offset = (hva - start) >> PAGE_SHIFT;
724 retval |= handler(kvm, &memslot->rmap[gfn_offset]);
725 retval |= handler(kvm,
726 &memslot->lpage_info[
727 gfn_offset /
728 KVM_PAGES_PER_HPAGE].rmap_pde);
729 }
730 }
731
732 return retval;
733}
734
735int kvm_unmap_hva(struct kvm *kvm, unsigned long hva)
736{
737 return kvm_handle_hva(kvm, hva, kvm_unmap_rmapp);
738}
739
740static int kvm_age_rmapp(struct kvm *kvm, unsigned long *rmapp)
741{
742 u64 *spte;
743 int young = 0;
744
534e38b4
SY
745 /* always return old for EPT */
746 if (!shadow_accessed_mask)
747 return 0;
748
e930bffe
AA
749 spte = rmap_next(kvm, rmapp, NULL);
750 while (spte) {
751 int _young;
752 u64 _spte = *spte;
753 BUG_ON(!(_spte & PT_PRESENT_MASK));
754 _young = _spte & PT_ACCESSED_MASK;
755 if (_young) {
756 young = 1;
757 clear_bit(PT_ACCESSED_SHIFT, (unsigned long *)spte);
758 }
759 spte = rmap_next(kvm, rmapp, spte);
760 }
761 return young;
762}
763
764int kvm_age_hva(struct kvm *kvm, unsigned long hva)
765{
766 return kvm_handle_hva(kvm, hva, kvm_age_rmapp);
767}
768
d6c69ee9 769#ifdef MMU_DEBUG
47ad8e68 770static int is_empty_shadow_page(u64 *spt)
6aa8b732 771{
139bdb2d
AK
772 u64 *pos;
773 u64 *end;
774
47ad8e68 775 for (pos = spt, end = pos + PAGE_SIZE / sizeof(u64); pos != end; pos++)
3c915510 776 if (is_shadow_present_pte(*pos)) {
b8688d51 777 printk(KERN_ERR "%s: %p %llx\n", __func__,
139bdb2d 778 pos, *pos);
6aa8b732 779 return 0;
139bdb2d 780 }
6aa8b732
AK
781 return 1;
782}
d6c69ee9 783#endif
6aa8b732 784
4db35314 785static void kvm_mmu_free_page(struct kvm *kvm, struct kvm_mmu_page *sp)
260746c0 786{
4db35314
AK
787 ASSERT(is_empty_shadow_page(sp->spt));
788 list_del(&sp->link);
789 __free_page(virt_to_page(sp->spt));
790 __free_page(virt_to_page(sp->gfns));
791 kfree(sp);
f05e70ac 792 ++kvm->arch.n_free_mmu_pages;
260746c0
AK
793}
794
cea0f0e7
AK
795static unsigned kvm_page_table_hashfn(gfn_t gfn)
796{
1ae0a13d 797 return gfn & ((1 << KVM_MMU_HASH_SHIFT) - 1);
cea0f0e7
AK
798}
799
25c0de2c
AK
800static struct kvm_mmu_page *kvm_mmu_alloc_page(struct kvm_vcpu *vcpu,
801 u64 *parent_pte)
6aa8b732 802{
4db35314 803 struct kvm_mmu_page *sp;
6aa8b732 804
ad312c7c
ZX
805 sp = mmu_memory_cache_alloc(&vcpu->arch.mmu_page_header_cache, sizeof *sp);
806 sp->spt = mmu_memory_cache_alloc(&vcpu->arch.mmu_page_cache, PAGE_SIZE);
807 sp->gfns = mmu_memory_cache_alloc(&vcpu->arch.mmu_page_cache, PAGE_SIZE);
4db35314 808 set_page_private(virt_to_page(sp->spt), (unsigned long)sp);
f05e70ac 809 list_add(&sp->link, &vcpu->kvm->arch.active_mmu_pages);
6cffe8ca 810 INIT_LIST_HEAD(&sp->oos_link);
4db35314 811 ASSERT(is_empty_shadow_page(sp->spt));
291f26bc 812 bitmap_zero(sp->slot_bitmap, KVM_MEMORY_SLOTS + KVM_PRIVATE_MEM_SLOTS);
4db35314
AK
813 sp->multimapped = 0;
814 sp->parent_pte = parent_pte;
f05e70ac 815 --vcpu->kvm->arch.n_free_mmu_pages;
4db35314 816 return sp;
6aa8b732
AK
817}
818
714b93da 819static void mmu_page_add_parent_pte(struct kvm_vcpu *vcpu,
4db35314 820 struct kvm_mmu_page *sp, u64 *parent_pte)
cea0f0e7
AK
821{
822 struct kvm_pte_chain *pte_chain;
823 struct hlist_node *node;
824 int i;
825
826 if (!parent_pte)
827 return;
4db35314
AK
828 if (!sp->multimapped) {
829 u64 *old = sp->parent_pte;
cea0f0e7
AK
830
831 if (!old) {
4db35314 832 sp->parent_pte = parent_pte;
cea0f0e7
AK
833 return;
834 }
4db35314 835 sp->multimapped = 1;
714b93da 836 pte_chain = mmu_alloc_pte_chain(vcpu);
4db35314
AK
837 INIT_HLIST_HEAD(&sp->parent_ptes);
838 hlist_add_head(&pte_chain->link, &sp->parent_ptes);
cea0f0e7
AK
839 pte_chain->parent_ptes[0] = old;
840 }
4db35314 841 hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link) {
cea0f0e7
AK
842 if (pte_chain->parent_ptes[NR_PTE_CHAIN_ENTRIES-1])
843 continue;
844 for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i)
845 if (!pte_chain->parent_ptes[i]) {
846 pte_chain->parent_ptes[i] = parent_pte;
847 return;
848 }
849 }
714b93da 850 pte_chain = mmu_alloc_pte_chain(vcpu);
cea0f0e7 851 BUG_ON(!pte_chain);
4db35314 852 hlist_add_head(&pte_chain->link, &sp->parent_ptes);
cea0f0e7
AK
853 pte_chain->parent_ptes[0] = parent_pte;
854}
855
4db35314 856static void mmu_page_remove_parent_pte(struct kvm_mmu_page *sp,
cea0f0e7
AK
857 u64 *parent_pte)
858{
859 struct kvm_pte_chain *pte_chain;
860 struct hlist_node *node;
861 int i;
862
4db35314
AK
863 if (!sp->multimapped) {
864 BUG_ON(sp->parent_pte != parent_pte);
865 sp->parent_pte = NULL;
cea0f0e7
AK
866 return;
867 }
4db35314 868 hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link)
cea0f0e7
AK
869 for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i) {
870 if (!pte_chain->parent_ptes[i])
871 break;
872 if (pte_chain->parent_ptes[i] != parent_pte)
873 continue;
697fe2e2
AK
874 while (i + 1 < NR_PTE_CHAIN_ENTRIES
875 && pte_chain->parent_ptes[i + 1]) {
cea0f0e7
AK
876 pte_chain->parent_ptes[i]
877 = pte_chain->parent_ptes[i + 1];
878 ++i;
879 }
880 pte_chain->parent_ptes[i] = NULL;
697fe2e2
AK
881 if (i == 0) {
882 hlist_del(&pte_chain->link);
90cb0529 883 mmu_free_pte_chain(pte_chain);
4db35314
AK
884 if (hlist_empty(&sp->parent_ptes)) {
885 sp->multimapped = 0;
886 sp->parent_pte = NULL;
697fe2e2
AK
887 }
888 }
cea0f0e7
AK
889 return;
890 }
891 BUG();
892}
893
ad8cfbe3
MT
894
895static void mmu_parent_walk(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp,
896 mmu_parent_walk_fn fn)
897{
898 struct kvm_pte_chain *pte_chain;
899 struct hlist_node *node;
900 struct kvm_mmu_page *parent_sp;
901 int i;
902
903 if (!sp->multimapped && sp->parent_pte) {
904 parent_sp = page_header(__pa(sp->parent_pte));
905 fn(vcpu, parent_sp);
906 mmu_parent_walk(vcpu, parent_sp, fn);
907 return;
908 }
909 hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link)
910 for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i) {
911 if (!pte_chain->parent_ptes[i])
912 break;
913 parent_sp = page_header(__pa(pte_chain->parent_ptes[i]));
914 fn(vcpu, parent_sp);
915 mmu_parent_walk(vcpu, parent_sp, fn);
916 }
917}
918
0074ff63
MT
919static void kvm_mmu_update_unsync_bitmap(u64 *spte)
920{
921 unsigned int index;
922 struct kvm_mmu_page *sp = page_header(__pa(spte));
923
924 index = spte - sp->spt;
60c8aec6
MT
925 if (!__test_and_set_bit(index, sp->unsync_child_bitmap))
926 sp->unsync_children++;
927 WARN_ON(!sp->unsync_children);
0074ff63
MT
928}
929
930static void kvm_mmu_update_parents_unsync(struct kvm_mmu_page *sp)
931{
932 struct kvm_pte_chain *pte_chain;
933 struct hlist_node *node;
934 int i;
935
936 if (!sp->parent_pte)
937 return;
938
939 if (!sp->multimapped) {
940 kvm_mmu_update_unsync_bitmap(sp->parent_pte);
941 return;
942 }
943
944 hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link)
945 for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i) {
946 if (!pte_chain->parent_ptes[i])
947 break;
948 kvm_mmu_update_unsync_bitmap(pte_chain->parent_ptes[i]);
949 }
950}
951
952static int unsync_walk_fn(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp)
953{
0074ff63
MT
954 kvm_mmu_update_parents_unsync(sp);
955 return 1;
956}
957
958static void kvm_mmu_mark_parents_unsync(struct kvm_vcpu *vcpu,
959 struct kvm_mmu_page *sp)
960{
961 mmu_parent_walk(vcpu, sp, unsync_walk_fn);
962 kvm_mmu_update_parents_unsync(sp);
963}
964
d761a501
AK
965static void nonpaging_prefetch_page(struct kvm_vcpu *vcpu,
966 struct kvm_mmu_page *sp)
967{
968 int i;
969
970 for (i = 0; i < PT64_ENT_PER_PAGE; ++i)
971 sp->spt[i] = shadow_trap_nonpresent_pte;
972}
973
e8bc217a
MT
974static int nonpaging_sync_page(struct kvm_vcpu *vcpu,
975 struct kvm_mmu_page *sp)
976{
977 return 1;
978}
979
a7052897
MT
980static void nonpaging_invlpg(struct kvm_vcpu *vcpu, gva_t gva)
981{
982}
983
60c8aec6
MT
984#define KVM_PAGE_ARRAY_NR 16
985
986struct kvm_mmu_pages {
987 struct mmu_page_and_offset {
988 struct kvm_mmu_page *sp;
989 unsigned int idx;
990 } page[KVM_PAGE_ARRAY_NR];
991 unsigned int nr;
992};
993
0074ff63
MT
994#define for_each_unsync_children(bitmap, idx) \
995 for (idx = find_first_bit(bitmap, 512); \
996 idx < 512; \
997 idx = find_next_bit(bitmap, 512, idx+1))
998
60c8aec6
MT
999int mmu_pages_add(struct kvm_mmu_pages *pvec, struct kvm_mmu_page *sp,
1000 int idx)
4731d4c7 1001{
60c8aec6 1002 int i;
4731d4c7 1003
60c8aec6
MT
1004 if (sp->unsync)
1005 for (i=0; i < pvec->nr; i++)
1006 if (pvec->page[i].sp == sp)
1007 return 0;
1008
1009 pvec->page[pvec->nr].sp = sp;
1010 pvec->page[pvec->nr].idx = idx;
1011 pvec->nr++;
1012 return (pvec->nr == KVM_PAGE_ARRAY_NR);
1013}
1014
1015static int __mmu_unsync_walk(struct kvm_mmu_page *sp,
1016 struct kvm_mmu_pages *pvec)
1017{
1018 int i, ret, nr_unsync_leaf = 0;
4731d4c7 1019
0074ff63 1020 for_each_unsync_children(sp->unsync_child_bitmap, i) {
4731d4c7
MT
1021 u64 ent = sp->spt[i];
1022
87917239 1023 if (is_shadow_present_pte(ent) && !is_large_pte(ent)) {
4731d4c7
MT
1024 struct kvm_mmu_page *child;
1025 child = page_header(ent & PT64_BASE_ADDR_MASK);
1026
1027 if (child->unsync_children) {
60c8aec6
MT
1028 if (mmu_pages_add(pvec, child, i))
1029 return -ENOSPC;
1030
1031 ret = __mmu_unsync_walk(child, pvec);
1032 if (!ret)
1033 __clear_bit(i, sp->unsync_child_bitmap);
1034 else if (ret > 0)
1035 nr_unsync_leaf += ret;
1036 else
4731d4c7
MT
1037 return ret;
1038 }
1039
1040 if (child->unsync) {
60c8aec6
MT
1041 nr_unsync_leaf++;
1042 if (mmu_pages_add(pvec, child, i))
1043 return -ENOSPC;
4731d4c7
MT
1044 }
1045 }
1046 }
1047
0074ff63 1048 if (find_first_bit(sp->unsync_child_bitmap, 512) == 512)
4731d4c7
MT
1049 sp->unsync_children = 0;
1050
60c8aec6
MT
1051 return nr_unsync_leaf;
1052}
1053
1054static int mmu_unsync_walk(struct kvm_mmu_page *sp,
1055 struct kvm_mmu_pages *pvec)
1056{
1057 if (!sp->unsync_children)
1058 return 0;
1059
1060 mmu_pages_add(pvec, sp, 0);
1061 return __mmu_unsync_walk(sp, pvec);
4731d4c7
MT
1062}
1063
4db35314 1064static struct kvm_mmu_page *kvm_mmu_lookup_page(struct kvm *kvm, gfn_t gfn)
cea0f0e7
AK
1065{
1066 unsigned index;
1067 struct hlist_head *bucket;
4db35314 1068 struct kvm_mmu_page *sp;
cea0f0e7
AK
1069 struct hlist_node *node;
1070
b8688d51 1071 pgprintk("%s: looking for gfn %lx\n", __func__, gfn);
1ae0a13d 1072 index = kvm_page_table_hashfn(gfn);
f05e70ac 1073 bucket = &kvm->arch.mmu_page_hash[index];
4db35314 1074 hlist_for_each_entry(sp, node, bucket, hash_link)
2e53d63a
MT
1075 if (sp->gfn == gfn && !sp->role.metaphysical
1076 && !sp->role.invalid) {
cea0f0e7 1077 pgprintk("%s: found role %x\n",
b8688d51 1078 __func__, sp->role.word);
4db35314 1079 return sp;
cea0f0e7
AK
1080 }
1081 return NULL;
1082}
1083
6cffe8ca
MT
1084static void kvm_unlink_unsync_global(struct kvm *kvm, struct kvm_mmu_page *sp)
1085{
1086 list_del(&sp->oos_link);
1087 --kvm->stat.mmu_unsync_global;
1088}
1089
4731d4c7
MT
1090static void kvm_unlink_unsync_page(struct kvm *kvm, struct kvm_mmu_page *sp)
1091{
1092 WARN_ON(!sp->unsync);
1093 sp->unsync = 0;
6cffe8ca
MT
1094 if (sp->global)
1095 kvm_unlink_unsync_global(kvm, sp);
4731d4c7
MT
1096 --kvm->stat.mmu_unsync;
1097}
1098
1099static int kvm_mmu_zap_page(struct kvm *kvm, struct kvm_mmu_page *sp);
1100
1101static int kvm_sync_page(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp)
1102{
1103 if (sp->role.glevels != vcpu->arch.mmu.root_level) {
1104 kvm_mmu_zap_page(vcpu->kvm, sp);
1105 return 1;
1106 }
1107
b1a36821
MT
1108 if (rmap_write_protect(vcpu->kvm, sp->gfn))
1109 kvm_flush_remote_tlbs(vcpu->kvm);
0c0f40bd 1110 kvm_unlink_unsync_page(vcpu->kvm, sp);
4731d4c7
MT
1111 if (vcpu->arch.mmu.sync_page(vcpu, sp)) {
1112 kvm_mmu_zap_page(vcpu->kvm, sp);
1113 return 1;
1114 }
1115
1116 kvm_mmu_flush_tlb(vcpu);
4731d4c7
MT
1117 return 0;
1118}
1119
60c8aec6
MT
1120struct mmu_page_path {
1121 struct kvm_mmu_page *parent[PT64_ROOT_LEVEL-1];
1122 unsigned int idx[PT64_ROOT_LEVEL-1];
4731d4c7
MT
1123};
1124
60c8aec6
MT
1125#define for_each_sp(pvec, sp, parents, i) \
1126 for (i = mmu_pages_next(&pvec, &parents, -1), \
1127 sp = pvec.page[i].sp; \
1128 i < pvec.nr && ({ sp = pvec.page[i].sp; 1;}); \
1129 i = mmu_pages_next(&pvec, &parents, i))
1130
1131int mmu_pages_next(struct kvm_mmu_pages *pvec, struct mmu_page_path *parents,
1132 int i)
1133{
1134 int n;
1135
1136 for (n = i+1; n < pvec->nr; n++) {
1137 struct kvm_mmu_page *sp = pvec->page[n].sp;
1138
1139 if (sp->role.level == PT_PAGE_TABLE_LEVEL) {
1140 parents->idx[0] = pvec->page[n].idx;
1141 return n;
1142 }
1143
1144 parents->parent[sp->role.level-2] = sp;
1145 parents->idx[sp->role.level-1] = pvec->page[n].idx;
1146 }
1147
1148 return n;
1149}
1150
1151void mmu_pages_clear_parents(struct mmu_page_path *parents)
4731d4c7 1152{
60c8aec6
MT
1153 struct kvm_mmu_page *sp;
1154 unsigned int level = 0;
1155
1156 do {
1157 unsigned int idx = parents->idx[level];
4731d4c7 1158
60c8aec6
MT
1159 sp = parents->parent[level];
1160 if (!sp)
1161 return;
1162
1163 --sp->unsync_children;
1164 WARN_ON((int)sp->unsync_children < 0);
1165 __clear_bit(idx, sp->unsync_child_bitmap);
1166 level++;
1167 } while (level < PT64_ROOT_LEVEL-1 && !sp->unsync_children);
4731d4c7
MT
1168}
1169
60c8aec6
MT
1170static void kvm_mmu_pages_init(struct kvm_mmu_page *parent,
1171 struct mmu_page_path *parents,
1172 struct kvm_mmu_pages *pvec)
4731d4c7 1173{
60c8aec6
MT
1174 parents->parent[parent->role.level-1] = NULL;
1175 pvec->nr = 0;
1176}
4731d4c7 1177
60c8aec6
MT
1178static void mmu_sync_children(struct kvm_vcpu *vcpu,
1179 struct kvm_mmu_page *parent)
1180{
1181 int i;
1182 struct kvm_mmu_page *sp;
1183 struct mmu_page_path parents;
1184 struct kvm_mmu_pages pages;
1185
1186 kvm_mmu_pages_init(parent, &parents, &pages);
1187 while (mmu_unsync_walk(parent, &pages)) {
b1a36821
MT
1188 int protected = 0;
1189
1190 for_each_sp(pages, sp, parents, i)
1191 protected |= rmap_write_protect(vcpu->kvm, sp->gfn);
1192
1193 if (protected)
1194 kvm_flush_remote_tlbs(vcpu->kvm);
1195
60c8aec6
MT
1196 for_each_sp(pages, sp, parents, i) {
1197 kvm_sync_page(vcpu, sp);
1198 mmu_pages_clear_parents(&parents);
1199 }
4731d4c7 1200 cond_resched_lock(&vcpu->kvm->mmu_lock);
60c8aec6
MT
1201 kvm_mmu_pages_init(parent, &parents, &pages);
1202 }
4731d4c7
MT
1203}
1204
cea0f0e7
AK
1205static struct kvm_mmu_page *kvm_mmu_get_page(struct kvm_vcpu *vcpu,
1206 gfn_t gfn,
1207 gva_t gaddr,
1208 unsigned level,
1209 int metaphysical,
41074d07 1210 unsigned access,
f7d9c7b7 1211 u64 *parent_pte)
cea0f0e7
AK
1212{
1213 union kvm_mmu_page_role role;
1214 unsigned index;
1215 unsigned quadrant;
1216 struct hlist_head *bucket;
4db35314 1217 struct kvm_mmu_page *sp;
4731d4c7 1218 struct hlist_node *node, *tmp;
cea0f0e7 1219
a770f6f2 1220 role = vcpu->arch.mmu.base_role;
cea0f0e7
AK
1221 role.level = level;
1222 role.metaphysical = metaphysical;
41074d07 1223 role.access = access;
ad312c7c 1224 if (vcpu->arch.mmu.root_level <= PT32_ROOT_LEVEL) {
cea0f0e7
AK
1225 quadrant = gaddr >> (PAGE_SHIFT + (PT64_PT_BITS * level));
1226 quadrant &= (1 << ((PT32_PT_BITS - PT64_PT_BITS) * level)) - 1;
1227 role.quadrant = quadrant;
1228 }
b8688d51 1229 pgprintk("%s: looking gfn %lx role %x\n", __func__,
cea0f0e7 1230 gfn, role.word);
1ae0a13d 1231 index = kvm_page_table_hashfn(gfn);
f05e70ac 1232 bucket = &vcpu->kvm->arch.mmu_page_hash[index];
4731d4c7
MT
1233 hlist_for_each_entry_safe(sp, node, tmp, bucket, hash_link)
1234 if (sp->gfn == gfn) {
1235 if (sp->unsync)
1236 if (kvm_sync_page(vcpu, sp))
1237 continue;
1238
1239 if (sp->role.word != role.word)
1240 continue;
1241
4db35314 1242 mmu_page_add_parent_pte(vcpu, sp, parent_pte);
0074ff63
MT
1243 if (sp->unsync_children) {
1244 set_bit(KVM_REQ_MMU_SYNC, &vcpu->requests);
1245 kvm_mmu_mark_parents_unsync(vcpu, sp);
1246 }
b8688d51 1247 pgprintk("%s: found\n", __func__);
4db35314 1248 return sp;
cea0f0e7 1249 }
dfc5aa00 1250 ++vcpu->kvm->stat.mmu_cache_miss;
4db35314
AK
1251 sp = kvm_mmu_alloc_page(vcpu, parent_pte);
1252 if (!sp)
1253 return sp;
b8688d51 1254 pgprintk("%s: adding gfn %lx role %x\n", __func__, gfn, role.word);
4db35314
AK
1255 sp->gfn = gfn;
1256 sp->role = role;
e2078318 1257 sp->global = role.cr4_pge;
4db35314 1258 hlist_add_head(&sp->hash_link, bucket);
4731d4c7 1259 if (!metaphysical) {
b1a36821
MT
1260 if (rmap_write_protect(vcpu->kvm, gfn))
1261 kvm_flush_remote_tlbs(vcpu->kvm);
4731d4c7
MT
1262 account_shadowed(vcpu->kvm, gfn);
1263 }
131d8279
AK
1264 if (shadow_trap_nonpresent_pte != shadow_notrap_nonpresent_pte)
1265 vcpu->arch.mmu.prefetch_page(vcpu, sp);
1266 else
1267 nonpaging_prefetch_page(vcpu, sp);
4db35314 1268 return sp;
cea0f0e7
AK
1269}
1270
2d11123a
AK
1271static void shadow_walk_init(struct kvm_shadow_walk_iterator *iterator,
1272 struct kvm_vcpu *vcpu, u64 addr)
1273{
1274 iterator->addr = addr;
1275 iterator->shadow_addr = vcpu->arch.mmu.root_hpa;
1276 iterator->level = vcpu->arch.mmu.shadow_root_level;
1277 if (iterator->level == PT32E_ROOT_LEVEL) {
1278 iterator->shadow_addr
1279 = vcpu->arch.mmu.pae_root[(addr >> 30) & 3];
1280 iterator->shadow_addr &= PT64_BASE_ADDR_MASK;
1281 --iterator->level;
1282 if (!iterator->shadow_addr)
1283 iterator->level = 0;
1284 }
1285}
1286
1287static bool shadow_walk_okay(struct kvm_shadow_walk_iterator *iterator)
1288{
1289 if (iterator->level < PT_PAGE_TABLE_LEVEL)
1290 return false;
1291 iterator->index = SHADOW_PT_INDEX(iterator->addr, iterator->level);
1292 iterator->sptep = ((u64 *)__va(iterator->shadow_addr)) + iterator->index;
1293 return true;
1294}
1295
1296static void shadow_walk_next(struct kvm_shadow_walk_iterator *iterator)
1297{
1298 iterator->shadow_addr = *iterator->sptep & PT64_BASE_ADDR_MASK;
1299 --iterator->level;
1300}
1301
3d000db5 1302static int walk_shadow(struct kvm_shadow_walk *walker,
d40a1ee4 1303 struct kvm_vcpu *vcpu, u64 addr)
3d000db5 1304{
2d11123a 1305 struct kvm_shadow_walk_iterator iterator;
3d000db5 1306 int r;
3d000db5 1307
2d11123a
AK
1308 for_each_shadow_entry(vcpu, addr, iterator) {
1309 r = walker->entry(walker, vcpu, addr,
1310 iterator.sptep, iterator.level);
3d000db5
AK
1311 if (r)
1312 return r;
3d000db5
AK
1313 }
1314 return 0;
1315}
1316
90cb0529 1317static void kvm_mmu_page_unlink_children(struct kvm *kvm,
4db35314 1318 struct kvm_mmu_page *sp)
a436036b 1319{
697fe2e2
AK
1320 unsigned i;
1321 u64 *pt;
1322 u64 ent;
1323
4db35314 1324 pt = sp->spt;
697fe2e2 1325
4db35314 1326 if (sp->role.level == PT_PAGE_TABLE_LEVEL) {
697fe2e2 1327 for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
c7addb90 1328 if (is_shadow_present_pte(pt[i]))
290fc38d 1329 rmap_remove(kvm, &pt[i]);
c7addb90 1330 pt[i] = shadow_trap_nonpresent_pte;
697fe2e2
AK
1331 }
1332 return;
1333 }
1334
1335 for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
1336 ent = pt[i];
1337
05da4558
MT
1338 if (is_shadow_present_pte(ent)) {
1339 if (!is_large_pte(ent)) {
1340 ent &= PT64_BASE_ADDR_MASK;
1341 mmu_page_remove_parent_pte(page_header(ent),
1342 &pt[i]);
1343 } else {
1344 --kvm->stat.lpages;
1345 rmap_remove(kvm, &pt[i]);
1346 }
1347 }
c7addb90 1348 pt[i] = shadow_trap_nonpresent_pte;
697fe2e2 1349 }
a436036b
AK
1350}
1351
4db35314 1352static void kvm_mmu_put_page(struct kvm_mmu_page *sp, u64 *parent_pte)
cea0f0e7 1353{
4db35314 1354 mmu_page_remove_parent_pte(sp, parent_pte);
a436036b
AK
1355}
1356
12b7d28f
AK
1357static void kvm_mmu_reset_last_pte_updated(struct kvm *kvm)
1358{
1359 int i;
1360
1361 for (i = 0; i < KVM_MAX_VCPUS; ++i)
1362 if (kvm->vcpus[i])
ad312c7c 1363 kvm->vcpus[i]->arch.last_pte_updated = NULL;
12b7d28f
AK
1364}
1365
31aa2b44 1366static void kvm_mmu_unlink_parents(struct kvm *kvm, struct kvm_mmu_page *sp)
a436036b
AK
1367{
1368 u64 *parent_pte;
1369
4db35314
AK
1370 while (sp->multimapped || sp->parent_pte) {
1371 if (!sp->multimapped)
1372 parent_pte = sp->parent_pte;
a436036b
AK
1373 else {
1374 struct kvm_pte_chain *chain;
1375
4db35314 1376 chain = container_of(sp->parent_ptes.first,
a436036b
AK
1377 struct kvm_pte_chain, link);
1378 parent_pte = chain->parent_ptes[0];
1379 }
697fe2e2 1380 BUG_ON(!parent_pte);
4db35314 1381 kvm_mmu_put_page(sp, parent_pte);
c7addb90 1382 set_shadow_pte(parent_pte, shadow_trap_nonpresent_pte);
a436036b 1383 }
31aa2b44
AK
1384}
1385
60c8aec6
MT
1386static int mmu_zap_unsync_children(struct kvm *kvm,
1387 struct kvm_mmu_page *parent)
4731d4c7 1388{
60c8aec6
MT
1389 int i, zapped = 0;
1390 struct mmu_page_path parents;
1391 struct kvm_mmu_pages pages;
4731d4c7 1392
60c8aec6 1393 if (parent->role.level == PT_PAGE_TABLE_LEVEL)
4731d4c7 1394 return 0;
60c8aec6
MT
1395
1396 kvm_mmu_pages_init(parent, &parents, &pages);
1397 while (mmu_unsync_walk(parent, &pages)) {
1398 struct kvm_mmu_page *sp;
1399
1400 for_each_sp(pages, sp, parents, i) {
1401 kvm_mmu_zap_page(kvm, sp);
1402 mmu_pages_clear_parents(&parents);
1403 }
1404 zapped += pages.nr;
1405 kvm_mmu_pages_init(parent, &parents, &pages);
1406 }
1407
1408 return zapped;
4731d4c7
MT
1409}
1410
07385413 1411static int kvm_mmu_zap_page(struct kvm *kvm, struct kvm_mmu_page *sp)
31aa2b44 1412{
4731d4c7 1413 int ret;
31aa2b44 1414 ++kvm->stat.mmu_shadow_zapped;
4731d4c7 1415 ret = mmu_zap_unsync_children(kvm, sp);
4db35314 1416 kvm_mmu_page_unlink_children(kvm, sp);
31aa2b44 1417 kvm_mmu_unlink_parents(kvm, sp);
5b5c6a5a
AK
1418 kvm_flush_remote_tlbs(kvm);
1419 if (!sp->role.invalid && !sp->role.metaphysical)
1420 unaccount_shadowed(kvm, sp->gfn);
4731d4c7
MT
1421 if (sp->unsync)
1422 kvm_unlink_unsync_page(kvm, sp);
4db35314
AK
1423 if (!sp->root_count) {
1424 hlist_del(&sp->hash_link);
1425 kvm_mmu_free_page(kvm, sp);
2e53d63a 1426 } else {
2e53d63a 1427 sp->role.invalid = 1;
5b5c6a5a 1428 list_move(&sp->link, &kvm->arch.active_mmu_pages);
2e53d63a
MT
1429 kvm_reload_remote_mmus(kvm);
1430 }
12b7d28f 1431 kvm_mmu_reset_last_pte_updated(kvm);
4731d4c7 1432 return ret;
a436036b
AK
1433}
1434
82ce2c96
IE
1435/*
1436 * Changing the number of mmu pages allocated to the vm
1437 * Note: if kvm_nr_mmu_pages is too small, you will get dead lock
1438 */
1439void kvm_mmu_change_mmu_pages(struct kvm *kvm, unsigned int kvm_nr_mmu_pages)
1440{
1441 /*
1442 * If we set the number of mmu pages to be smaller be than the
1443 * number of actived pages , we must to free some mmu pages before we
1444 * change the value
1445 */
1446
f05e70ac 1447 if ((kvm->arch.n_alloc_mmu_pages - kvm->arch.n_free_mmu_pages) >
82ce2c96 1448 kvm_nr_mmu_pages) {
f05e70ac
ZX
1449 int n_used_mmu_pages = kvm->arch.n_alloc_mmu_pages
1450 - kvm->arch.n_free_mmu_pages;
82ce2c96
IE
1451
1452 while (n_used_mmu_pages > kvm_nr_mmu_pages) {
1453 struct kvm_mmu_page *page;
1454
f05e70ac 1455 page = container_of(kvm->arch.active_mmu_pages.prev,
82ce2c96
IE
1456 struct kvm_mmu_page, link);
1457 kvm_mmu_zap_page(kvm, page);
1458 n_used_mmu_pages--;
1459 }
f05e70ac 1460 kvm->arch.n_free_mmu_pages = 0;
82ce2c96
IE
1461 }
1462 else
f05e70ac
ZX
1463 kvm->arch.n_free_mmu_pages += kvm_nr_mmu_pages
1464 - kvm->arch.n_alloc_mmu_pages;
82ce2c96 1465
f05e70ac 1466 kvm->arch.n_alloc_mmu_pages = kvm_nr_mmu_pages;
82ce2c96
IE
1467}
1468
f67a46f4 1469static int kvm_mmu_unprotect_page(struct kvm *kvm, gfn_t gfn)
a436036b
AK
1470{
1471 unsigned index;
1472 struct hlist_head *bucket;
4db35314 1473 struct kvm_mmu_page *sp;
a436036b
AK
1474 struct hlist_node *node, *n;
1475 int r;
1476
b8688d51 1477 pgprintk("%s: looking for gfn %lx\n", __func__, gfn);
a436036b 1478 r = 0;
1ae0a13d 1479 index = kvm_page_table_hashfn(gfn);
f05e70ac 1480 bucket = &kvm->arch.mmu_page_hash[index];
4db35314
AK
1481 hlist_for_each_entry_safe(sp, node, n, bucket, hash_link)
1482 if (sp->gfn == gfn && !sp->role.metaphysical) {
b8688d51 1483 pgprintk("%s: gfn %lx role %x\n", __func__, gfn,
4db35314 1484 sp->role.word);
a436036b 1485 r = 1;
07385413
MT
1486 if (kvm_mmu_zap_page(kvm, sp))
1487 n = bucket->first;
a436036b
AK
1488 }
1489 return r;
cea0f0e7
AK
1490}
1491
f67a46f4 1492static void mmu_unshadow(struct kvm *kvm, gfn_t gfn)
97a0a01e 1493{
4db35314 1494 struct kvm_mmu_page *sp;
97a0a01e 1495
4db35314 1496 while ((sp = kvm_mmu_lookup_page(kvm, gfn)) != NULL) {
b8688d51 1497 pgprintk("%s: zap %lx %x\n", __func__, gfn, sp->role.word);
4db35314 1498 kvm_mmu_zap_page(kvm, sp);
97a0a01e
AK
1499 }
1500}
1501
38c335f1 1502static void page_header_update_slot(struct kvm *kvm, void *pte, gfn_t gfn)
6aa8b732 1503{
38c335f1 1504 int slot = memslot_id(kvm, gfn_to_memslot(kvm, gfn));
4db35314 1505 struct kvm_mmu_page *sp = page_header(__pa(pte));
6aa8b732 1506
291f26bc 1507 __set_bit(slot, sp->slot_bitmap);
6aa8b732
AK
1508}
1509
6844dec6
MT
1510static void mmu_convert_notrap(struct kvm_mmu_page *sp)
1511{
1512 int i;
1513 u64 *pt = sp->spt;
1514
1515 if (shadow_trap_nonpresent_pte == shadow_notrap_nonpresent_pte)
1516 return;
1517
1518 for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
1519 if (pt[i] == shadow_notrap_nonpresent_pte)
1520 set_shadow_pte(&pt[i], shadow_trap_nonpresent_pte);
1521 }
1522}
1523
039576c0
AK
1524struct page *gva_to_page(struct kvm_vcpu *vcpu, gva_t gva)
1525{
72dc67a6
IE
1526 struct page *page;
1527
ad312c7c 1528 gpa_t gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, gva);
039576c0
AK
1529
1530 if (gpa == UNMAPPED_GVA)
1531 return NULL;
72dc67a6 1532
72dc67a6 1533 page = gfn_to_page(vcpu->kvm, gpa >> PAGE_SHIFT);
72dc67a6
IE
1534
1535 return page;
039576c0
AK
1536}
1537
74be52e3
SY
1538/*
1539 * The function is based on mtrr_type_lookup() in
1540 * arch/x86/kernel/cpu/mtrr/generic.c
1541 */
1542static int get_mtrr_type(struct mtrr_state_type *mtrr_state,
1543 u64 start, u64 end)
1544{
1545 int i;
1546 u64 base, mask;
1547 u8 prev_match, curr_match;
1548 int num_var_ranges = KVM_NR_VAR_MTRR;
1549
1550 if (!mtrr_state->enabled)
1551 return 0xFF;
1552
1553 /* Make end inclusive end, instead of exclusive */
1554 end--;
1555
1556 /* Look in fixed ranges. Just return the type as per start */
1557 if (mtrr_state->have_fixed && (start < 0x100000)) {
1558 int idx;
1559
1560 if (start < 0x80000) {
1561 idx = 0;
1562 idx += (start >> 16);
1563 return mtrr_state->fixed_ranges[idx];
1564 } else if (start < 0xC0000) {
1565 idx = 1 * 8;
1566 idx += ((start - 0x80000) >> 14);
1567 return mtrr_state->fixed_ranges[idx];
1568 } else if (start < 0x1000000) {
1569 idx = 3 * 8;
1570 idx += ((start - 0xC0000) >> 12);
1571 return mtrr_state->fixed_ranges[idx];
1572 }
1573 }
1574
1575 /*
1576 * Look in variable ranges
1577 * Look of multiple ranges matching this address and pick type
1578 * as per MTRR precedence
1579 */
1580 if (!(mtrr_state->enabled & 2))
1581 return mtrr_state->def_type;
1582
1583 prev_match = 0xFF;
1584 for (i = 0; i < num_var_ranges; ++i) {
1585 unsigned short start_state, end_state;
1586
1587 if (!(mtrr_state->var_ranges[i].mask_lo & (1 << 11)))
1588 continue;
1589
1590 base = (((u64)mtrr_state->var_ranges[i].base_hi) << 32) +
1591 (mtrr_state->var_ranges[i].base_lo & PAGE_MASK);
1592 mask = (((u64)mtrr_state->var_ranges[i].mask_hi) << 32) +
1593 (mtrr_state->var_ranges[i].mask_lo & PAGE_MASK);
1594
1595 start_state = ((start & mask) == (base & mask));
1596 end_state = ((end & mask) == (base & mask));
1597 if (start_state != end_state)
1598 return 0xFE;
1599
1600 if ((start & mask) != (base & mask))
1601 continue;
1602
1603 curr_match = mtrr_state->var_ranges[i].base_lo & 0xff;
1604 if (prev_match == 0xFF) {
1605 prev_match = curr_match;
1606 continue;
1607 }
1608
1609 if (prev_match == MTRR_TYPE_UNCACHABLE ||
1610 curr_match == MTRR_TYPE_UNCACHABLE)
1611 return MTRR_TYPE_UNCACHABLE;
1612
1613 if ((prev_match == MTRR_TYPE_WRBACK &&
1614 curr_match == MTRR_TYPE_WRTHROUGH) ||
1615 (prev_match == MTRR_TYPE_WRTHROUGH &&
1616 curr_match == MTRR_TYPE_WRBACK)) {
1617 prev_match = MTRR_TYPE_WRTHROUGH;
1618 curr_match = MTRR_TYPE_WRTHROUGH;
1619 }
1620
1621 if (prev_match != curr_match)
1622 return MTRR_TYPE_UNCACHABLE;
1623 }
1624
1625 if (prev_match != 0xFF)
1626 return prev_match;
1627
1628 return mtrr_state->def_type;
1629}
1630
1631static u8 get_memory_type(struct kvm_vcpu *vcpu, gfn_t gfn)
1632{
1633 u8 mtrr;
1634
1635 mtrr = get_mtrr_type(&vcpu->arch.mtrr_state, gfn << PAGE_SHIFT,
1636 (gfn << PAGE_SHIFT) + PAGE_SIZE);
1637 if (mtrr == 0xfe || mtrr == 0xff)
1638 mtrr = MTRR_TYPE_WRBACK;
1639 return mtrr;
1640}
1641
4731d4c7
MT
1642static int kvm_unsync_page(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp)
1643{
1644 unsigned index;
1645 struct hlist_head *bucket;
1646 struct kvm_mmu_page *s;
1647 struct hlist_node *node, *n;
1648
1649 index = kvm_page_table_hashfn(sp->gfn);
1650 bucket = &vcpu->kvm->arch.mmu_page_hash[index];
1651 /* don't unsync if pagetable is shadowed with multiple roles */
1652 hlist_for_each_entry_safe(s, node, n, bucket, hash_link) {
1653 if (s->gfn != sp->gfn || s->role.metaphysical)
1654 continue;
1655 if (s->role.word != sp->role.word)
1656 return 1;
1657 }
4731d4c7
MT
1658 ++vcpu->kvm->stat.mmu_unsync;
1659 sp->unsync = 1;
6cffe8ca
MT
1660
1661 if (sp->global) {
1662 list_add(&sp->oos_link, &vcpu->kvm->arch.oos_global_pages);
1663 ++vcpu->kvm->stat.mmu_unsync_global;
1664 } else
1665 kvm_mmu_mark_parents_unsync(vcpu, sp);
1666
4731d4c7
MT
1667 mmu_convert_notrap(sp);
1668 return 0;
1669}
1670
1671static int mmu_need_write_protect(struct kvm_vcpu *vcpu, gfn_t gfn,
1672 bool can_unsync)
1673{
1674 struct kvm_mmu_page *shadow;
1675
1676 shadow = kvm_mmu_lookup_page(vcpu->kvm, gfn);
1677 if (shadow) {
1678 if (shadow->role.level != PT_PAGE_TABLE_LEVEL)
1679 return 1;
1680 if (shadow->unsync)
1681 return 0;
582801a9 1682 if (can_unsync && oos_shadow)
4731d4c7
MT
1683 return kvm_unsync_page(vcpu, shadow);
1684 return 1;
1685 }
1686 return 0;
1687}
1688
1e73f9dd
MT
1689static int set_spte(struct kvm_vcpu *vcpu, u64 *shadow_pte,
1690 unsigned pte_access, int user_fault,
1691 int write_fault, int dirty, int largepage,
6cffe8ca 1692 int global, gfn_t gfn, pfn_t pfn, bool speculative,
4731d4c7 1693 bool can_unsync)
1c4f1fd6
AK
1694{
1695 u64 spte;
1e73f9dd 1696 int ret = 0;
64d4d521 1697 u64 mt_mask = shadow_mt_mask;
6cffe8ca
MT
1698 struct kvm_mmu_page *sp = page_header(__pa(shadow_pte));
1699
1700 if (!global && sp->global) {
1701 sp->global = 0;
1702 if (sp->unsync) {
1703 kvm_unlink_unsync_global(vcpu->kvm, sp);
1704 kvm_mmu_mark_parents_unsync(vcpu, sp);
1705 }
1706 }
64d4d521 1707
1c4f1fd6
AK
1708 /*
1709 * We don't set the accessed bit, since we sometimes want to see
1710 * whether the guest actually used the pte (in order to detect
1711 * demand paging).
1712 */
7b52345e 1713 spte = shadow_base_present_pte | shadow_dirty_mask;
947da538 1714 if (!speculative)
3201b5d9 1715 spte |= shadow_accessed_mask;
1c4f1fd6
AK
1716 if (!dirty)
1717 pte_access &= ~ACC_WRITE_MASK;
7b52345e
SY
1718 if (pte_access & ACC_EXEC_MASK)
1719 spte |= shadow_x_mask;
1720 else
1721 spte |= shadow_nx_mask;
1c4f1fd6 1722 if (pte_access & ACC_USER_MASK)
7b52345e 1723 spte |= shadow_user_mask;
05da4558
MT
1724 if (largepage)
1725 spte |= PT_PAGE_SIZE_MASK;
64d4d521 1726 if (mt_mask) {
2aaf69dc
SY
1727 if (!kvm_is_mmio_pfn(pfn)) {
1728 mt_mask = get_memory_type(vcpu, gfn) <<
1729 kvm_x86_ops->get_mt_mask_shift();
1730 mt_mask |= VMX_EPT_IGMT_BIT;
1731 } else
1732 mt_mask = MTRR_TYPE_UNCACHABLE <<
1733 kvm_x86_ops->get_mt_mask_shift();
64d4d521
SY
1734 spte |= mt_mask;
1735 }
1c4f1fd6 1736
35149e21 1737 spte |= (u64)pfn << PAGE_SHIFT;
1c4f1fd6
AK
1738
1739 if ((pte_access & ACC_WRITE_MASK)
1740 || (write_fault && !is_write_protection(vcpu) && !user_fault)) {
1c4f1fd6 1741
38187c83
MT
1742 if (largepage && has_wrprotected_page(vcpu->kvm, gfn)) {
1743 ret = 1;
1744 spte = shadow_trap_nonpresent_pte;
1745 goto set_pte;
1746 }
1747
1c4f1fd6 1748 spte |= PT_WRITABLE_MASK;
1c4f1fd6 1749
ecc5589f
MT
1750 /*
1751 * Optimization: for pte sync, if spte was writable the hash
1752 * lookup is unnecessary (and expensive). Write protection
1753 * is responsibility of mmu_get_page / kvm_sync_page.
1754 * Same reasoning can be applied to dirty page accounting.
1755 */
1756 if (!can_unsync && is_writeble_pte(*shadow_pte))
1757 goto set_pte;
1758
4731d4c7 1759 if (mmu_need_write_protect(vcpu, gfn, can_unsync)) {
1c4f1fd6 1760 pgprintk("%s: found shadow page for %lx, marking ro\n",
b8688d51 1761 __func__, gfn);
1e73f9dd 1762 ret = 1;
1c4f1fd6 1763 pte_access &= ~ACC_WRITE_MASK;
a378b4e6 1764 if (is_writeble_pte(spte))
1c4f1fd6 1765 spte &= ~PT_WRITABLE_MASK;
1c4f1fd6
AK
1766 }
1767 }
1768
1c4f1fd6
AK
1769 if (pte_access & ACC_WRITE_MASK)
1770 mark_page_dirty(vcpu->kvm, gfn);
1771
38187c83 1772set_pte:
1c4f1fd6 1773 set_shadow_pte(shadow_pte, spte);
1e73f9dd
MT
1774 return ret;
1775}
1776
1e73f9dd
MT
1777static void mmu_set_spte(struct kvm_vcpu *vcpu, u64 *shadow_pte,
1778 unsigned pt_access, unsigned pte_access,
1779 int user_fault, int write_fault, int dirty,
6cffe8ca
MT
1780 int *ptwrite, int largepage, int global,
1781 gfn_t gfn, pfn_t pfn, bool speculative)
1e73f9dd
MT
1782{
1783 int was_rmapped = 0;
1784 int was_writeble = is_writeble_pte(*shadow_pte);
1785
1786 pgprintk("%s: spte %llx access %x write_fault %d"
1787 " user_fault %d gfn %lx\n",
1788 __func__, *shadow_pte, pt_access,
1789 write_fault, user_fault, gfn);
1790
1791 if (is_rmap_pte(*shadow_pte)) {
1792 /*
1793 * If we overwrite a PTE page pointer with a 2MB PMD, unlink
1794 * the parent of the now unreachable PTE.
1795 */
1796 if (largepage && !is_large_pte(*shadow_pte)) {
1797 struct kvm_mmu_page *child;
1798 u64 pte = *shadow_pte;
1799
1800 child = page_header(pte & PT64_BASE_ADDR_MASK);
1801 mmu_page_remove_parent_pte(child, shadow_pte);
1802 } else if (pfn != spte_to_pfn(*shadow_pte)) {
1803 pgprintk("hfn old %lx new %lx\n",
1804 spte_to_pfn(*shadow_pte), pfn);
1805 rmap_remove(vcpu->kvm, shadow_pte);
1806 } else {
1807 if (largepage)
1808 was_rmapped = is_large_pte(*shadow_pte);
1809 else
1810 was_rmapped = 1;
1811 }
1812 }
1813 if (set_spte(vcpu, shadow_pte, pte_access, user_fault, write_fault,
6cffe8ca 1814 dirty, largepage, global, gfn, pfn, speculative, true)) {
1e73f9dd
MT
1815 if (write_fault)
1816 *ptwrite = 1;
a378b4e6
MT
1817 kvm_x86_ops->tlb_flush(vcpu);
1818 }
1e73f9dd
MT
1819
1820 pgprintk("%s: setting spte %llx\n", __func__, *shadow_pte);
1821 pgprintk("instantiating %s PTE (%s) at %ld (%llx) addr %p\n",
1822 is_large_pte(*shadow_pte)? "2MB" : "4kB",
1823 is_present_pte(*shadow_pte)?"RW":"R", gfn,
1824 *shadow_pte, shadow_pte);
1825 if (!was_rmapped && is_large_pte(*shadow_pte))
05da4558
MT
1826 ++vcpu->kvm->stat.lpages;
1827
1c4f1fd6
AK
1828 page_header_update_slot(vcpu->kvm, shadow_pte, gfn);
1829 if (!was_rmapped) {
05da4558 1830 rmap_add(vcpu, shadow_pte, gfn, largepage);
1c4f1fd6 1831 if (!is_rmap_pte(*shadow_pte))
35149e21 1832 kvm_release_pfn_clean(pfn);
75e68e60
IE
1833 } else {
1834 if (was_writeble)
35149e21 1835 kvm_release_pfn_dirty(pfn);
75e68e60 1836 else
35149e21 1837 kvm_release_pfn_clean(pfn);
1c4f1fd6 1838 }
1b7fcd32 1839 if (speculative) {
ad312c7c 1840 vcpu->arch.last_pte_updated = shadow_pte;
1b7fcd32
AK
1841 vcpu->arch.last_pte_gfn = gfn;
1842 }
1c4f1fd6
AK
1843}
1844
6aa8b732
AK
1845static void nonpaging_new_cr3(struct kvm_vcpu *vcpu)
1846{
1847}
1848
140754bc
AK
1849struct direct_shadow_walk {
1850 struct kvm_shadow_walk walker;
1851 pfn_t pfn;
1852 int write;
1853 int largepage;
1854 int pt_write;
1855};
6aa8b732 1856
140754bc
AK
1857static int direct_map_entry(struct kvm_shadow_walk *_walk,
1858 struct kvm_vcpu *vcpu,
d40a1ee4 1859 u64 addr, u64 *sptep, int level)
140754bc
AK
1860{
1861 struct direct_shadow_walk *walk =
1862 container_of(_walk, struct direct_shadow_walk, walker);
1863 struct kvm_mmu_page *sp;
1864 gfn_t pseudo_gfn;
1865 gfn_t gfn = addr >> PAGE_SHIFT;
1866
1867 if (level == PT_PAGE_TABLE_LEVEL
1868 || (walk->largepage && level == PT_DIRECTORY_LEVEL)) {
1869 mmu_set_spte(vcpu, sptep, ACC_ALL, ACC_ALL,
1870 0, walk->write, 1, &walk->pt_write,
6cffe8ca 1871 walk->largepage, 0, gfn, walk->pfn, false);
bc2d4299 1872 ++vcpu->stat.pf_fixed;
140754bc
AK
1873 return 1;
1874 }
6aa8b732 1875
140754bc
AK
1876 if (*sptep == shadow_trap_nonpresent_pte) {
1877 pseudo_gfn = (addr & PT64_DIR_BASE_ADDR_MASK) >> PAGE_SHIFT;
d40a1ee4 1878 sp = kvm_mmu_get_page(vcpu, pseudo_gfn, (gva_t)addr, level - 1,
140754bc
AK
1879 1, ACC_ALL, sptep);
1880 if (!sp) {
1881 pgprintk("nonpaging_map: ENOMEM\n");
1882 kvm_release_pfn_clean(walk->pfn);
1883 return -ENOMEM;
6aa8b732
AK
1884 }
1885
140754bc
AK
1886 set_shadow_pte(sptep,
1887 __pa(sp->spt)
1888 | PT_PRESENT_MASK | PT_WRITABLE_MASK
1889 | shadow_user_mask | shadow_x_mask);
6aa8b732 1890 }
140754bc
AK
1891 return 0;
1892}
1893
1894static int __direct_map(struct kvm_vcpu *vcpu, gpa_t v, int write,
1895 int largepage, gfn_t gfn, pfn_t pfn)
1896{
1897 int r;
1898 struct direct_shadow_walk walker = {
1899 .walker = { .entry = direct_map_entry, },
1900 .pfn = pfn,
1901 .largepage = largepage,
1902 .write = write,
1903 .pt_write = 0,
1904 };
1905
d40a1ee4 1906 r = walk_shadow(&walker.walker, vcpu, gfn << PAGE_SHIFT);
140754bc
AK
1907 if (r < 0)
1908 return r;
1909 return walker.pt_write;
6aa8b732
AK
1910}
1911
10589a46
MT
1912static int nonpaging_map(struct kvm_vcpu *vcpu, gva_t v, int write, gfn_t gfn)
1913{
1914 int r;
05da4558 1915 int largepage = 0;
35149e21 1916 pfn_t pfn;
e930bffe 1917 unsigned long mmu_seq;
aaee2c94 1918
05da4558
MT
1919 if (is_largepage_backed(vcpu, gfn & ~(KVM_PAGES_PER_HPAGE-1))) {
1920 gfn &= ~(KVM_PAGES_PER_HPAGE-1);
1921 largepage = 1;
1922 }
1923
e930bffe 1924 mmu_seq = vcpu->kvm->mmu_notifier_seq;
4c2155ce 1925 smp_rmb();
35149e21 1926 pfn = gfn_to_pfn(vcpu->kvm, gfn);
aaee2c94 1927
d196e343 1928 /* mmio */
35149e21
AL
1929 if (is_error_pfn(pfn)) {
1930 kvm_release_pfn_clean(pfn);
d196e343
AK
1931 return 1;
1932 }
1933
aaee2c94 1934 spin_lock(&vcpu->kvm->mmu_lock);
e930bffe
AA
1935 if (mmu_notifier_retry(vcpu, mmu_seq))
1936 goto out_unlock;
eb787d10 1937 kvm_mmu_free_some_pages(vcpu);
6c41f428 1938 r = __direct_map(vcpu, v, write, largepage, gfn, pfn);
aaee2c94
MT
1939 spin_unlock(&vcpu->kvm->mmu_lock);
1940
aaee2c94 1941
10589a46 1942 return r;
e930bffe
AA
1943
1944out_unlock:
1945 spin_unlock(&vcpu->kvm->mmu_lock);
1946 kvm_release_pfn_clean(pfn);
1947 return 0;
10589a46
MT
1948}
1949
1950
17ac10ad
AK
1951static void mmu_free_roots(struct kvm_vcpu *vcpu)
1952{
1953 int i;
4db35314 1954 struct kvm_mmu_page *sp;
17ac10ad 1955
ad312c7c 1956 if (!VALID_PAGE(vcpu->arch.mmu.root_hpa))
7b53aa56 1957 return;
aaee2c94 1958 spin_lock(&vcpu->kvm->mmu_lock);
ad312c7c
ZX
1959 if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL) {
1960 hpa_t root = vcpu->arch.mmu.root_hpa;
17ac10ad 1961
4db35314
AK
1962 sp = page_header(root);
1963 --sp->root_count;
2e53d63a
MT
1964 if (!sp->root_count && sp->role.invalid)
1965 kvm_mmu_zap_page(vcpu->kvm, sp);
ad312c7c 1966 vcpu->arch.mmu.root_hpa = INVALID_PAGE;
aaee2c94 1967 spin_unlock(&vcpu->kvm->mmu_lock);
17ac10ad
AK
1968 return;
1969 }
17ac10ad 1970 for (i = 0; i < 4; ++i) {
ad312c7c 1971 hpa_t root = vcpu->arch.mmu.pae_root[i];
17ac10ad 1972
417726a3 1973 if (root) {
417726a3 1974 root &= PT64_BASE_ADDR_MASK;
4db35314
AK
1975 sp = page_header(root);
1976 --sp->root_count;
2e53d63a
MT
1977 if (!sp->root_count && sp->role.invalid)
1978 kvm_mmu_zap_page(vcpu->kvm, sp);
417726a3 1979 }
ad312c7c 1980 vcpu->arch.mmu.pae_root[i] = INVALID_PAGE;
17ac10ad 1981 }
aaee2c94 1982 spin_unlock(&vcpu->kvm->mmu_lock);
ad312c7c 1983 vcpu->arch.mmu.root_hpa = INVALID_PAGE;
17ac10ad
AK
1984}
1985
1986static void mmu_alloc_roots(struct kvm_vcpu *vcpu)
1987{
1988 int i;
cea0f0e7 1989 gfn_t root_gfn;
4db35314 1990 struct kvm_mmu_page *sp;
fb72d167 1991 int metaphysical = 0;
3bb65a22 1992
ad312c7c 1993 root_gfn = vcpu->arch.cr3 >> PAGE_SHIFT;
17ac10ad 1994
ad312c7c
ZX
1995 if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL) {
1996 hpa_t root = vcpu->arch.mmu.root_hpa;
17ac10ad
AK
1997
1998 ASSERT(!VALID_PAGE(root));
fb72d167
JR
1999 if (tdp_enabled)
2000 metaphysical = 1;
4db35314 2001 sp = kvm_mmu_get_page(vcpu, root_gfn, 0,
fb72d167
JR
2002 PT64_ROOT_LEVEL, metaphysical,
2003 ACC_ALL, NULL);
4db35314
AK
2004 root = __pa(sp->spt);
2005 ++sp->root_count;
ad312c7c 2006 vcpu->arch.mmu.root_hpa = root;
17ac10ad
AK
2007 return;
2008 }
fb72d167
JR
2009 metaphysical = !is_paging(vcpu);
2010 if (tdp_enabled)
2011 metaphysical = 1;
17ac10ad 2012 for (i = 0; i < 4; ++i) {
ad312c7c 2013 hpa_t root = vcpu->arch.mmu.pae_root[i];
17ac10ad
AK
2014
2015 ASSERT(!VALID_PAGE(root));
ad312c7c
ZX
2016 if (vcpu->arch.mmu.root_level == PT32E_ROOT_LEVEL) {
2017 if (!is_present_pte(vcpu->arch.pdptrs[i])) {
2018 vcpu->arch.mmu.pae_root[i] = 0;
417726a3
AK
2019 continue;
2020 }
ad312c7c
ZX
2021 root_gfn = vcpu->arch.pdptrs[i] >> PAGE_SHIFT;
2022 } else if (vcpu->arch.mmu.root_level == 0)
cea0f0e7 2023 root_gfn = 0;
4db35314 2024 sp = kvm_mmu_get_page(vcpu, root_gfn, i << 30,
fb72d167 2025 PT32_ROOT_LEVEL, metaphysical,
f7d9c7b7 2026 ACC_ALL, NULL);
4db35314
AK
2027 root = __pa(sp->spt);
2028 ++sp->root_count;
ad312c7c 2029 vcpu->arch.mmu.pae_root[i] = root | PT_PRESENT_MASK;
17ac10ad 2030 }
ad312c7c 2031 vcpu->arch.mmu.root_hpa = __pa(vcpu->arch.mmu.pae_root);
17ac10ad
AK
2032}
2033
0ba73cda
MT
2034static void mmu_sync_roots(struct kvm_vcpu *vcpu)
2035{
2036 int i;
2037 struct kvm_mmu_page *sp;
2038
2039 if (!VALID_PAGE(vcpu->arch.mmu.root_hpa))
2040 return;
2041 if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL) {
2042 hpa_t root = vcpu->arch.mmu.root_hpa;
2043 sp = page_header(root);
2044 mmu_sync_children(vcpu, sp);
2045 return;
2046 }
2047 for (i = 0; i < 4; ++i) {
2048 hpa_t root = vcpu->arch.mmu.pae_root[i];
2049
2050 if (root) {
2051 root &= PT64_BASE_ADDR_MASK;
2052 sp = page_header(root);
2053 mmu_sync_children(vcpu, sp);
2054 }
2055 }
2056}
2057
6cffe8ca
MT
2058static void mmu_sync_global(struct kvm_vcpu *vcpu)
2059{
2060 struct kvm *kvm = vcpu->kvm;
2061 struct kvm_mmu_page *sp, *n;
2062
2063 list_for_each_entry_safe(sp, n, &kvm->arch.oos_global_pages, oos_link)
2064 kvm_sync_page(vcpu, sp);
2065}
2066
0ba73cda
MT
2067void kvm_mmu_sync_roots(struct kvm_vcpu *vcpu)
2068{
2069 spin_lock(&vcpu->kvm->mmu_lock);
2070 mmu_sync_roots(vcpu);
6cffe8ca
MT
2071 spin_unlock(&vcpu->kvm->mmu_lock);
2072}
2073
2074void kvm_mmu_sync_global(struct kvm_vcpu *vcpu)
2075{
2076 spin_lock(&vcpu->kvm->mmu_lock);
2077 mmu_sync_global(vcpu);
0ba73cda
MT
2078 spin_unlock(&vcpu->kvm->mmu_lock);
2079}
2080
6aa8b732
AK
2081static gpa_t nonpaging_gva_to_gpa(struct kvm_vcpu *vcpu, gva_t vaddr)
2082{
2083 return vaddr;
2084}
2085
2086static int nonpaging_page_fault(struct kvm_vcpu *vcpu, gva_t gva,
3f3e7124 2087 u32 error_code)
6aa8b732 2088{
e833240f 2089 gfn_t gfn;
e2dec939 2090 int r;
6aa8b732 2091
b8688d51 2092 pgprintk("%s: gva %lx error %x\n", __func__, gva, error_code);
e2dec939
AK
2093 r = mmu_topup_memory_caches(vcpu);
2094 if (r)
2095 return r;
714b93da 2096
6aa8b732 2097 ASSERT(vcpu);
ad312c7c 2098 ASSERT(VALID_PAGE(vcpu->arch.mmu.root_hpa));
6aa8b732 2099
e833240f 2100 gfn = gva >> PAGE_SHIFT;
6aa8b732 2101
e833240f
AK
2102 return nonpaging_map(vcpu, gva & PAGE_MASK,
2103 error_code & PFERR_WRITE_MASK, gfn);
6aa8b732
AK
2104}
2105
fb72d167
JR
2106static int tdp_page_fault(struct kvm_vcpu *vcpu, gva_t gpa,
2107 u32 error_code)
2108{
35149e21 2109 pfn_t pfn;
fb72d167 2110 int r;
05da4558
MT
2111 int largepage = 0;
2112 gfn_t gfn = gpa >> PAGE_SHIFT;
e930bffe 2113 unsigned long mmu_seq;
fb72d167
JR
2114
2115 ASSERT(vcpu);
2116 ASSERT(VALID_PAGE(vcpu->arch.mmu.root_hpa));
2117
2118 r = mmu_topup_memory_caches(vcpu);
2119 if (r)
2120 return r;
2121
05da4558
MT
2122 if (is_largepage_backed(vcpu, gfn & ~(KVM_PAGES_PER_HPAGE-1))) {
2123 gfn &= ~(KVM_PAGES_PER_HPAGE-1);
2124 largepage = 1;
2125 }
e930bffe 2126 mmu_seq = vcpu->kvm->mmu_notifier_seq;
4c2155ce 2127 smp_rmb();
35149e21 2128 pfn = gfn_to_pfn(vcpu->kvm, gfn);
35149e21
AL
2129 if (is_error_pfn(pfn)) {
2130 kvm_release_pfn_clean(pfn);
fb72d167
JR
2131 return 1;
2132 }
2133 spin_lock(&vcpu->kvm->mmu_lock);
e930bffe
AA
2134 if (mmu_notifier_retry(vcpu, mmu_seq))
2135 goto out_unlock;
fb72d167
JR
2136 kvm_mmu_free_some_pages(vcpu);
2137 r = __direct_map(vcpu, gpa, error_code & PFERR_WRITE_MASK,
6c41f428 2138 largepage, gfn, pfn);
fb72d167 2139 spin_unlock(&vcpu->kvm->mmu_lock);
fb72d167
JR
2140
2141 return r;
e930bffe
AA
2142
2143out_unlock:
2144 spin_unlock(&vcpu->kvm->mmu_lock);
2145 kvm_release_pfn_clean(pfn);
2146 return 0;
fb72d167
JR
2147}
2148
6aa8b732
AK
2149static void nonpaging_free(struct kvm_vcpu *vcpu)
2150{
17ac10ad 2151 mmu_free_roots(vcpu);
6aa8b732
AK
2152}
2153
2154static int nonpaging_init_context(struct kvm_vcpu *vcpu)
2155{
ad312c7c 2156 struct kvm_mmu *context = &vcpu->arch.mmu;
6aa8b732
AK
2157
2158 context->new_cr3 = nonpaging_new_cr3;
2159 context->page_fault = nonpaging_page_fault;
6aa8b732
AK
2160 context->gva_to_gpa = nonpaging_gva_to_gpa;
2161 context->free = nonpaging_free;
c7addb90 2162 context->prefetch_page = nonpaging_prefetch_page;
e8bc217a 2163 context->sync_page = nonpaging_sync_page;
a7052897 2164 context->invlpg = nonpaging_invlpg;
cea0f0e7 2165 context->root_level = 0;
6aa8b732 2166 context->shadow_root_level = PT32E_ROOT_LEVEL;
17c3ba9d 2167 context->root_hpa = INVALID_PAGE;
6aa8b732
AK
2168 return 0;
2169}
2170
d835dfec 2171void kvm_mmu_flush_tlb(struct kvm_vcpu *vcpu)
6aa8b732 2172{
1165f5fe 2173 ++vcpu->stat.tlb_flush;
cbdd1bea 2174 kvm_x86_ops->tlb_flush(vcpu);
6aa8b732
AK
2175}
2176
2177static void paging_new_cr3(struct kvm_vcpu *vcpu)
2178{
b8688d51 2179 pgprintk("%s: cr3 %lx\n", __func__, vcpu->arch.cr3);
cea0f0e7 2180 mmu_free_roots(vcpu);
6aa8b732
AK
2181}
2182
6aa8b732
AK
2183static void inject_page_fault(struct kvm_vcpu *vcpu,
2184 u64 addr,
2185 u32 err_code)
2186{
c3c91fee 2187 kvm_inject_page_fault(vcpu, addr, err_code);
6aa8b732
AK
2188}
2189
6aa8b732
AK
2190static void paging_free(struct kvm_vcpu *vcpu)
2191{
2192 nonpaging_free(vcpu);
2193}
2194
2195#define PTTYPE 64
2196#include "paging_tmpl.h"
2197#undef PTTYPE
2198
2199#define PTTYPE 32
2200#include "paging_tmpl.h"
2201#undef PTTYPE
2202
17ac10ad 2203static int paging64_init_context_common(struct kvm_vcpu *vcpu, int level)
6aa8b732 2204{
ad312c7c 2205 struct kvm_mmu *context = &vcpu->arch.mmu;
6aa8b732
AK
2206
2207 ASSERT(is_pae(vcpu));
2208 context->new_cr3 = paging_new_cr3;
2209 context->page_fault = paging64_page_fault;
6aa8b732 2210 context->gva_to_gpa = paging64_gva_to_gpa;
c7addb90 2211 context->prefetch_page = paging64_prefetch_page;
e8bc217a 2212 context->sync_page = paging64_sync_page;
a7052897 2213 context->invlpg = paging64_invlpg;
6aa8b732 2214 context->free = paging_free;
17ac10ad
AK
2215 context->root_level = level;
2216 context->shadow_root_level = level;
17c3ba9d 2217 context->root_hpa = INVALID_PAGE;
6aa8b732
AK
2218 return 0;
2219}
2220
17ac10ad
AK
2221static int paging64_init_context(struct kvm_vcpu *vcpu)
2222{
2223 return paging64_init_context_common(vcpu, PT64_ROOT_LEVEL);
2224}
2225
6aa8b732
AK
2226static int paging32_init_context(struct kvm_vcpu *vcpu)
2227{
ad312c7c 2228 struct kvm_mmu *context = &vcpu->arch.mmu;
6aa8b732
AK
2229
2230 context->new_cr3 = paging_new_cr3;
2231 context->page_fault = paging32_page_fault;
6aa8b732
AK
2232 context->gva_to_gpa = paging32_gva_to_gpa;
2233 context->free = paging_free;
c7addb90 2234 context->prefetch_page = paging32_prefetch_page;
e8bc217a 2235 context->sync_page = paging32_sync_page;
a7052897 2236 context->invlpg = paging32_invlpg;
6aa8b732
AK
2237 context->root_level = PT32_ROOT_LEVEL;
2238 context->shadow_root_level = PT32E_ROOT_LEVEL;
17c3ba9d 2239 context->root_hpa = INVALID_PAGE;
6aa8b732
AK
2240 return 0;
2241}
2242
2243static int paging32E_init_context(struct kvm_vcpu *vcpu)
2244{
17ac10ad 2245 return paging64_init_context_common(vcpu, PT32E_ROOT_LEVEL);
6aa8b732
AK
2246}
2247
fb72d167
JR
2248static int init_kvm_tdp_mmu(struct kvm_vcpu *vcpu)
2249{
2250 struct kvm_mmu *context = &vcpu->arch.mmu;
2251
2252 context->new_cr3 = nonpaging_new_cr3;
2253 context->page_fault = tdp_page_fault;
2254 context->free = nonpaging_free;
2255 context->prefetch_page = nonpaging_prefetch_page;
e8bc217a 2256 context->sync_page = nonpaging_sync_page;
a7052897 2257 context->invlpg = nonpaging_invlpg;
67253af5 2258 context->shadow_root_level = kvm_x86_ops->get_tdp_level();
fb72d167
JR
2259 context->root_hpa = INVALID_PAGE;
2260
2261 if (!is_paging(vcpu)) {
2262 context->gva_to_gpa = nonpaging_gva_to_gpa;
2263 context->root_level = 0;
2264 } else if (is_long_mode(vcpu)) {
2265 context->gva_to_gpa = paging64_gva_to_gpa;
2266 context->root_level = PT64_ROOT_LEVEL;
2267 } else if (is_pae(vcpu)) {
2268 context->gva_to_gpa = paging64_gva_to_gpa;
2269 context->root_level = PT32E_ROOT_LEVEL;
2270 } else {
2271 context->gva_to_gpa = paging32_gva_to_gpa;
2272 context->root_level = PT32_ROOT_LEVEL;
2273 }
2274
2275 return 0;
2276}
2277
2278static int init_kvm_softmmu(struct kvm_vcpu *vcpu)
6aa8b732 2279{
a770f6f2
AK
2280 int r;
2281
6aa8b732 2282 ASSERT(vcpu);
ad312c7c 2283 ASSERT(!VALID_PAGE(vcpu->arch.mmu.root_hpa));
6aa8b732
AK
2284
2285 if (!is_paging(vcpu))
a770f6f2 2286 r = nonpaging_init_context(vcpu);
a9058ecd 2287 else if (is_long_mode(vcpu))
a770f6f2 2288 r = paging64_init_context(vcpu);
6aa8b732 2289 else if (is_pae(vcpu))
a770f6f2 2290 r = paging32E_init_context(vcpu);
6aa8b732 2291 else
a770f6f2
AK
2292 r = paging32_init_context(vcpu);
2293
2294 vcpu->arch.mmu.base_role.glevels = vcpu->arch.mmu.root_level;
2295
2296 return r;
6aa8b732
AK
2297}
2298
fb72d167
JR
2299static int init_kvm_mmu(struct kvm_vcpu *vcpu)
2300{
35149e21
AL
2301 vcpu->arch.update_pte.pfn = bad_pfn;
2302
fb72d167
JR
2303 if (tdp_enabled)
2304 return init_kvm_tdp_mmu(vcpu);
2305 else
2306 return init_kvm_softmmu(vcpu);
2307}
2308
6aa8b732
AK
2309static void destroy_kvm_mmu(struct kvm_vcpu *vcpu)
2310{
2311 ASSERT(vcpu);
ad312c7c
ZX
2312 if (VALID_PAGE(vcpu->arch.mmu.root_hpa)) {
2313 vcpu->arch.mmu.free(vcpu);
2314 vcpu->arch.mmu.root_hpa = INVALID_PAGE;
6aa8b732
AK
2315 }
2316}
2317
2318int kvm_mmu_reset_context(struct kvm_vcpu *vcpu)
17c3ba9d
AK
2319{
2320 destroy_kvm_mmu(vcpu);
2321 return init_kvm_mmu(vcpu);
2322}
8668a3c4 2323EXPORT_SYMBOL_GPL(kvm_mmu_reset_context);
17c3ba9d
AK
2324
2325int kvm_mmu_load(struct kvm_vcpu *vcpu)
6aa8b732 2326{
714b93da
AK
2327 int r;
2328
e2dec939 2329 r = mmu_topup_memory_caches(vcpu);
17c3ba9d
AK
2330 if (r)
2331 goto out;
aaee2c94 2332 spin_lock(&vcpu->kvm->mmu_lock);
eb787d10 2333 kvm_mmu_free_some_pages(vcpu);
17c3ba9d 2334 mmu_alloc_roots(vcpu);
0ba73cda 2335 mmu_sync_roots(vcpu);
aaee2c94 2336 spin_unlock(&vcpu->kvm->mmu_lock);
ad312c7c 2337 kvm_x86_ops->set_cr3(vcpu, vcpu->arch.mmu.root_hpa);
17c3ba9d 2338 kvm_mmu_flush_tlb(vcpu);
714b93da
AK
2339out:
2340 return r;
6aa8b732 2341}
17c3ba9d
AK
2342EXPORT_SYMBOL_GPL(kvm_mmu_load);
2343
2344void kvm_mmu_unload(struct kvm_vcpu *vcpu)
2345{
2346 mmu_free_roots(vcpu);
2347}
6aa8b732 2348
09072daf 2349static void mmu_pte_write_zap_pte(struct kvm_vcpu *vcpu,
4db35314 2350 struct kvm_mmu_page *sp,
ac1b714e
AK
2351 u64 *spte)
2352{
2353 u64 pte;
2354 struct kvm_mmu_page *child;
2355
2356 pte = *spte;
c7addb90 2357 if (is_shadow_present_pte(pte)) {
05da4558
MT
2358 if (sp->role.level == PT_PAGE_TABLE_LEVEL ||
2359 is_large_pte(pte))
290fc38d 2360 rmap_remove(vcpu->kvm, spte);
ac1b714e
AK
2361 else {
2362 child = page_header(pte & PT64_BASE_ADDR_MASK);
90cb0529 2363 mmu_page_remove_parent_pte(child, spte);
ac1b714e
AK
2364 }
2365 }
c7addb90 2366 set_shadow_pte(spte, shadow_trap_nonpresent_pte);
05da4558
MT
2367 if (is_large_pte(pte))
2368 --vcpu->kvm->stat.lpages;
ac1b714e
AK
2369}
2370
0028425f 2371static void mmu_pte_write_new_pte(struct kvm_vcpu *vcpu,
4db35314 2372 struct kvm_mmu_page *sp,
0028425f 2373 u64 *spte,
489f1d65 2374 const void *new)
0028425f 2375{
30945387
MT
2376 if (sp->role.level != PT_PAGE_TABLE_LEVEL) {
2377 if (!vcpu->arch.update_pte.largepage ||
2378 sp->role.glevels == PT32_ROOT_LEVEL) {
2379 ++vcpu->kvm->stat.mmu_pde_zapped;
2380 return;
2381 }
2382 }
0028425f 2383
4cee5764 2384 ++vcpu->kvm->stat.mmu_pte_updated;
4db35314 2385 if (sp->role.glevels == PT32_ROOT_LEVEL)
489f1d65 2386 paging32_update_pte(vcpu, sp, spte, new);
0028425f 2387 else
489f1d65 2388 paging64_update_pte(vcpu, sp, spte, new);
0028425f
AK
2389}
2390
79539cec
AK
2391static bool need_remote_flush(u64 old, u64 new)
2392{
2393 if (!is_shadow_present_pte(old))
2394 return false;
2395 if (!is_shadow_present_pte(new))
2396 return true;
2397 if ((old ^ new) & PT64_BASE_ADDR_MASK)
2398 return true;
2399 old ^= PT64_NX_MASK;
2400 new ^= PT64_NX_MASK;
2401 return (old & ~new & PT64_PERM_MASK) != 0;
2402}
2403
2404static void mmu_pte_write_flush_tlb(struct kvm_vcpu *vcpu, u64 old, u64 new)
2405{
2406 if (need_remote_flush(old, new))
2407 kvm_flush_remote_tlbs(vcpu->kvm);
2408 else
2409 kvm_mmu_flush_tlb(vcpu);
2410}
2411
12b7d28f
AK
2412static bool last_updated_pte_accessed(struct kvm_vcpu *vcpu)
2413{
ad312c7c 2414 u64 *spte = vcpu->arch.last_pte_updated;
12b7d28f 2415
7b52345e 2416 return !!(spte && (*spte & shadow_accessed_mask));
12b7d28f
AK
2417}
2418
d7824fff
AK
2419static void mmu_guess_page_from_pte_write(struct kvm_vcpu *vcpu, gpa_t gpa,
2420 const u8 *new, int bytes)
2421{
2422 gfn_t gfn;
2423 int r;
2424 u64 gpte = 0;
35149e21 2425 pfn_t pfn;
d7824fff 2426
05da4558
MT
2427 vcpu->arch.update_pte.largepage = 0;
2428
d7824fff
AK
2429 if (bytes != 4 && bytes != 8)
2430 return;
2431
2432 /*
2433 * Assume that the pte write on a page table of the same type
2434 * as the current vcpu paging mode. This is nearly always true
2435 * (might be false while changing modes). Note it is verified later
2436 * by update_pte().
2437 */
2438 if (is_pae(vcpu)) {
2439 /* Handle a 32-bit guest writing two halves of a 64-bit gpte */
2440 if ((bytes == 4) && (gpa % 4 == 0)) {
2441 r = kvm_read_guest(vcpu->kvm, gpa & ~(u64)7, &gpte, 8);
2442 if (r)
2443 return;
2444 memcpy((void *)&gpte + (gpa % 8), new, 4);
2445 } else if ((bytes == 8) && (gpa % 8 == 0)) {
2446 memcpy((void *)&gpte, new, 8);
2447 }
2448 } else {
2449 if ((bytes == 4) && (gpa % 4 == 0))
2450 memcpy((void *)&gpte, new, 4);
2451 }
2452 if (!is_present_pte(gpte))
2453 return;
2454 gfn = (gpte & PT64_BASE_ADDR_MASK) >> PAGE_SHIFT;
72dc67a6 2455
05da4558
MT
2456 if (is_large_pte(gpte) && is_largepage_backed(vcpu, gfn)) {
2457 gfn &= ~(KVM_PAGES_PER_HPAGE-1);
2458 vcpu->arch.update_pte.largepage = 1;
2459 }
e930bffe 2460 vcpu->arch.update_pte.mmu_seq = vcpu->kvm->mmu_notifier_seq;
4c2155ce 2461 smp_rmb();
35149e21 2462 pfn = gfn_to_pfn(vcpu->kvm, gfn);
72dc67a6 2463
35149e21
AL
2464 if (is_error_pfn(pfn)) {
2465 kvm_release_pfn_clean(pfn);
d196e343
AK
2466 return;
2467 }
d7824fff 2468 vcpu->arch.update_pte.gfn = gfn;
35149e21 2469 vcpu->arch.update_pte.pfn = pfn;
d7824fff
AK
2470}
2471
1b7fcd32
AK
2472static void kvm_mmu_access_page(struct kvm_vcpu *vcpu, gfn_t gfn)
2473{
2474 u64 *spte = vcpu->arch.last_pte_updated;
2475
2476 if (spte
2477 && vcpu->arch.last_pte_gfn == gfn
2478 && shadow_accessed_mask
2479 && !(*spte & shadow_accessed_mask)
2480 && is_shadow_present_pte(*spte))
2481 set_bit(PT_ACCESSED_SHIFT, (unsigned long *)spte);
2482}
2483
09072daf 2484void kvm_mmu_pte_write(struct kvm_vcpu *vcpu, gpa_t gpa,
ad218f85
MT
2485 const u8 *new, int bytes,
2486 bool guest_initiated)
da4a00f0 2487{
9b7a0325 2488 gfn_t gfn = gpa >> PAGE_SHIFT;
4db35314 2489 struct kvm_mmu_page *sp;
0e7bc4b9 2490 struct hlist_node *node, *n;
9b7a0325
AK
2491 struct hlist_head *bucket;
2492 unsigned index;
489f1d65 2493 u64 entry, gentry;
9b7a0325 2494 u64 *spte;
9b7a0325 2495 unsigned offset = offset_in_page(gpa);
0e7bc4b9 2496 unsigned pte_size;
9b7a0325 2497 unsigned page_offset;
0e7bc4b9 2498 unsigned misaligned;
fce0657f 2499 unsigned quadrant;
9b7a0325 2500 int level;
86a5ba02 2501 int flooded = 0;
ac1b714e 2502 int npte;
489f1d65 2503 int r;
9b7a0325 2504
b8688d51 2505 pgprintk("%s: gpa %llx bytes %d\n", __func__, gpa, bytes);
d7824fff 2506 mmu_guess_page_from_pte_write(vcpu, gpa, new, bytes);
aaee2c94 2507 spin_lock(&vcpu->kvm->mmu_lock);
1b7fcd32 2508 kvm_mmu_access_page(vcpu, gfn);
eb787d10 2509 kvm_mmu_free_some_pages(vcpu);
4cee5764 2510 ++vcpu->kvm->stat.mmu_pte_write;
c7addb90 2511 kvm_mmu_audit(vcpu, "pre pte write");
ad218f85
MT
2512 if (guest_initiated) {
2513 if (gfn == vcpu->arch.last_pt_write_gfn
2514 && !last_updated_pte_accessed(vcpu)) {
2515 ++vcpu->arch.last_pt_write_count;
2516 if (vcpu->arch.last_pt_write_count >= 3)
2517 flooded = 1;
2518 } else {
2519 vcpu->arch.last_pt_write_gfn = gfn;
2520 vcpu->arch.last_pt_write_count = 1;
2521 vcpu->arch.last_pte_updated = NULL;
2522 }
86a5ba02 2523 }
1ae0a13d 2524 index = kvm_page_table_hashfn(gfn);
f05e70ac 2525 bucket = &vcpu->kvm->arch.mmu_page_hash[index];
4db35314 2526 hlist_for_each_entry_safe(sp, node, n, bucket, hash_link) {
5b5c6a5a 2527 if (sp->gfn != gfn || sp->role.metaphysical || sp->role.invalid)
9b7a0325 2528 continue;
4db35314 2529 pte_size = sp->role.glevels == PT32_ROOT_LEVEL ? 4 : 8;
0e7bc4b9 2530 misaligned = (offset ^ (offset + bytes - 1)) & ~(pte_size - 1);
e925c5ba 2531 misaligned |= bytes < 4;
86a5ba02 2532 if (misaligned || flooded) {
0e7bc4b9
AK
2533 /*
2534 * Misaligned accesses are too much trouble to fix
2535 * up; also, they usually indicate a page is not used
2536 * as a page table.
86a5ba02
AK
2537 *
2538 * If we're seeing too many writes to a page,
2539 * it may no longer be a page table, or we may be
2540 * forking, in which case it is better to unmap the
2541 * page.
0e7bc4b9
AK
2542 */
2543 pgprintk("misaligned: gpa %llx bytes %d role %x\n",
4db35314 2544 gpa, bytes, sp->role.word);
07385413
MT
2545 if (kvm_mmu_zap_page(vcpu->kvm, sp))
2546 n = bucket->first;
4cee5764 2547 ++vcpu->kvm->stat.mmu_flooded;
0e7bc4b9
AK
2548 continue;
2549 }
9b7a0325 2550 page_offset = offset;
4db35314 2551 level = sp->role.level;
ac1b714e 2552 npte = 1;
4db35314 2553 if (sp->role.glevels == PT32_ROOT_LEVEL) {
ac1b714e
AK
2554 page_offset <<= 1; /* 32->64 */
2555 /*
2556 * A 32-bit pde maps 4MB while the shadow pdes map
2557 * only 2MB. So we need to double the offset again
2558 * and zap two pdes instead of one.
2559 */
2560 if (level == PT32_ROOT_LEVEL) {
6b8d0f9b 2561 page_offset &= ~7; /* kill rounding error */
ac1b714e
AK
2562 page_offset <<= 1;
2563 npte = 2;
2564 }
fce0657f 2565 quadrant = page_offset >> PAGE_SHIFT;
9b7a0325 2566 page_offset &= ~PAGE_MASK;
4db35314 2567 if (quadrant != sp->role.quadrant)
fce0657f 2568 continue;
9b7a0325 2569 }
4db35314 2570 spte = &sp->spt[page_offset / sizeof(*spte)];
489f1d65
DE
2571 if ((gpa & (pte_size - 1)) || (bytes < pte_size)) {
2572 gentry = 0;
2573 r = kvm_read_guest_atomic(vcpu->kvm,
2574 gpa & ~(u64)(pte_size - 1),
2575 &gentry, pte_size);
2576 new = (const void *)&gentry;
2577 if (r < 0)
2578 new = NULL;
2579 }
ac1b714e 2580 while (npte--) {
79539cec 2581 entry = *spte;
4db35314 2582 mmu_pte_write_zap_pte(vcpu, sp, spte);
489f1d65
DE
2583 if (new)
2584 mmu_pte_write_new_pte(vcpu, sp, spte, new);
79539cec 2585 mmu_pte_write_flush_tlb(vcpu, entry, *spte);
ac1b714e 2586 ++spte;
9b7a0325 2587 }
9b7a0325 2588 }
c7addb90 2589 kvm_mmu_audit(vcpu, "post pte write");
aaee2c94 2590 spin_unlock(&vcpu->kvm->mmu_lock);
35149e21
AL
2591 if (!is_error_pfn(vcpu->arch.update_pte.pfn)) {
2592 kvm_release_pfn_clean(vcpu->arch.update_pte.pfn);
2593 vcpu->arch.update_pte.pfn = bad_pfn;
d7824fff 2594 }
da4a00f0
AK
2595}
2596
a436036b
AK
2597int kvm_mmu_unprotect_page_virt(struct kvm_vcpu *vcpu, gva_t gva)
2598{
10589a46
MT
2599 gpa_t gpa;
2600 int r;
a436036b 2601
10589a46 2602 gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, gva);
10589a46 2603
aaee2c94 2604 spin_lock(&vcpu->kvm->mmu_lock);
10589a46 2605 r = kvm_mmu_unprotect_page(vcpu->kvm, gpa >> PAGE_SHIFT);
aaee2c94 2606 spin_unlock(&vcpu->kvm->mmu_lock);
10589a46 2607 return r;
a436036b 2608}
577bdc49 2609EXPORT_SYMBOL_GPL(kvm_mmu_unprotect_page_virt);
a436036b 2610
22d95b12 2611void __kvm_mmu_free_some_pages(struct kvm_vcpu *vcpu)
ebeace86 2612{
f05e70ac 2613 while (vcpu->kvm->arch.n_free_mmu_pages < KVM_REFILL_PAGES) {
4db35314 2614 struct kvm_mmu_page *sp;
ebeace86 2615
f05e70ac 2616 sp = container_of(vcpu->kvm->arch.active_mmu_pages.prev,
4db35314
AK
2617 struct kvm_mmu_page, link);
2618 kvm_mmu_zap_page(vcpu->kvm, sp);
4cee5764 2619 ++vcpu->kvm->stat.mmu_recycled;
ebeace86
AK
2620 }
2621}
ebeace86 2622
3067714c
AK
2623int kvm_mmu_page_fault(struct kvm_vcpu *vcpu, gva_t cr2, u32 error_code)
2624{
2625 int r;
2626 enum emulation_result er;
2627
ad312c7c 2628 r = vcpu->arch.mmu.page_fault(vcpu, cr2, error_code);
3067714c
AK
2629 if (r < 0)
2630 goto out;
2631
2632 if (!r) {
2633 r = 1;
2634 goto out;
2635 }
2636
b733bfb5
AK
2637 r = mmu_topup_memory_caches(vcpu);
2638 if (r)
2639 goto out;
2640
3067714c 2641 er = emulate_instruction(vcpu, vcpu->run, cr2, error_code, 0);
3067714c
AK
2642
2643 switch (er) {
2644 case EMULATE_DONE:
2645 return 1;
2646 case EMULATE_DO_MMIO:
2647 ++vcpu->stat.mmio_exits;
2648 return 0;
2649 case EMULATE_FAIL:
2650 kvm_report_emulation_failure(vcpu, "pagetable");
2651 return 1;
2652 default:
2653 BUG();
2654 }
2655out:
3067714c
AK
2656 return r;
2657}
2658EXPORT_SYMBOL_GPL(kvm_mmu_page_fault);
2659
a7052897
MT
2660void kvm_mmu_invlpg(struct kvm_vcpu *vcpu, gva_t gva)
2661{
a7052897 2662 vcpu->arch.mmu.invlpg(vcpu, gva);
a7052897
MT
2663 kvm_mmu_flush_tlb(vcpu);
2664 ++vcpu->stat.invlpg;
2665}
2666EXPORT_SYMBOL_GPL(kvm_mmu_invlpg);
2667
18552672
JR
2668void kvm_enable_tdp(void)
2669{
2670 tdp_enabled = true;
2671}
2672EXPORT_SYMBOL_GPL(kvm_enable_tdp);
2673
5f4cb662
JR
2674void kvm_disable_tdp(void)
2675{
2676 tdp_enabled = false;
2677}
2678EXPORT_SYMBOL_GPL(kvm_disable_tdp);
2679
6aa8b732
AK
2680static void free_mmu_pages(struct kvm_vcpu *vcpu)
2681{
4db35314 2682 struct kvm_mmu_page *sp;
6aa8b732 2683
f05e70ac
ZX
2684 while (!list_empty(&vcpu->kvm->arch.active_mmu_pages)) {
2685 sp = container_of(vcpu->kvm->arch.active_mmu_pages.next,
4db35314
AK
2686 struct kvm_mmu_page, link);
2687 kvm_mmu_zap_page(vcpu->kvm, sp);
8d2d73b9 2688 cond_resched();
f51234c2 2689 }
ad312c7c 2690 free_page((unsigned long)vcpu->arch.mmu.pae_root);
6aa8b732
AK
2691}
2692
2693static int alloc_mmu_pages(struct kvm_vcpu *vcpu)
2694{
17ac10ad 2695 struct page *page;
6aa8b732
AK
2696 int i;
2697
2698 ASSERT(vcpu);
2699
f05e70ac
ZX
2700 if (vcpu->kvm->arch.n_requested_mmu_pages)
2701 vcpu->kvm->arch.n_free_mmu_pages =
2702 vcpu->kvm->arch.n_requested_mmu_pages;
82ce2c96 2703 else
f05e70ac
ZX
2704 vcpu->kvm->arch.n_free_mmu_pages =
2705 vcpu->kvm->arch.n_alloc_mmu_pages;
17ac10ad
AK
2706 /*
2707 * When emulating 32-bit mode, cr3 is only 32 bits even on x86_64.
2708 * Therefore we need to allocate shadow page tables in the first
2709 * 4GB of memory, which happens to fit the DMA32 zone.
2710 */
2711 page = alloc_page(GFP_KERNEL | __GFP_DMA32);
2712 if (!page)
2713 goto error_1;
ad312c7c 2714 vcpu->arch.mmu.pae_root = page_address(page);
17ac10ad 2715 for (i = 0; i < 4; ++i)
ad312c7c 2716 vcpu->arch.mmu.pae_root[i] = INVALID_PAGE;
17ac10ad 2717
6aa8b732
AK
2718 return 0;
2719
2720error_1:
2721 free_mmu_pages(vcpu);
2722 return -ENOMEM;
2723}
2724
8018c27b 2725int kvm_mmu_create(struct kvm_vcpu *vcpu)
6aa8b732 2726{
6aa8b732 2727 ASSERT(vcpu);
ad312c7c 2728 ASSERT(!VALID_PAGE(vcpu->arch.mmu.root_hpa));
6aa8b732 2729
8018c27b
IM
2730 return alloc_mmu_pages(vcpu);
2731}
6aa8b732 2732
8018c27b
IM
2733int kvm_mmu_setup(struct kvm_vcpu *vcpu)
2734{
2735 ASSERT(vcpu);
ad312c7c 2736 ASSERT(!VALID_PAGE(vcpu->arch.mmu.root_hpa));
2c264957 2737
8018c27b 2738 return init_kvm_mmu(vcpu);
6aa8b732
AK
2739}
2740
2741void kvm_mmu_destroy(struct kvm_vcpu *vcpu)
2742{
2743 ASSERT(vcpu);
2744
2745 destroy_kvm_mmu(vcpu);
2746 free_mmu_pages(vcpu);
714b93da 2747 mmu_free_memory_caches(vcpu);
6aa8b732
AK
2748}
2749
90cb0529 2750void kvm_mmu_slot_remove_write_access(struct kvm *kvm, int slot)
6aa8b732 2751{
4db35314 2752 struct kvm_mmu_page *sp;
6aa8b732 2753
2245a28f 2754 spin_lock(&kvm->mmu_lock);
f05e70ac 2755 list_for_each_entry(sp, &kvm->arch.active_mmu_pages, link) {
6aa8b732
AK
2756 int i;
2757 u64 *pt;
2758
291f26bc 2759 if (!test_bit(slot, sp->slot_bitmap))
6aa8b732
AK
2760 continue;
2761
4db35314 2762 pt = sp->spt;
6aa8b732
AK
2763 for (i = 0; i < PT64_ENT_PER_PAGE; ++i)
2764 /* avoid RMW */
9647c14c 2765 if (pt[i] & PT_WRITABLE_MASK)
6aa8b732 2766 pt[i] &= ~PT_WRITABLE_MASK;
6aa8b732 2767 }
171d595d 2768 kvm_flush_remote_tlbs(kvm);
2245a28f 2769 spin_unlock(&kvm->mmu_lock);
6aa8b732 2770}
37a7d8b0 2771
90cb0529 2772void kvm_mmu_zap_all(struct kvm *kvm)
e0fa826f 2773{
4db35314 2774 struct kvm_mmu_page *sp, *node;
e0fa826f 2775
aaee2c94 2776 spin_lock(&kvm->mmu_lock);
f05e70ac 2777 list_for_each_entry_safe(sp, node, &kvm->arch.active_mmu_pages, link)
07385413
MT
2778 if (kvm_mmu_zap_page(kvm, sp))
2779 node = container_of(kvm->arch.active_mmu_pages.next,
2780 struct kvm_mmu_page, link);
aaee2c94 2781 spin_unlock(&kvm->mmu_lock);
e0fa826f 2782
90cb0529 2783 kvm_flush_remote_tlbs(kvm);
e0fa826f
DL
2784}
2785
8b2cf73c 2786static void kvm_mmu_remove_one_alloc_mmu_page(struct kvm *kvm)
3ee16c81
IE
2787{
2788 struct kvm_mmu_page *page;
2789
2790 page = container_of(kvm->arch.active_mmu_pages.prev,
2791 struct kvm_mmu_page, link);
2792 kvm_mmu_zap_page(kvm, page);
2793}
2794
2795static int mmu_shrink(int nr_to_scan, gfp_t gfp_mask)
2796{
2797 struct kvm *kvm;
2798 struct kvm *kvm_freed = NULL;
2799 int cache_count = 0;
2800
2801 spin_lock(&kvm_lock);
2802
2803 list_for_each_entry(kvm, &vm_list, vm_list) {
2804 int npages;
2805
5a4c9288
MT
2806 if (!down_read_trylock(&kvm->slots_lock))
2807 continue;
3ee16c81
IE
2808 spin_lock(&kvm->mmu_lock);
2809 npages = kvm->arch.n_alloc_mmu_pages -
2810 kvm->arch.n_free_mmu_pages;
2811 cache_count += npages;
2812 if (!kvm_freed && nr_to_scan > 0 && npages > 0) {
2813 kvm_mmu_remove_one_alloc_mmu_page(kvm);
2814 cache_count--;
2815 kvm_freed = kvm;
2816 }
2817 nr_to_scan--;
2818
2819 spin_unlock(&kvm->mmu_lock);
5a4c9288 2820 up_read(&kvm->slots_lock);
3ee16c81
IE
2821 }
2822 if (kvm_freed)
2823 list_move_tail(&kvm_freed->vm_list, &vm_list);
2824
2825 spin_unlock(&kvm_lock);
2826
2827 return cache_count;
2828}
2829
2830static struct shrinker mmu_shrinker = {
2831 .shrink = mmu_shrink,
2832 .seeks = DEFAULT_SEEKS * 10,
2833};
2834
2ddfd20e 2835static void mmu_destroy_caches(void)
b5a33a75
AK
2836{
2837 if (pte_chain_cache)
2838 kmem_cache_destroy(pte_chain_cache);
2839 if (rmap_desc_cache)
2840 kmem_cache_destroy(rmap_desc_cache);
d3d25b04
AK
2841 if (mmu_page_header_cache)
2842 kmem_cache_destroy(mmu_page_header_cache);
b5a33a75
AK
2843}
2844
3ee16c81
IE
2845void kvm_mmu_module_exit(void)
2846{
2847 mmu_destroy_caches();
2848 unregister_shrinker(&mmu_shrinker);
2849}
2850
b5a33a75
AK
2851int kvm_mmu_module_init(void)
2852{
2853 pte_chain_cache = kmem_cache_create("kvm_pte_chain",
2854 sizeof(struct kvm_pte_chain),
20c2df83 2855 0, 0, NULL);
b5a33a75
AK
2856 if (!pte_chain_cache)
2857 goto nomem;
2858 rmap_desc_cache = kmem_cache_create("kvm_rmap_desc",
2859 sizeof(struct kvm_rmap_desc),
20c2df83 2860 0, 0, NULL);
b5a33a75
AK
2861 if (!rmap_desc_cache)
2862 goto nomem;
2863
d3d25b04
AK
2864 mmu_page_header_cache = kmem_cache_create("kvm_mmu_page_header",
2865 sizeof(struct kvm_mmu_page),
20c2df83 2866 0, 0, NULL);
d3d25b04
AK
2867 if (!mmu_page_header_cache)
2868 goto nomem;
2869
3ee16c81
IE
2870 register_shrinker(&mmu_shrinker);
2871
b5a33a75
AK
2872 return 0;
2873
2874nomem:
3ee16c81 2875 mmu_destroy_caches();
b5a33a75
AK
2876 return -ENOMEM;
2877}
2878
3ad82a7e
ZX
2879/*
2880 * Caculate mmu pages needed for kvm.
2881 */
2882unsigned int kvm_mmu_calculate_mmu_pages(struct kvm *kvm)
2883{
2884 int i;
2885 unsigned int nr_mmu_pages;
2886 unsigned int nr_pages = 0;
2887
2888 for (i = 0; i < kvm->nmemslots; i++)
2889 nr_pages += kvm->memslots[i].npages;
2890
2891 nr_mmu_pages = nr_pages * KVM_PERMILLE_MMU_PAGES / 1000;
2892 nr_mmu_pages = max(nr_mmu_pages,
2893 (unsigned int) KVM_MIN_ALLOC_MMU_PAGES);
2894
2895 return nr_mmu_pages;
2896}
2897
2f333bcb
MT
2898static void *pv_mmu_peek_buffer(struct kvm_pv_mmu_op_buffer *buffer,
2899 unsigned len)
2900{
2901 if (len > buffer->len)
2902 return NULL;
2903 return buffer->ptr;
2904}
2905
2906static void *pv_mmu_read_buffer(struct kvm_pv_mmu_op_buffer *buffer,
2907 unsigned len)
2908{
2909 void *ret;
2910
2911 ret = pv_mmu_peek_buffer(buffer, len);
2912 if (!ret)
2913 return ret;
2914 buffer->ptr += len;
2915 buffer->len -= len;
2916 buffer->processed += len;
2917 return ret;
2918}
2919
2920static int kvm_pv_mmu_write(struct kvm_vcpu *vcpu,
2921 gpa_t addr, gpa_t value)
2922{
2923 int bytes = 8;
2924 int r;
2925
2926 if (!is_long_mode(vcpu) && !is_pae(vcpu))
2927 bytes = 4;
2928
2929 r = mmu_topup_memory_caches(vcpu);
2930 if (r)
2931 return r;
2932
3200f405 2933 if (!emulator_write_phys(vcpu, addr, &value, bytes))
2f333bcb
MT
2934 return -EFAULT;
2935
2936 return 1;
2937}
2938
2939static int kvm_pv_mmu_flush_tlb(struct kvm_vcpu *vcpu)
2940{
2941 kvm_x86_ops->tlb_flush(vcpu);
6ad9f15c 2942 set_bit(KVM_REQ_MMU_SYNC, &vcpu->requests);
2f333bcb
MT
2943 return 1;
2944}
2945
2946static int kvm_pv_mmu_release_pt(struct kvm_vcpu *vcpu, gpa_t addr)
2947{
2948 spin_lock(&vcpu->kvm->mmu_lock);
2949 mmu_unshadow(vcpu->kvm, addr >> PAGE_SHIFT);
2950 spin_unlock(&vcpu->kvm->mmu_lock);
2951 return 1;
2952}
2953
2954static int kvm_pv_mmu_op_one(struct kvm_vcpu *vcpu,
2955 struct kvm_pv_mmu_op_buffer *buffer)
2956{
2957 struct kvm_mmu_op_header *header;
2958
2959 header = pv_mmu_peek_buffer(buffer, sizeof *header);
2960 if (!header)
2961 return 0;
2962 switch (header->op) {
2963 case KVM_MMU_OP_WRITE_PTE: {
2964 struct kvm_mmu_op_write_pte *wpte;
2965
2966 wpte = pv_mmu_read_buffer(buffer, sizeof *wpte);
2967 if (!wpte)
2968 return 0;
2969 return kvm_pv_mmu_write(vcpu, wpte->pte_phys,
2970 wpte->pte_val);
2971 }
2972 case KVM_MMU_OP_FLUSH_TLB: {
2973 struct kvm_mmu_op_flush_tlb *ftlb;
2974
2975 ftlb = pv_mmu_read_buffer(buffer, sizeof *ftlb);
2976 if (!ftlb)
2977 return 0;
2978 return kvm_pv_mmu_flush_tlb(vcpu);
2979 }
2980 case KVM_MMU_OP_RELEASE_PT: {
2981 struct kvm_mmu_op_release_pt *rpt;
2982
2983 rpt = pv_mmu_read_buffer(buffer, sizeof *rpt);
2984 if (!rpt)
2985 return 0;
2986 return kvm_pv_mmu_release_pt(vcpu, rpt->pt_phys);
2987 }
2988 default: return 0;
2989 }
2990}
2991
2992int kvm_pv_mmu_op(struct kvm_vcpu *vcpu, unsigned long bytes,
2993 gpa_t addr, unsigned long *ret)
2994{
2995 int r;
6ad18fba 2996 struct kvm_pv_mmu_op_buffer *buffer = &vcpu->arch.mmu_op_buffer;
2f333bcb 2997
6ad18fba
DH
2998 buffer->ptr = buffer->buf;
2999 buffer->len = min_t(unsigned long, bytes, sizeof buffer->buf);
3000 buffer->processed = 0;
2f333bcb 3001
6ad18fba 3002 r = kvm_read_guest(vcpu->kvm, addr, buffer->buf, buffer->len);
2f333bcb
MT
3003 if (r)
3004 goto out;
3005
6ad18fba
DH
3006 while (buffer->len) {
3007 r = kvm_pv_mmu_op_one(vcpu, buffer);
2f333bcb
MT
3008 if (r < 0)
3009 goto out;
3010 if (r == 0)
3011 break;
3012 }
3013
3014 r = 1;
3015out:
6ad18fba 3016 *ret = buffer->processed;
2f333bcb
MT
3017 return r;
3018}
3019
37a7d8b0
AK
3020#ifdef AUDIT
3021
3022static const char *audit_msg;
3023
3024static gva_t canonicalize(gva_t gva)
3025{
3026#ifdef CONFIG_X86_64
3027 gva = (long long)(gva << 16) >> 16;
3028#endif
3029 return gva;
3030}
3031
3032static void audit_mappings_page(struct kvm_vcpu *vcpu, u64 page_pte,
3033 gva_t va, int level)
3034{
3035 u64 *pt = __va(page_pte & PT64_BASE_ADDR_MASK);
3036 int i;
3037 gva_t va_delta = 1ul << (PAGE_SHIFT + 9 * (level - 1));
3038
3039 for (i = 0; i < PT64_ENT_PER_PAGE; ++i, va += va_delta) {
3040 u64 ent = pt[i];
3041
c7addb90 3042 if (ent == shadow_trap_nonpresent_pte)
37a7d8b0
AK
3043 continue;
3044
3045 va = canonicalize(va);
c7addb90
AK
3046 if (level > 1) {
3047 if (ent == shadow_notrap_nonpresent_pte)
3048 printk(KERN_ERR "audit: (%s) nontrapping pte"
3049 " in nonleaf level: levels %d gva %lx"
3050 " level %d pte %llx\n", audit_msg,
ad312c7c 3051 vcpu->arch.mmu.root_level, va, level, ent);
c7addb90 3052
37a7d8b0 3053 audit_mappings_page(vcpu, ent, va, level - 1);
c7addb90 3054 } else {
ad312c7c 3055 gpa_t gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, va);
35149e21 3056 hpa_t hpa = (hpa_t)gpa_to_pfn(vcpu, gpa) << PAGE_SHIFT;
37a7d8b0 3057
c7addb90 3058 if (is_shadow_present_pte(ent)
37a7d8b0 3059 && (ent & PT64_BASE_ADDR_MASK) != hpa)
c7addb90
AK
3060 printk(KERN_ERR "xx audit error: (%s) levels %d"
3061 " gva %lx gpa %llx hpa %llx ent %llx %d\n",
ad312c7c 3062 audit_msg, vcpu->arch.mmu.root_level,
d77c26fc
MD
3063 va, gpa, hpa, ent,
3064 is_shadow_present_pte(ent));
c7addb90
AK
3065 else if (ent == shadow_notrap_nonpresent_pte
3066 && !is_error_hpa(hpa))
3067 printk(KERN_ERR "audit: (%s) notrap shadow,"
3068 " valid guest gva %lx\n", audit_msg, va);
35149e21 3069 kvm_release_pfn_clean(pfn);
c7addb90 3070
37a7d8b0
AK
3071 }
3072 }
3073}
3074
3075static void audit_mappings(struct kvm_vcpu *vcpu)
3076{
1ea252af 3077 unsigned i;
37a7d8b0 3078
ad312c7c
ZX
3079 if (vcpu->arch.mmu.root_level == 4)
3080 audit_mappings_page(vcpu, vcpu->arch.mmu.root_hpa, 0, 4);
37a7d8b0
AK
3081 else
3082 for (i = 0; i < 4; ++i)
ad312c7c 3083 if (vcpu->arch.mmu.pae_root[i] & PT_PRESENT_MASK)
37a7d8b0 3084 audit_mappings_page(vcpu,
ad312c7c 3085 vcpu->arch.mmu.pae_root[i],
37a7d8b0
AK
3086 i << 30,
3087 2);
3088}
3089
3090static int count_rmaps(struct kvm_vcpu *vcpu)
3091{
3092 int nmaps = 0;
3093 int i, j, k;
3094
3095 for (i = 0; i < KVM_MEMORY_SLOTS; ++i) {
3096 struct kvm_memory_slot *m = &vcpu->kvm->memslots[i];
3097 struct kvm_rmap_desc *d;
3098
3099 for (j = 0; j < m->npages; ++j) {
290fc38d 3100 unsigned long *rmapp = &m->rmap[j];
37a7d8b0 3101
290fc38d 3102 if (!*rmapp)
37a7d8b0 3103 continue;
290fc38d 3104 if (!(*rmapp & 1)) {
37a7d8b0
AK
3105 ++nmaps;
3106 continue;
3107 }
290fc38d 3108 d = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
37a7d8b0
AK
3109 while (d) {
3110 for (k = 0; k < RMAP_EXT; ++k)
3111 if (d->shadow_ptes[k])
3112 ++nmaps;
3113 else
3114 break;
3115 d = d->more;
3116 }
3117 }
3118 }
3119 return nmaps;
3120}
3121
3122static int count_writable_mappings(struct kvm_vcpu *vcpu)
3123{
3124 int nmaps = 0;
4db35314 3125 struct kvm_mmu_page *sp;
37a7d8b0
AK
3126 int i;
3127
f05e70ac 3128 list_for_each_entry(sp, &vcpu->kvm->arch.active_mmu_pages, link) {
4db35314 3129 u64 *pt = sp->spt;
37a7d8b0 3130
4db35314 3131 if (sp->role.level != PT_PAGE_TABLE_LEVEL)
37a7d8b0
AK
3132 continue;
3133
3134 for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
3135 u64 ent = pt[i];
3136
3137 if (!(ent & PT_PRESENT_MASK))
3138 continue;
3139 if (!(ent & PT_WRITABLE_MASK))
3140 continue;
3141 ++nmaps;
3142 }
3143 }
3144 return nmaps;
3145}
3146
3147static void audit_rmap(struct kvm_vcpu *vcpu)
3148{
3149 int n_rmap = count_rmaps(vcpu);
3150 int n_actual = count_writable_mappings(vcpu);
3151
3152 if (n_rmap != n_actual)
3153 printk(KERN_ERR "%s: (%s) rmap %d actual %d\n",
b8688d51 3154 __func__, audit_msg, n_rmap, n_actual);
37a7d8b0
AK
3155}
3156
3157static void audit_write_protection(struct kvm_vcpu *vcpu)
3158{
4db35314 3159 struct kvm_mmu_page *sp;
290fc38d
IE
3160 struct kvm_memory_slot *slot;
3161 unsigned long *rmapp;
3162 gfn_t gfn;
37a7d8b0 3163
f05e70ac 3164 list_for_each_entry(sp, &vcpu->kvm->arch.active_mmu_pages, link) {
4db35314 3165 if (sp->role.metaphysical)
37a7d8b0
AK
3166 continue;
3167
4db35314 3168 gfn = unalias_gfn(vcpu->kvm, sp->gfn);
2843099f 3169 slot = gfn_to_memslot_unaliased(vcpu->kvm, sp->gfn);
290fc38d
IE
3170 rmapp = &slot->rmap[gfn - slot->base_gfn];
3171 if (*rmapp)
37a7d8b0
AK
3172 printk(KERN_ERR "%s: (%s) shadow page has writable"
3173 " mappings: gfn %lx role %x\n",
b8688d51 3174 __func__, audit_msg, sp->gfn,
4db35314 3175 sp->role.word);
37a7d8b0
AK
3176 }
3177}
3178
3179static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg)
3180{
3181 int olddbg = dbg;
3182
3183 dbg = 0;
3184 audit_msg = msg;
3185 audit_rmap(vcpu);
3186 audit_write_protection(vcpu);
3187 audit_mappings(vcpu);
3188 dbg = olddbg;
3189}
3190
3191#endif
This page took 0.433348 seconds and 5 git commands to generate.