[deliverable/linux.git] / tools / testing / selftests / rseq / rseq-arm.h

/*
 * rseq-arm.h
 *
 * (C) Copyright 2016 - Mathieu Desnoyers <mathieu.desnoyers@efficios.com>
 *
 * Permission is hereby granted, free of charge, to any person obtaining a copy
 * of this software and associated documentation files (the "Software"), to deal
 * in the Software without restriction, including without limitation the rights
 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
 * copies of the Software, and to permit persons to whom the Software is
 * furnished to do so, subject to the following conditions:
 *
 * The above copyright notice and this permission notice shall be included in
 * all copies or substantial portions of the Software.
 *
 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
 * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
 * SOFTWARE.
 */

#define smp_mb()	__asm__ __volatile__ ("dmb" : : : "memory")
#define smp_rmb()	__asm__ __volatile__ ("dmb" : : : "memory")
#define smp_wmb()	__asm__ __volatile__ ("dmb" : : : "memory")

#define smp_load_acquire(p)						\
__extension__ ({							\
	__typeof(*p) ____p1 = READ_ONCE(*p);				\
	smp_mb();							\
	____p1;								\
})

#define smp_acquire__after_ctrl_dep()	smp_rmb()

#define smp_store_release(p, v)						\
do {									\
	smp_mb();							\
	WRITE_ONCE(*p, v);						\
} while (0)

#define has_fast_acquire_release()	0
#define has_single_copy_load_64()	1

/*
 * The __rseq_table section can be used by debuggers to better handle
 * single-stepping through the restartable critical sections.
 */

#define RSEQ_FINISH_ASM(_target_final, _to_write_final, _start_value, \
		_failure, _spec_store, _spec_input, \
		_final_store, _final_input, _extra_clobber, \
		_setup, _teardown, _scratch) \
do { \
	_scratch \
	__asm__ __volatile__ goto ( \
		".pushsection __rseq_table, \"aw\"\n\t" \
		".balign 32\n\t" \
		".word 1f, 0x0, 2f, 0x0, 5f, 0x0, 0x0, 0x0\n\t" \
		".popsection\n\t" \
		"1:\n\t" \
		_setup \
		RSEQ_INJECT_ASM(1) \
		"adr r0, 3f\n\t" \
		"str r0, [%[rseq_cs]]\n\t" \
		RSEQ_INJECT_ASM(2) \
		"ldr r0, %[current_event_counter]\n\t" \
		"cmp %[start_event_counter], r0\n\t" \
		"bne 5f\n\t" \
		RSEQ_INJECT_ASM(3) \
		_spec_store \
		_final_store \
		"2:\n\t" \
		RSEQ_INJECT_ASM(5) \
		_teardown \
		"b 4f\n\t" \
		".balign 32\n\t" \
		"3:\n\t" \
		".word 1b, 0x0, 2b, 0x0, 5f, 0x0, 0x0, 0x0\n\t" \
		"5:\n\t" \
		_teardown \
		"b %l[failure]\n\t" \
		"4:\n\t" \
		: /* gcc asm goto does not allow outputs */ \
		: [start_event_counter]"r"((_start_value).event_counter), \
		  [current_event_counter]"m"((_start_value).rseqp->u.e.event_counter), \
		  [rseq_cs]"r"(&(_start_value).rseqp->rseq_cs) \
		  _spec_input \
		  _final_input \
		  RSEQ_INJECT_INPUT \
		: "r0", "memory", "cc" \
		  _extra_clobber \
		  RSEQ_INJECT_CLOBBER \
		: _failure \
	); \
} while (0)

#define RSEQ_FINISH_FINAL_STORE_ASM() \
		"str %[to_write_final], [%[target_final]]\n\t"

#define RSEQ_FINISH_FINAL_STORE_RELEASE_ASM() \
		"dmb\n\t" \
		RSEQ_FINISH_FINAL_STORE_ASM()

#define RSEQ_FINISH_FINAL_STORE_INPUT(_target_final, _to_write_final) \
		, [to_write_final]"r"(_to_write_final), \
		[target_final]"r"(_target_final)

#define RSEQ_FINISH_SPECULATIVE_STORE_ASM() \
		"str %[to_write_spec], [%[target_spec]]\n\t" \
		RSEQ_INJECT_ASM(4)

#define RSEQ_FINISH_SPECULATIVE_STORE_INPUT(_target_spec, _to_write_spec) \
		, [to_write_spec]"r"(_to_write_spec), \
		[target_spec]"r"(_target_spec)

/* TODO: implement a faster memcpy. */
#define RSEQ_FINISH_MEMCPY_STORE_ASM() \
		"cmp %[len_memcpy], #0\n\t" \
		"beq 333f\n\t" \
		"222:\n\t" \
		"ldrb %%r0, [%[to_write_memcpy]]\n\t" \
		"strb %%r0, [%[target_memcpy]]\n\t" \
		"adds %[to_write_memcpy], #1\n\t" \
		"adds %[target_memcpy], #1\n\t" \
		"subs %[len_memcpy], #1\n\t" \
		"bne 222b\n\t" \
		"333:\n\t" \
		RSEQ_INJECT_ASM(4)

#define RSEQ_FINISH_MEMCPY_STORE_INPUT(_target_memcpy, _to_write_memcpy, _len_memcpy) \
		, [to_write_memcpy]"r"(_to_write_memcpy), \
		[target_memcpy]"r"(_target_memcpy), \
		[len_memcpy]"r"(_len_memcpy), \
		[rseq_scratch0]"m"(rseq_scratch[0]), \
		[rseq_scratch1]"m"(rseq_scratch[1]), \
		[rseq_scratch2]"m"(rseq_scratch[2])

/* We can use r0. */
#define RSEQ_FINISH_MEMCPY_CLOBBER()

#define RSEQ_FINISH_MEMCPY_SCRATCH() \
		uint32_t rseq_scratch[3];

/*
 * We need to save and restore those input registers so they can be
 * modified within the assembly.
 */
#define RSEQ_FINISH_MEMCPY_SETUP() \
		"str %[to_write_memcpy], %[rseq_scratch0]\n\t" \
		"str %[target_memcpy], %[rseq_scratch1]\n\t" \
		"str %[len_memcpy], %[rseq_scratch2]\n\t"

#define RSEQ_FINISH_MEMCPY_TEARDOWN() \
		"ldr %[len_memcpy], %[rseq_scratch2]\n\t" \
		"ldr %[target_memcpy], %[rseq_scratch1]\n\t" \
		"ldr %[to_write_memcpy], %[rseq_scratch0]\n\t"
Commit	Line	Data
b54c5158 MD	1	/*
	2	* rseq-arm.h
	3	*
	4	* (C) Copyright 2016 - Mathieu Desnoyers <mathieu.desnoyers@efficios.com>
	5	*
	6	* Permission is hereby granted, free of charge, to any person obtaining a copy
	7	* of this software and associated documentation files (the "Software"), to deal
	8	* in the Software without restriction, including without limitation the rights
	9	* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
	10	* copies of the Software, and to permit persons to whom the Software is
	11	* furnished to do so, subject to the following conditions:
	12	*
	13	* The above copyright notice and this permission notice shall be included in
	14	* all copies or substantial portions of the Software.
	15	*
	16	* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
	17	* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
	18	* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
	19	* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
	20	* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
	21	* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
	22	* SOFTWARE.
	23	*/
	24
	25	#define smp_mb() __asm__ __volatile__ ("dmb" : : : "memory")
	26	#define smp_rmb() __asm__ __volatile__ ("dmb" : : : "memory")
	27	#define smp_wmb() __asm__ __volatile__ ("dmb" : : : "memory")
	28
	29	#define smp_load_acquire(p) \
	30	__extension__ ({ \
	31	__typeof(p) ____p1 = READ_ONCE(p); \
	32	smp_mb(); \
	33	____p1; \
	34	})
	35
	36	#define smp_acquire__after_ctrl_dep() smp_rmb()
	37
	38	#define smp_store_release(p, v) \
	39	do { \
	40	smp_mb(); \
	41	WRITE_ONCE(*p, v); \
	42	} while (0)
	43
	44	#define has_fast_acquire_release() 0
	45	#define has_single_copy_load_64() 1
	46
	47	/*
	48	* The __rseq_table section can be used by debuggers to better handle
	49	* single-stepping through the restartable critical sections.
b54c5158 MD	50	*/
	51
	52	#define RSEQ_FINISH_ASM(_target_final, _to_write_final, _start_value, \
	53	_failure, _spec_store, _spec_input, \
	54	_final_store, _final_input, _extra_clobber, \
	55	_setup, _teardown, _scratch) \
	56	do { \
	57	_scratch \
	58	__asm__ __volatile__ goto ( \
	59	".pushsection __rseq_table, \"aw\"\n\t" \
	60	".balign 32\n\t" \
	61	".word 1f, 0x0, 2f, 0x0, 5f, 0x0, 0x0, 0x0\n\t" \
	62	".popsection\n\t" \
	63	"1:\n\t" \
	64	_setup \
	65	RSEQ_INJECT_ASM(1) \
	66	"adr r0, 3f\n\t" \
	67	"str r0, [%[rseq_cs]]\n\t" \
	68	RSEQ_INJECT_ASM(2) \
	69	"ldr r0, %[current_event_counter]\n\t" \
b54c5158 MD	70	"cmp %[start_event_counter], r0\n\t" \
	71	"bne 5f\n\t" \
	72	RSEQ_INJECT_ASM(3) \
	73	_spec_store \
	74	_final_store \
	75	"2:\n\t" \
	76	RSEQ_INJECT_ASM(5) \
b54c5158 MD	77	_teardown \
	78	"b 4f\n\t" \
	79	".balign 32\n\t" \
	80	"3:\n\t" \
	81	".word 1b, 0x0, 2b, 0x0, 5f, 0x0, 0x0, 0x0\n\t" \
	82	"5:\n\t" \
b54c5158	83	_teardown \
4c52e7c4	84	"b %l[failure]\n\t" \
b54c5158 MD	85	"4:\n\t" \
	86	: /* gcc asm goto does not allow outputs */ \
	87	: [start_event_counter]"r"((_start_value).event_counter), \
	88	[current_event_counter]"m"((_start_value).rseqp->u.e.event_counter), \
	89	[rseq_cs]"r"(&(_start_value).rseqp->rseq_cs) \
	90	_spec_input \
	91	_final_input \
	92	RSEQ_INJECT_INPUT \
06f70f3d	93	: "r0", "memory", "cc" \
b54c5158 MD	94	_extra_clobber \
	95	RSEQ_INJECT_CLOBBER \
	96	: _failure \
	97	); \
	98	} while (0)
	99
	100	#define RSEQ_FINISH_FINAL_STORE_ASM() \
	101	"str %[to_write_final], [%[target_final]]\n\t"
	102
	103	#define RSEQ_FINISH_FINAL_STORE_RELEASE_ASM() \
	104	"dmb\n\t" \
	105	RSEQ_FINISH_FINAL_STORE_ASM()
	106
	107	#define RSEQ_FINISH_FINAL_STORE_INPUT(_target_final, _to_write_final) \
	108	, [to_write_final]"r"(_to_write_final), \
	109	[target_final]"r"(_target_final)
	110
	111	#define RSEQ_FINISH_SPECULATIVE_STORE_ASM() \
	112	"str %[to_write_spec], [%[target_spec]]\n\t" \
	113	RSEQ_INJECT_ASM(4)
	114
	115	#define RSEQ_FINISH_SPECULATIVE_STORE_INPUT(_target_spec, _to_write_spec) \
	116	, [to_write_spec]"r"(_to_write_spec), \
	117	[target_spec]"r"(_target_spec)
	118
	119	/* TODO: implement a faster memcpy. */
	120	#define RSEQ_FINISH_MEMCPY_STORE_ASM() \
	121	"cmp %[len_memcpy], #0\n\t" \
	122	"beq 333f\n\t" \
	123	"222:\n\t" \
	124	"ldrb %%r0, [%[to_write_memcpy]]\n\t" \
	125	"strb %%r0, [%[target_memcpy]]\n\t" \
	126	"adds %[to_write_memcpy], #1\n\t" \
	127	"adds %[target_memcpy], #1\n\t" \
	128	"subs %[len_memcpy], #1\n\t" \
	129	"bne 222b\n\t" \
	130	"333:\n\t" \
	131	RSEQ_INJECT_ASM(4)
	132
	133	#define RSEQ_FINISH_MEMCPY_STORE_INPUT(_target_memcpy, _to_write_memcpy, _len_memcpy) \
	134	, [to_write_memcpy]"r"(_to_write_memcpy), \
	135	[target_memcpy]"r"(_target_memcpy), \
	136	[len_memcpy]"r"(_len_memcpy), \
	137	[rseq_scratch0]"m"(rseq_scratch[0]), \
	138	[rseq_scratch1]"m"(rseq_scratch[1]), \
	139	[rseq_scratch2]"m"(rseq_scratch[2])
	140
	141	/* We can use r0. */
	142	#define RSEQ_FINISH_MEMCPY_CLOBBER()
	143
	144	#define RSEQ_FINISH_MEMCPY_SCRATCH() \
	145	uint32_t rseq_scratch[3];
	146
	147	/*
	148	* We need to save and restore those input registers so they can be
	149	* modified within the assembly.
	150	*/
	151	#define RSEQ_FINISH_MEMCPY_SETUP() \
	152	"str %[to_write_memcpy], %[rseq_scratch0]\n\t" \
	153	"str %[target_memcpy], %[rseq_scratch1]\n\t" \
	154	"str %[len_memcpy], %[rseq_scratch2]\n\t"
	155
	156	#define RSEQ_FINISH_MEMCPY_TEARDOWN() \
	157	"ldr %[len_memcpy], %[rseq_scratch2]\n\t" \
158	"ldr %[target_memcpy], %[rseq_scratch1]\n\t" \
159	"ldr %[to_write_memcpy], %[rseq_scratch0]\n\t"