KVM: x86: flush TLB when D bit is manually changed.
authorKai Huang <kai.huang@linux.intel.com>
Fri, 9 Jan 2015 08:44:30 +0000 (16:44 +0800)
committerPaolo Bonzini <pbonzini@redhat.com>
Fri, 9 Jan 2015 09:23:55 +0000 (10:23 +0100)
commit7e71a59b250330fd52ee7293eb9d31952f16682e
tree65d42aee4577a6ff7ae14ecf02816b20c532fc3f
parentdefcf51fa93929bd5d3ce5b91f8e6a106dae5e46
KVM: x86: flush TLB when D bit is manually changed.

When software changes D bit (either from 1 to 0, or 0 to 1), the
corresponding TLB entity in the hardware won't be updated immediately. We
should flush it to guarantee the consistence of D bit between TLB and
MMU page table in memory.  This is especially important when clearing
the D bit, since it may cause false negatives in reporting dirtiness.

Sanity test was done on my machine with Intel processor.

Signed-off-by: Kai Huang <kai.huang@linux.intel.com>
[Check A bit too. - Paolo]
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
arch/x86/kvm/mmu.c
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