Commit | Line | Data |
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53d02858 TV |
1 | #include <dt-bindings/input/input.h> |
2 | #include "tegra124.dtsi" | |
3 | ||
4 | / { | |
5 | aliases { | |
b5896f67 MZ |
6 | rtc0 = "/i2c@7000d000/pmic@40"; |
7 | rtc1 = "/rtc@7000e000"; | |
53d02858 TV |
8 | serial0 = &uarta; |
9 | }; | |
10 | ||
f5bbb327 JH |
11 | chosen { |
12 | stdout-path = "serial0:115200n8"; | |
13 | }; | |
14 | ||
53d02858 TV |
15 | memory { |
16 | reg = <0x0 0x80000000 0x0 0x80000000>; | |
17 | }; | |
18 | ||
b5896f67 MZ |
19 | host1x@50000000 { |
20 | hdmi@54280000 { | |
53d02858 TV |
21 | status = "okay"; |
22 | ||
23 | vdd-supply = <&vdd_3v3_hdmi>; | |
24 | pll-supply = <&vdd_hdmi_pll>; | |
25 | hdmi-supply = <&vdd_5v0_hdmi>; | |
26 | ||
27 | nvidia,ddc-i2c-bus = <&hdmi_ddc>; | |
28 | nvidia,hpd-gpio = | |
29 | <&gpio TEGRA_GPIO(N, 7) GPIO_ACTIVE_HIGH>; | |
30 | }; | |
31 | ||
b5896f67 | 32 | sor@54540000 { |
53d02858 TV |
33 | status = "okay"; |
34 | ||
35 | nvidia,dpaux = <&dpaux>; | |
36 | nvidia,panel = <&panel>; | |
37 | }; | |
38 | ||
b5896f67 | 39 | dpaux@545c0000 { |
53d02858 TV |
40 | vdd-supply = <&vdd_3v3_panel>; |
41 | status = "okay"; | |
42 | }; | |
43 | }; | |
44 | ||
b5896f67 | 45 | serial@70006000 { |
53d02858 TV |
46 | /* Debug connector on the bottom of the board near SD card. */ |
47 | status = "okay"; | |
48 | }; | |
49 | ||
b5896f67 | 50 | pwm@7000a000 { |
53d02858 TV |
51 | status = "okay"; |
52 | }; | |
53 | ||
b5896f67 | 54 | i2c@7000c000 { |
53d02858 TV |
55 | status = "okay"; |
56 | clock-frequency = <100000>; | |
57 | ||
58 | acodec: audio-codec@10 { | |
59 | compatible = "maxim,max98090"; | |
60 | reg = <0x10>; | |
61 | interrupt-parent = <&gpio>; | |
62 | interrupts = <TEGRA_GPIO(H, 4) GPIO_ACTIVE_HIGH>; | |
63 | }; | |
64 | ||
65 | temperature-sensor@4c { | |
66 | compatible = "ti,tmp451"; | |
67 | reg = <0x4c>; | |
68 | interrupt-parent = <&gpio>; | |
69 | interrupts = <TEGRA_GPIO(I, 6) IRQ_TYPE_LEVEL_LOW>; | |
70 | ||
71 | #thermal-sensor-cells = <1>; | |
72 | }; | |
73 | }; | |
74 | ||
b5896f67 | 75 | i2c@7000c400 { |
53d02858 TV |
76 | status = "okay"; |
77 | clock-frequency = <100000>; | |
a0b9c1cb TV |
78 | |
79 | trackpad@15 { | |
80 | compatible = "elan,ekth3000"; | |
81 | reg = <0x15>; | |
82 | interrupt-parent = <&gpio>; | |
83 | interrupts = <TEGRA_GPIO(W, 3) IRQ_TYPE_EDGE_FALLING>; | |
84 | wakeup-source; | |
85 | }; | |
53d02858 TV |
86 | }; |
87 | ||
b5896f67 | 88 | i2c@7000c500 { |
53d02858 TV |
89 | status = "okay"; |
90 | clock-frequency = <400000>; | |
91 | ||
92 | tpm@20 { | |
93 | compatible = "infineon,slb9645tt"; | |
94 | reg = <0x20>; | |
95 | }; | |
96 | }; | |
97 | ||
b5896f67 | 98 | hdmi_ddc: i2c@7000c700 { |
53d02858 TV |
99 | status = "okay"; |
100 | clock-frequency = <100000>; | |
101 | }; | |
102 | ||
b5896f67 | 103 | i2c@7000d000 { |
53d02858 TV |
104 | status = "okay"; |
105 | clock-frequency = <400000>; | |
106 | ||
107 | pmic: pmic@40 { | |
108 | compatible = "ams,as3722"; | |
109 | reg = <0x40>; | |
110 | interrupts = <0 86 IRQ_TYPE_LEVEL_HIGH>; | |
111 | ||
112 | ams,system-power-controller; | |
113 | ||
114 | #interrupt-cells = <2>; | |
115 | interrupt-controller; | |
116 | ||
117 | gpio-controller; | |
118 | #gpio-cells = <2>; | |
119 | ||
120 | pinctrl-names = "default"; | |
121 | pinctrl-0 = <&as3722_default>; | |
122 | ||
123 | as3722_default: pinmux { | |
124 | gpio0 { | |
125 | pins = "gpio0"; | |
126 | function = "gpio"; | |
127 | bias-pull-down; | |
128 | }; | |
129 | ||
130 | gpio1 { | |
131 | pins = "gpio1"; | |
132 | function = "gpio"; | |
133 | bias-pull-up; | |
134 | }; | |
135 | ||
136 | gpio2_4_7 { | |
137 | pins = "gpio2", "gpio4", "gpio7"; | |
138 | function = "gpio"; | |
139 | bias-pull-up; | |
140 | }; | |
141 | ||
142 | gpio3_6 { | |
143 | pins = "gpio3", "gpio6"; | |
144 | bias-high-impedance; | |
145 | }; | |
146 | ||
147 | gpio5 { | |
148 | pins = "gpio5"; | |
149 | function = "clk32k-out"; | |
150 | bias-pull-down; | |
151 | }; | |
152 | }; | |
153 | ||
154 | regulators { | |
155 | vsup-sd2-supply = <&vdd_5v0_sys>; | |
156 | vsup-sd3-supply = <&vdd_5v0_sys>; | |
157 | vsup-sd4-supply = <&vdd_5v0_sys>; | |
158 | vsup-sd5-supply = <&vdd_5v0_sys>; | |
159 | vin-ldo0-supply = <&vdd_1v35_lp0>; | |
160 | vin-ldo1-6-supply = <&vdd_3v3_run>; | |
161 | vin-ldo2-5-7-supply = <&vddio_1v8>; | |
162 | vin-ldo3-4-supply = <&vdd_3v3_sys>; | |
163 | vin-ldo9-10-supply = <&vdd_5v0_sys>; | |
164 | vin-ldo11-supply = <&vdd_3v3_run>; | |
165 | ||
9a0baee9 | 166 | vdd_cpu: sd0 { |
53d02858 TV |
167 | regulator-name = "+VDD_CPU_AP"; |
168 | regulator-min-microvolt = <700000>; | |
169 | regulator-max-microvolt = <1350000>; | |
170 | regulator-min-microamp = <3500000>; | |
171 | regulator-max-microamp = <3500000>; | |
172 | regulator-always-on; | |
173 | regulator-boot-on; | |
174 | ams,ext-control = <2>; | |
175 | }; | |
176 | ||
177 | sd1 { | |
178 | regulator-name = "+VDD_CORE"; | |
179 | regulator-min-microvolt = <700000>; | |
180 | regulator-max-microvolt = <1350000>; | |
181 | regulator-min-microamp = <2500000>; | |
182 | regulator-max-microamp = <4000000>; | |
183 | regulator-always-on; | |
184 | regulator-boot-on; | |
185 | ams,ext-control = <1>; | |
186 | }; | |
187 | ||
188 | vdd_1v35_lp0: sd2 { | |
189 | regulator-name = "+1.35V_LP0(sd2)"; | |
190 | regulator-min-microvolt = <1350000>; | |
191 | regulator-max-microvolt = <1350000>; | |
192 | regulator-always-on; | |
193 | regulator-boot-on; | |
194 | }; | |
195 | ||
196 | sd3 { | |
197 | regulator-name = "+1.35V_LP0(sd3)"; | |
198 | regulator-min-microvolt = <1350000>; | |
199 | regulator-max-microvolt = <1350000>; | |
200 | regulator-always-on; | |
201 | regulator-boot-on; | |
202 | }; | |
203 | ||
204 | vdd_1v05_run: sd4 { | |
205 | regulator-name = "+1.05V_RUN"; | |
206 | regulator-min-microvolt = <1050000>; | |
207 | regulator-max-microvolt = <1050000>; | |
208 | }; | |
209 | ||
210 | vddio_1v8: sd5 { | |
211 | regulator-name = "+1.8V_VDDIO"; | |
212 | regulator-min-microvolt = <1800000>; | |
213 | regulator-max-microvolt = <1800000>; | |
53d02858 TV |
214 | regulator-always-on; |
215 | }; | |
216 | ||
217 | sd6 { | |
218 | regulator-name = "+VDD_GPU_AP"; | |
219 | regulator-min-microvolt = <650000>; | |
220 | regulator-max-microvolt = <1200000>; | |
221 | regulator-min-microamp = <3500000>; | |
222 | regulator-max-microamp = <3500000>; | |
223 | regulator-boot-on; | |
224 | regulator-always-on; | |
225 | }; | |
226 | ||
1333ce4d | 227 | avdd_1v05_run: ldo0 { |
53d02858 TV |
228 | regulator-name = "+1.05V_RUN_AVDD"; |
229 | regulator-min-microvolt = <1050000>; | |
230 | regulator-max-microvolt = <1050000>; | |
231 | regulator-boot-on; | |
232 | regulator-always-on; | |
233 | ams,ext-control = <1>; | |
234 | }; | |
235 | ||
236 | ldo1 { | |
237 | regulator-name = "+1.8V_RUN_CAM"; | |
238 | regulator-min-microvolt = <1800000>; | |
239 | regulator-max-microvolt = <1800000>; | |
240 | }; | |
241 | ||
242 | ldo2 { | |
243 | regulator-name = "+1.2V_GEN_AVDD"; | |
244 | regulator-min-microvolt = <1200000>; | |
245 | regulator-max-microvolt = <1200000>; | |
246 | regulator-boot-on; | |
247 | regulator-always-on; | |
248 | }; | |
249 | ||
250 | ldo3 { | |
251 | regulator-name = "+1.00V_LP0_VDD_RTC"; | |
252 | regulator-min-microvolt = <1000000>; | |
253 | regulator-max-microvolt = <1000000>; | |
254 | regulator-boot-on; | |
255 | regulator-always-on; | |
256 | ams,enable-tracking; | |
257 | }; | |
258 | ||
259 | vdd_run_cam: ldo4 { | |
260 | regulator-name = "+3.3V_RUN_CAM"; | |
261 | regulator-min-microvolt = <2800000>; | |
262 | regulator-max-microvolt = <2800000>; | |
263 | }; | |
264 | ||
265 | ldo5 { | |
266 | regulator-name = "+1.2V_RUN_CAM_FRONT"; | |
267 | regulator-min-microvolt = <1200000>; | |
268 | regulator-max-microvolt = <1200000>; | |
269 | }; | |
270 | ||
271 | vddio_sdmmc3: ldo6 { | |
272 | regulator-name = "+VDDIO_SDMMC3"; | |
273 | regulator-min-microvolt = <1800000>; | |
274 | regulator-max-microvolt = <3300000>; | |
275 | }; | |
276 | ||
277 | ldo7 { | |
278 | regulator-name = "+1.05V_RUN_CAM_REAR"; | |
279 | regulator-min-microvolt = <1050000>; | |
280 | regulator-max-microvolt = <1050000>; | |
281 | }; | |
282 | ||
283 | ldo9 { | |
284 | regulator-name = "+2.8V_RUN_TOUCH"; | |
285 | regulator-min-microvolt = <2800000>; | |
286 | regulator-max-microvolt = <2800000>; | |
287 | }; | |
288 | ||
289 | ldo10 { | |
290 | regulator-name = "+2.8V_RUN_CAM_AF"; | |
291 | regulator-min-microvolt = <2800000>; | |
292 | regulator-max-microvolt = <2800000>; | |
293 | }; | |
294 | ||
295 | ldo11 { | |
296 | regulator-name = "+1.8V_RUN_VPP_FUSE"; | |
297 | regulator-min-microvolt = <1800000>; | |
298 | regulator-max-microvolt = <1800000>; | |
299 | }; | |
300 | }; | |
301 | }; | |
302 | }; | |
303 | ||
b5896f67 | 304 | spi@7000d400 { |
53d02858 TV |
305 | status = "okay"; |
306 | ||
307 | cros_ec: cros-ec@0 { | |
308 | compatible = "google,cros-ec-spi"; | |
309 | spi-max-frequency = <3000000>; | |
310 | interrupt-parent = <&gpio>; | |
311 | interrupts = <TEGRA_GPIO(C, 7) IRQ_TYPE_LEVEL_LOW>; | |
312 | reg = <0>; | |
313 | ||
314 | google,cros-ec-spi-msg-delay = <2000>; | |
315 | ||
316 | i2c-tunnel { | |
317 | compatible = "google,cros-ec-i2c-tunnel"; | |
318 | #address-cells = <1>; | |
319 | #size-cells = <0>; | |
320 | ||
321 | google,remote-bus = <0>; | |
322 | ||
323 | charger: bq24735@9 { | |
324 | compatible = "ti,bq24735"; | |
325 | reg = <0x9>; | |
326 | interrupt-parent = <&gpio>; | |
327 | interrupts = <TEGRA_GPIO(J, 0) | |
328 | GPIO_ACTIVE_HIGH>; | |
329 | ti,ac-detect-gpios = <&gpio | |
330 | TEGRA_GPIO(J, 0) | |
331 | GPIO_ACTIVE_HIGH>; | |
332 | }; | |
333 | ||
334 | battery: sbs-battery@b { | |
335 | compatible = "sbs,sbs-battery"; | |
336 | reg = <0xb>; | |
337 | sbs,i2c-retry-count = <2>; | |
338 | sbs,poll-retry-count = <10>; | |
339 | power-supplies = <&charger>; | |
340 | }; | |
341 | }; | |
342 | }; | |
343 | }; | |
344 | ||
b5896f67 | 345 | spi@7000da00 { |
53d02858 TV |
346 | status = "okay"; |
347 | spi-max-frequency = <25000000>; | |
348 | ||
349 | flash@0 { | |
350 | compatible = "winbond,w25q32dw"; | |
97e147e8 | 351 | spi-max-frequency = <25000000>; |
53d02858 TV |
352 | reg = <0>; |
353 | }; | |
354 | }; | |
355 | ||
b5896f67 | 356 | pmc@7000e400 { |
53d02858 TV |
357 | nvidia,invert-interrupt; |
358 | nvidia,suspend-mode = <0>; | |
359 | nvidia,cpu-pwr-good-time = <500>; | |
360 | nvidia,cpu-pwr-off-time = <300>; | |
361 | nvidia,core-pwr-good-time = <641 3845>; | |
362 | nvidia,core-pwr-off-time = <61036>; | |
363 | nvidia,core-power-req-active-high; | |
364 | nvidia,sys-clock-req-active-high; | |
365 | }; | |
366 | ||
b5896f67 | 367 | hda@70030000 { |
53d02858 TV |
368 | status = "okay"; |
369 | }; | |
370 | ||
b5896f67 MZ |
371 | usb@70090000 { |
372 | phys = <&{/padctl@7009f000/pads/usb2/lanes/usb2-0}>, /* 1st USB A */ | |
373 | <&{/padctl@7009f000/pads/usb2/lanes/usb2-1}>, /* Internal USB */ | |
374 | <&{/padctl@7009f000/pads/usb2/lanes/usb2-2}>, /* 2nd USB A */ | |
375 | <&{/padctl@7009f000/pads/pcie/lanes/pcie-0}>, /* 1st USB A */ | |
376 | <&{/padctl@7009f000/pads/pcie/lanes/pcie-1}>; /* 2nd USB A */ | |
1333ce4d TR |
377 | phy-names = "usb2-0", "usb2-1", "usb2-2", "usb3-0", "usb3-1"; |
378 | ||
379 | avddio-pex-supply = <&vdd_1v05_run>; | |
380 | dvddio-pex-supply = <&vdd_1v05_run>; | |
381 | avdd-usb-supply = <&vdd_3v3_lp0>; | |
382 | avdd-pll-utmip-supply = <&vddio_1v8>; | |
383 | avdd-pll-erefe-supply = <&avdd_1v05_run>; | |
384 | avdd-usb-ss-pll-supply = <&vdd_1v05_run>; | |
385 | hvdd-usb-ss-supply = <&vdd_3v3_lp0>; | |
386 | hvdd-usb-ss-pll-e-supply = <&vdd_3v3_lp0>; | |
387 | ||
388 | status = "okay"; | |
389 | }; | |
390 | ||
b5896f67 | 391 | padctl@7009f000 { |
1333ce4d TR |
392 | status = "okay"; |
393 | ||
394 | pads { | |
395 | usb2 { | |
396 | status = "okay"; | |
397 | ||
398 | lanes { | |
399 | usb2-0 { | |
400 | nvidia,function = "xusb"; | |
401 | status = "okay"; | |
402 | }; | |
403 | ||
404 | usb2-1 { | |
405 | nvidia,function = "xusb"; | |
406 | status = "okay"; | |
407 | }; | |
408 | ||
409 | usb2-2 { | |
410 | nvidia,function = "xusb"; | |
411 | status = "okay"; | |
412 | }; | |
413 | }; | |
414 | }; | |
415 | ||
416 | pcie { | |
417 | status = "okay"; | |
418 | ||
419 | lanes { | |
420 | pcie-0 { | |
421 | nvidia,function = "usb3-ss"; | |
422 | status = "okay"; | |
423 | }; | |
424 | ||
425 | pcie-1 { | |
426 | nvidia,function = "usb3-ss"; | |
427 | status = "okay"; | |
428 | }; | |
429 | }; | |
430 | }; | |
431 | }; | |
432 | ||
433 | ports { | |
434 | usb2-0 { | |
435 | vbus-supply = <&vdd_usb1_vbus>; | |
436 | status = "okay"; | |
437 | mode = "otg"; | |
438 | }; | |
439 | ||
440 | usb2-1 { | |
441 | vbus-supply = <&vdd_run_cam>; | |
442 | status = "okay"; | |
443 | mode = "host"; | |
444 | }; | |
445 | ||
446 | usb2-2 { | |
447 | vbus-supply = <&vdd_usb3_vbus>; | |
448 | status = "okay"; | |
449 | mode = "host"; | |
450 | }; | |
451 | ||
452 | usb3-0 { | |
453 | nvidia,usb2-companion = <0>; | |
454 | status = "okay"; | |
455 | }; | |
456 | ||
457 | usb3-1 { | |
458 | nvidia,usb2-companion = <1>; | |
459 | status = "okay"; | |
460 | }; | |
461 | }; | |
462 | }; | |
463 | ||
1d1690b8 TV |
464 | sdhci0_pwrseq: sdhci0_pwrseq { |
465 | compatible = "mmc-pwrseq-simple"; | |
466 | ||
467 | reset-gpios = <&gpio TEGRA_GPIO(X, 7) GPIO_ACTIVE_LOW>; | |
468 | }; | |
469 | ||
b5896f67 | 470 | sdhci@700b0000 { /* WiFi/BT on this bus */ |
53d02858 | 471 | status = "okay"; |
53d02858 TV |
472 | bus-width = <4>; |
473 | no-1-8-v; | |
474 | non-removable; | |
1d1690b8 TV |
475 | mmc-pwrseq = <&sdhci0_pwrseq>; |
476 | vmmc-supply = <&vdd_3v3_lp0>; | |
477 | vqmmc-supply = <&vddio_1v8>; | |
160b2dd7 | 478 | keep-power-in-suspend; |
53d02858 TV |
479 | }; |
480 | ||
b5896f67 | 481 | sdhci@700b0400 { /* SD Card on this bus */ |
53d02858 TV |
482 | status = "okay"; |
483 | cd-gpios = <&gpio TEGRA_GPIO(V, 2) GPIO_ACTIVE_LOW>; | |
484 | power-gpios = <&gpio TEGRA_GPIO(R, 0) GPIO_ACTIVE_HIGH>; | |
485 | bus-width = <4>; | |
486 | no-1-8-v; | |
487 | vqmmc-supply = <&vddio_sdmmc3>; | |
488 | }; | |
489 | ||
b5896f67 | 490 | sdhci@700b0600 { /* eMMC on this bus */ |
53d02858 TV |
491 | status = "okay"; |
492 | bus-width = <8>; | |
493 | no-1-8-v; | |
494 | non-removable; | |
495 | }; | |
496 | ||
9a0baee9 | 497 | /* CPU DFLL clock */ |
b5896f67 | 498 | clock@70110000 { |
80373d37 | 499 | status = "disabled"; |
9a0baee9 JH |
500 | vdd-cpu-supply = <&vdd_cpu>; |
501 | nvidia,i2c-fs-rate = <400000>; | |
502 | }; | |
503 | ||
b5896f67 MZ |
504 | ahub@70300000 { |
505 | i2s@70301100 { | |
53d02858 TV |
506 | status = "okay"; |
507 | }; | |
508 | }; | |
509 | ||
53d02858 TV |
510 | backlight: backlight { |
511 | compatible = "pwm-backlight"; | |
512 | ||
513 | enable-gpios = <&gpio TEGRA_GPIO(H, 2) GPIO_ACTIVE_HIGH>; | |
514 | power-supply = <&vdd_led>; | |
515 | pwms = <&pwm 1 1000000>; | |
516 | ||
517 | default-brightness-level = <224>; | |
518 | brightness-levels = | |
519 | < 0 1 2 3 4 5 6 7 | |
520 | 8 9 10 11 12 13 14 15 | |
521 | 16 17 18 19 20 21 22 23 | |
522 | 24 25 26 27 28 29 30 31 | |
523 | 32 33 34 35 36 37 38 39 | |
524 | 40 41 42 43 44 45 46 47 | |
525 | 48 49 50 51 52 53 54 55 | |
526 | 56 57 58 59 60 61 62 63 | |
527 | 64 65 66 67 68 69 70 71 | |
528 | 72 73 74 75 76 77 78 79 | |
529 | 80 81 82 83 84 85 86 87 | |
530 | 88 89 90 91 92 93 94 95 | |
531 | 96 97 98 99 100 101 102 103 | |
532 | 104 105 106 107 108 109 110 111 | |
533 | 112 113 114 115 116 117 118 119 | |
534 | 120 121 122 123 124 125 126 127 | |
535 | 128 129 130 131 132 133 134 135 | |
536 | 136 137 138 139 140 141 142 143 | |
537 | 144 145 146 147 148 149 150 151 | |
538 | 152 153 154 155 156 157 158 159 | |
539 | 160 161 162 163 164 165 166 167 | |
540 | 168 169 170 171 172 173 174 175 | |
541 | 176 177 178 179 180 181 182 183 | |
542 | 184 185 186 187 188 189 190 191 | |
543 | 192 193 194 195 196 197 198 199 | |
544 | 200 201 202 203 204 205 206 207 | |
545 | 208 209 210 211 212 213 214 215 | |
546 | 216 217 218 219 220 221 222 223 | |
547 | 224 225 226 227 228 229 230 231 | |
548 | 232 233 234 235 236 237 238 239 | |
549 | 240 241 242 243 244 245 246 247 | |
550 | 248 249 250 251 252 253 254 255 | |
551 | 256>; | |
552 | }; | |
553 | ||
554 | clocks { | |
555 | compatible = "simple-bus"; | |
556 | #address-cells = <1>; | |
557 | #size-cells = <0>; | |
558 | ||
559 | clk32k_in: clock@0 { | |
560 | compatible = "fixed-clock"; | |
561 | reg = <0>; | |
562 | #clock-cells = <0>; | |
563 | clock-frequency = <32768>; | |
564 | }; | |
565 | }; | |
566 | ||
9a0baee9 JH |
567 | cpus { |
568 | cpu@0 { | |
569 | vdd-cpu-supply = <&vdd_cpu>; | |
570 | }; | |
571 | }; | |
572 | ||
53d02858 TV |
573 | gpio-keys { |
574 | compatible = "gpio-keys"; | |
575 | ||
576 | lid { | |
577 | label = "Lid"; | |
578 | gpios = <&gpio TEGRA_GPIO(R, 4) GPIO_ACTIVE_LOW>; | |
579 | linux,input-type = <5>; | |
580 | linux,code = <KEY_RESERVED>; | |
581 | debounce-interval = <1>; | |
d1c04d30 | 582 | wakeup-source; |
53d02858 TV |
583 | }; |
584 | ||
585 | power { | |
586 | label = "Power"; | |
587 | gpios = <&gpio TEGRA_GPIO(Q, 0) GPIO_ACTIVE_LOW>; | |
588 | linux,code = <KEY_POWER>; | |
589 | debounce-interval = <30>; | |
d1c04d30 | 590 | wakeup-source; |
53d02858 TV |
591 | }; |
592 | }; | |
593 | ||
594 | regulators { | |
595 | compatible = "simple-bus"; | |
596 | #address-cells = <1>; | |
597 | #size-cells = <0>; | |
598 | ||
599 | vdd_mux: regulator@0 { | |
600 | compatible = "regulator-fixed"; | |
601 | reg = <0>; | |
602 | regulator-name = "+VDD_MUX"; | |
603 | regulator-min-microvolt = <12000000>; | |
604 | regulator-max-microvolt = <12000000>; | |
605 | regulator-always-on; | |
606 | regulator-boot-on; | |
607 | }; | |
608 | ||
609 | vdd_5v0_sys: regulator@1 { | |
610 | compatible = "regulator-fixed"; | |
611 | reg = <1>; | |
612 | regulator-name = "+5V_SYS"; | |
613 | regulator-min-microvolt = <5000000>; | |
614 | regulator-max-microvolt = <5000000>; | |
615 | regulator-always-on; | |
616 | regulator-boot-on; | |
617 | vin-supply = <&vdd_mux>; | |
618 | }; | |
619 | ||
620 | vdd_3v3_sys: regulator@2 { | |
621 | compatible = "regulator-fixed"; | |
622 | reg = <2>; | |
623 | regulator-name = "+3.3V_SYS"; | |
624 | regulator-min-microvolt = <3300000>; | |
625 | regulator-max-microvolt = <3300000>; | |
626 | regulator-always-on; | |
627 | regulator-boot-on; | |
628 | vin-supply = <&vdd_mux>; | |
629 | }; | |
630 | ||
631 | vdd_3v3_run: regulator@3 { | |
632 | compatible = "regulator-fixed"; | |
633 | reg = <3>; | |
634 | regulator-name = "+3.3V_RUN"; | |
635 | regulator-min-microvolt = <3300000>; | |
636 | regulator-max-microvolt = <3300000>; | |
637 | regulator-always-on; | |
638 | regulator-boot-on; | |
639 | gpio = <&pmic 1 GPIO_ACTIVE_HIGH>; | |
640 | enable-active-high; | |
641 | vin-supply = <&vdd_3v3_sys>; | |
642 | }; | |
643 | ||
644 | vdd_3v3_hdmi: regulator@4 { | |
645 | compatible = "regulator-fixed"; | |
646 | reg = <4>; | |
647 | regulator-name = "+3.3V_AVDD_HDMI_AP_GATED"; | |
648 | regulator-min-microvolt = <3300000>; | |
649 | regulator-max-microvolt = <3300000>; | |
650 | vin-supply = <&vdd_3v3_run>; | |
651 | }; | |
652 | ||
653 | vdd_led: regulator@5 { | |
654 | compatible = "regulator-fixed"; | |
655 | reg = <5>; | |
656 | regulator-name = "+VDD_LED"; | |
657 | gpio = <&gpio TEGRA_GPIO(P, 2) GPIO_ACTIVE_HIGH>; | |
658 | enable-active-high; | |
659 | vin-supply = <&vdd_mux>; | |
660 | }; | |
661 | ||
662 | vdd_5v0_ts: regulator@6 { | |
663 | compatible = "regulator-fixed"; | |
664 | reg = <6>; | |
665 | regulator-name = "+5V_VDD_TS_SW"; | |
666 | regulator-min-microvolt = <5000000>; | |
667 | regulator-max-microvolt = <5000000>; | |
668 | regulator-boot-on; | |
669 | gpio = <&gpio TEGRA_GPIO(K, 1) GPIO_ACTIVE_HIGH>; | |
670 | enable-active-high; | |
671 | vin-supply = <&vdd_5v0_sys>; | |
672 | }; | |
673 | ||
674 | vdd_usb1_vbus: regulator@7 { | |
675 | compatible = "regulator-fixed"; | |
676 | reg = <7>; | |
677 | regulator-name = "+5V_USB_HS"; | |
678 | regulator-min-microvolt = <5000000>; | |
679 | regulator-max-microvolt = <5000000>; | |
680 | gpio = <&gpio TEGRA_GPIO(N, 4) GPIO_ACTIVE_HIGH>; | |
681 | enable-active-high; | |
682 | gpio-open-drain; | |
683 | vin-supply = <&vdd_5v0_sys>; | |
684 | }; | |
685 | ||
686 | vdd_usb3_vbus: regulator@8 { | |
687 | compatible = "regulator-fixed"; | |
688 | reg = <8>; | |
689 | regulator-name = "+5V_USB_SS"; | |
690 | regulator-min-microvolt = <5000000>; | |
691 | regulator-max-microvolt = <5000000>; | |
692 | gpio = <&gpio TEGRA_GPIO(N, 5) GPIO_ACTIVE_HIGH>; | |
693 | enable-active-high; | |
694 | gpio-open-drain; | |
695 | vin-supply = <&vdd_5v0_sys>; | |
696 | }; | |
697 | ||
698 | vdd_3v3_panel: regulator@9 { | |
699 | compatible = "regulator-fixed"; | |
700 | reg = <9>; | |
701 | regulator-name = "+3.3V_PANEL"; | |
702 | regulator-min-microvolt = <3300000>; | |
703 | regulator-max-microvolt = <3300000>; | |
704 | gpio = <&pmic 4 GPIO_ACTIVE_HIGH>; | |
705 | enable-active-high; | |
706 | vin-supply = <&vdd_3v3_run>; | |
707 | }; | |
708 | ||
709 | vdd_3v3_lp0: regulator@10 { | |
710 | compatible = "regulator-fixed"; | |
711 | reg = <10>; | |
712 | regulator-name = "+3.3V_LP0"; | |
713 | regulator-min-microvolt = <3300000>; | |
714 | regulator-max-microvolt = <3300000>; | |
715 | /* | |
716 | * TODO: find a way to wire this up with the USB EHCI | |
717 | * controllers so that it can be enabled on demand. | |
718 | */ | |
719 | regulator-always-on; | |
720 | gpio = <&pmic 2 GPIO_ACTIVE_HIGH>; | |
721 | enable-active-high; | |
722 | vin-supply = <&vdd_3v3_sys>; | |
723 | }; | |
724 | ||
725 | vdd_hdmi_pll: regulator@11 { | |
726 | compatible = "regulator-fixed"; | |
727 | reg = <11>; | |
728 | regulator-name = "+1.05V_RUN_AVDD_HDMI_PLL"; | |
729 | regulator-min-microvolt = <1050000>; | |
730 | regulator-max-microvolt = <1050000>; | |
731 | gpio = <&gpio TEGRA_GPIO(H, 7) GPIO_ACTIVE_LOW>; | |
732 | vin-supply = <&vdd_1v05_run>; | |
733 | }; | |
734 | ||
735 | vdd_5v0_hdmi: regulator@12 { | |
736 | compatible = "regulator-fixed"; | |
737 | reg = <12>; | |
738 | regulator-name = "+5V_HDMI_CON"; | |
739 | regulator-min-microvolt = <5000000>; | |
740 | regulator-max-microvolt = <5000000>; | |
741 | gpio = <&gpio TEGRA_GPIO(K, 6) GPIO_ACTIVE_HIGH>; | |
742 | enable-active-high; | |
743 | vin-supply = <&vdd_5v0_sys>; | |
744 | }; | |
745 | }; | |
746 | ||
747 | sound { | |
748 | nvidia,audio-routing = | |
749 | "Headphones", "HPR", | |
750 | "Headphones", "HPL", | |
751 | "Speakers", "SPKR", | |
752 | "Speakers", "SPKL", | |
753 | "Mic Jack", "MICBIAS", | |
754 | "DMICL", "Int Mic", | |
755 | "DMICR", "Int Mic", | |
756 | "IN34", "Mic Jack"; | |
757 | ||
758 | nvidia,i2s-controller = <&tegra_i2s1>; | |
759 | nvidia,audio-codec = <&acodec>; | |
760 | ||
761 | clocks = <&tegra_car TEGRA124_CLK_PLL_A>, | |
762 | <&tegra_car TEGRA124_CLK_PLL_A_OUT0>, | |
763 | <&tegra_car TEGRA124_CLK_EXTERN1>; | |
764 | clock-names = "pll_a", "pll_a_out0", "mclk"; | |
765 | ||
766 | nvidia,hp-det-gpios = <&gpio TEGRA_GPIO(I, 7) GPIO_ACTIVE_HIGH>; | |
767 | nvidia,mic-det-gpios = | |
768 | <&gpio TEGRA_GPIO(R, 7) GPIO_ACTIVE_HIGH>; | |
769 | }; | |
1755de86 TV |
770 | |
771 | gpio-restart { | |
772 | compatible = "gpio-restart"; | |
773 | gpios = <&gpio TEGRA_GPIO(I, 5) GPIO_ACTIVE_LOW>; | |
774 | priority = <200>; | |
775 | }; | |
53d02858 TV |
776 | }; |
777 | ||
778 | #include "cros-ec-keyboard.dtsi" |