cpu/ChangeLog

   1 2020-06-02  Jose E. Marchesi  <jose.marchesi@oracle.com>
   2
   3         * bpf.cpu (define-bpf-isa): Set base-insn-bitsize to 64.
   4         * bpf.opc (bpf_print_insn): Do not set endian_code here.
   5
   6 2020-06-02  Jose E. Marchesi  <jose.marchesi@oracle.com>
   7
   8         * mep.opc (print_slot_insn): Pass the insn endianness to
   9         cgen_get_insn_value.
  10
  11 2020-05-28  Jose E. Marchesi  <jose.marchesi@oracle.com>
  12             David Faust <david.faust@oracle.com>
  13
  14         * bpf.cpu (define-alu-insn-un): Add definitions of semantics.
  15         (define-alu-insn-mov): Likewise.
  16         (daib): Likewise.
  17         (define-alu-instructions): Likewise.
  18         (define-endian-insn): Likewise.
  19         (define-lddw): Likewise.
  20         (dlabs): Likewise.
  21         (dlind): Likewise.
  22         (dxli): Likewise.
  23         (dxsi): Likewise.
  24         (dsti): Likewise.
  25         (define-ldstx-insns): Likewise.
  26         (define-st-insns): Likewise.
  27         (define-cond-jump-insn): Likewise.
  28         (dcji): Likewise.
  29         (define-condjump-insns): Likewise.
  30         (define-call-insn): Likewise.
  31         (ja): Likewise.
  32         ("exit"): Likewise.
  33         (define-atomic-insns): Likewise.
  34         (sem-exchange-and-add): New macro.
  35         * bpf.cpu ("brkpt"): New instruction.
  36         (bpfbf): Set word-bitsize to 32 and insn-endian big.
  37         (h-gpr): Prefer r0 to `a' and r6 to `ctx'.
  38         (h-pc): Expand definition.
  39         * bpf.opc (bpf_print_insn): Set endian_code to BIG.
  40
  41 2020-05-21  Alan Modra  <amodra@gmail.com>
  42
  43         * mep.opc (mep_cgen_expand_macros_and_parse_operand): Replace
  44         "if (x) free (x)" with "free (x)".
  45
  46 2020-05-19  Stafford Horne  <shorne@gmail.com>
  47
  48         PR 25184
  49         * or1k.cpu (arch or1k): Remove or64 and or64nd machs.
  50         (ORBIS-MACHS, ORFPX32-MACHS): Remove pmacros.
  51         (cpu or1k64bf, mach or64, mach or64nd): Remove definitions.
  52         * or1kcommon.cpu (h-fdr): Remove hardware.
  53         * or1korfpx.cpu (rDDF, rADF, rBDF): Remove operand definitions.
  54         (float-regreg-insn): Remove lf- mnemonic -d instruction pattern.
  55         (float-setflag-insn-base): Remove lf-sf mnemonic -d pattern.
  56         (float-cust-insn): Remove "lf-cust" cust-num "-d" pattern.
  57         (lf-rem-d, lf-itof-d, lf-ftoi-d, lf-madd-d): Remove.
  58
  59 2020-02-16  David Faust  <david.faust@oracle.com>
  60
  61         * bpf.cpu (define-cond-jump-insn): Renamed from djci.
  62         (dcji) New version with support for JMP32
  63
  64 2020-02-03  Alan Modra  <amodra@gmail.com>
  65
  66         * m32c.cpu (f-dsp-64-s16): Mask before shifting signed value.
  67
  68 2020-02-01  Alan Modra  <amodra@gmail.com>
  69
  70         * frv.cpu (f-u12): Multiply rather than left shift signed values.
  71         (f-label16, f-label24): Likewise.
  72
  73 2020-01-30  Alan Modra  <amodra@gmail.com>
  74
  75         * m32c.cpu (f-src32-rn-unprefixed-QI): Shift before inverting.
  76         (f-src32-rn-prefixed-QI, f-dst32-rn-unprefixed-QI): Likewise.
  77         (f-dst32-rn-prefixed-QI): Likewise.
  78         (f-dsp-32-s32): Mask before shifting left.
  79         (f-dsp-48-u32, f-dsp-48-s32): Likewise.
  80         (f-bitbase32-16-s11-unprefixed): Multiply signed field rather than
  81         shifting left.
  82         (f-bitbase32-24-s11-prefixed, f-bitbase32-24-s19-prefixed): Likewise.
  83         (h-gr-SI): Mask before shifting.
  84
  85 2020-01-30  Jose E. Marchesi  <jose.marchesi@oracle.com>
  86
  87         * bpf.cpu (define-alu-insn-un): The unary BPF instructions
  88         (neg and neg32) use OP_SRC_K even if they operate only in
  89         registers.
  90
  91 2020-01-18  Nick Clifton  <nickc@redhat.com>
  92
  93         Binutils 2.34 branch created.
  94
  95 2020-01-13  Alan Modra  <amodra@gmail.com>
  96
  97         * fr30.cpu (f-disp9, f-disp10, f-s10, f-rel9, f-rel12): Don't
  98         left shift signed values.
  99
 100 2020-01-06  Alan Modra  <amodra@gmail.com>
 101
 102         * m32c.cpu (f-dsp-8-u16, f-dsp-8-s16): Rearrange to mask any sign
 103         bits before shifting rather than masking after shifting.
 104         (f-dsp-16-u16, f-dsp-16-s16, f-dsp-32-u16, f-dsp-32-s16): Likewise.
 105         (f-dsp-40-u16, f-dsp-40-s16, f-dsp-48-u16, f-dsp-48-s16): Likewise.
 106         (f-dsp-64-u16, f-dsp-8-s24): Likewise.
 107         (f-bitbase32-16-s19-unprefixed): Avoid signed left shift.
 108
 109 2020-01-04  Alan Modra  <amodra@gmail.com>
 110
 111         * m32r.cpu (f-disp8): Avoid left shift of negative values.
 112         (f-disp16, f-disp24): Likewise.
 113
 114 2019-12-23  Alan Modra  <amodra@gmail.com>
 115
 116         * iq2000.cpu (f-offset): Avoid left shift of negative values.
 117
 118 2019-12-20  Alan Modra  <amodra@gmail.com>
 119
 120         * or1korbis.cpu (f-disp26, f-disp21): Don't left shift negative values.
 121
 122 2019-12-17  Alan Modra  <amodra@gmail.com>
 123
 124         * bpf.cpu (f-imm64): Avoid signed overflow.
 125
 126 2019-12-16  Alan Modra  <amodra@gmail.com>
 127
 128         * xstormy16.cpu (f-rel12a): Avoid signed overflow.
 129
 130 2019-12-11  Alan Modra  <amodra@gmail.com>
 131
 132         * epiphany.cpu (f-sdisp11): Don't sign extend with shifts.
 133         * lm32.cpu (f-branch, f-vall): Likewise.
 134         * m32.cpu (f-lab-8-16): Likewise.
 135
 136 2019-12-11  Alan Modra  <amodra@gmail.com>
 137
 138         * epiphany.cpu (f-simm8, f-simm24): Use multiply rather than
 139         shift left to avoid UB on left shift of negative values.
 140
 141 2019-11-20  Jose E. Marchesi  <jose.marchesi@oracle.com>
 142
 143         * bpf.cpu: Fix comment describing the 128-bit instruction format.
 144
 145 2019-09-09  Phil Blundell  <pb@pbcl.net>
 146
 147         binutils 2.33 branch created.
 148
 149 2019-07-19  Jose E. Marchesi  <jose.marchesi@oracle.com>
 150
 151         * bpf.cpu (h-gpr): when disassembling, use %r0 and %r6 instead of
 152         %a and %ctx.
 153
 154 2019-07-15  Jose E. Marchesi  <jose.marchesi@oracle.com>
 155
 156         * bpf.cpu (dlabs): New pmacro.
 157         (dlind): Likewise.
 158
 159 2019-07-14  Jose E. Marchesi  <jose.marchesi@oracle.com>
 160
 161         * bpf.cpu (dlsi): ldabs and ldind instructions do not take an
 162         explicit 'dst' argument.
 163
 164 2019-06-13  Stafford Horne  <shorne@gmail.com>
 165
 166         * or1korfpx.cpu (float-setflag-insn-base): Add 'sf' to symbol.
 167
 168 2019-06-13  Stafford Horne  <shorne@gmail.com>
 169
 170         * or1k.cpu (or64nd, or32nd, or1200nd): Update comment.a
 171         (l-adrp): Improve comment.
 172
 173 2019-06-13  Stafford Horne  <shorne@gmail.com>
 174
 175         * or1korfpx.cpu (insn-opcode-float-regreg): Add SFUEQ_S, SFUNE_S,
 176         SFUGT_S, SFUGE_S, SFULT_S, SFULE_S, SFUN_S, SFUEQ_D, SFUNE_D, SFUGT_D,
 177         SFUGE_D, SFULT_D, SFULE_D, SFUN_D opcodes.
 178         (float-setflag-insn-base): New pmacro based on float-setflag-insn.
 179         (float-setflag-symantics, float-setflag-unordered-cmp-symantics,
 180         float-setflag-unordered-symantics): New pmacro for instruction
 181         symantics.
 182         (float-setflag-insn): Update to use float-setflag-insn-base.
 183         (float-setflag-unordered-insn): New pmacro for generating instructions.
 184
 185 2019-06-13  Andrey Bacherov  <avbacherov@opencores.org>
 186             Stafford Horne  <shorne@gmail.com>
 187
 188         * or1k.cpu (ORFPX64A32-MACHS): New pmacro.
 189         (ORFPX-MACHS): Removed pmacro.
 190         * or1k.opc (or1k_cgen_insn_supported): New function.
 191         (CGEN_VALIDATE_INSN_SUPPORTED): Define macro.
 192         (parse_regpair, print_regpair): New functions.
 193         * or1kcommon.cpu (h-spr, spr-shift, spr-address, h-gpr): Reorder
 194         and add comments.
 195         (h-fdr): Update comment to indicate or64.
 196         (reg-pair-reg-lo, reg-pair-reg-hi): New pmacros for register pairs.
 197         (h-fd32r): New hardware for 64-bit fpu registers.
 198         (h-i64r): New hardware for 64-bit int registers.
 199         * or1korbis.cpu (f-resv-8-1): New field.
 200         * or1korfpx.cpu (rDSF, rASF, rBSF): Update attribute to ORFPX32-MACHS.
 201         (rDDF, rADF, rBDF): Update operand comment to indicate or64.
 202         (f-rdoff-10-1, f-raoff-9-1, f-rboff-8-1): New fields.
 203         (h-roff1): New hardware.
 204         (double-field-and-ops mnemonic): New pmacro to generate operations
 205         rDD32F, rAD32F, rBD32F, rDDI and rADI.
 206         (float-regreg-insn): Update single precision generator to MACH
 207         ORFPX32-MACHS.  Add generator for or32 64-bit instructions.
 208         (float-setflag-insn): Update single precision generator to MACH
 209         ORFPX32-MACHS.  Fix double instructions from single to double
 210         precision.  Add generator for or32 64-bit instructions.
 211         (float-cust-insn cust-num): Update single precision generator to MACH
 212         ORFPX32-MACHS.  Add generator for or32 64-bit instructions.
 213         (lf-rem-s, lf-itof-s, lf-ftoi-s, lf-madd-s): Update MACH to
 214         ORFPX32-MACHS.
 215         (lf-rem-d): Fix operation from mod to rem.
 216         (lf-rem-d32, lf-itof-d32, lf-ftoi-d32, lf-madd-d32): New instruction.
 217         (lf-itof-d): Fix operands from single to double.
 218         (lf-ftoi-d): Update operand mode from DI to WI.
 219
 220 2019-05-23  Jose E. Marchesi  <jose.marchesi@oracle.com>
 221
 222         * bpf.cpu: New file.
 223         * bpf.opc: Likewise.
 224
 225 2018-06-24  Nick Clifton  <nickc@redhat.com>
 226
 227         2.32 branch created.
 228
 229 2018-10-05  Richard Henderson  <rth@twiddle.net>
 230             Stafford Horne  <shorne@gmail.com>
 231
 232         * or1korbis.cpu (insn-opcode-mac): Add opcodes for MACU and MSBU.
 233         (insn-opcode-alu-regreg): Add opcodes for MULD and MULDU.
 234         (l-mul): Fix overflow support and indentation.
 235         (l-mulu): Fix overflow support and indentation.
 236         (l-muld, l-muldu, l-msbu, l-macu): New instructions.
 237         (l-div); Remove incorrect carry behavior.
 238         (l-divu): Fix carry and overflow behavior.
 239         (l-mac): Add overflow support.
 240         (l-msb, l-msbu): Add carry and overflow support.
 241
 242 2018-10-05  Richard Henderson  <rth@twiddle.net>
 243
 244         * or1k.opc (parse_disp26): Add support for plta() relocations.
 245         (parse_disp21): New function.
 246         (or1k_rclass): New enum.
 247         (or1k_rtype): New enum.
 248         (or1k_imm16_relocs): Define new PO and SPO relocation mappings.
 249         (parse_reloc): Add new po(), gotpo() and gottppo() for LO13 relocations.
 250         (parse_imm16): Add support for the new 21bit and 13bit relocations.
 251         * or1korbis.cpu (f-disp26): Don't assume SI.
 252         (f-disp21): New pc-relative 21-bit 13 shifted to right.
 253         (insn-opcode): Add ADRP.
 254         (l-adrp): New instruction.
 255
 256 2018-10-05  Richard Henderson  <rth@twiddle.net>
 257
 258         * or1k.opc: Add RTYPE_ enum.
 259         (INVALID_STORE_RELOC): New string.
 260         (or1k_imm16_relocs): New array array.
 261         (parse_reloc): New static function that just does the parsing.
 262         (parse_imm16): New static function for generic parsing.
 263         (parse_simm16): Change to just call parse_imm16.
 264         (parse_simm16_split): New function.
 265         (parse_uimm16): Change to call parse_imm16.
 266         (parse_uimm16_split): New function.
 267         * or1korbis.cpu (simm16-split): Change to use new simm16_split.
 268         (uimm16-split): Change to use new uimm16_split.
 269
 270 2018-07-24  Alan Modra  <amodra@gmail.com>
 271
 272         PR 23430
 273         * or1kcommon.cpu (spr-reg-indices): Fix description typo.
 274
 275 2018-05-09  Sebastian Rasmussen  <sebras@gmail.com>
 276
 277         * or1kcommon.cpu (spr-reg-info): Typo fix.
 278
 279 2018-03-03  Alan Modra  <amodra@gmail.com>
 280
 281         * frv.opc: Include opintl.h.
 282         (add_next_to_vliw): Use opcodes_error_handler to print error.
 283         Standardize error message.
 284         (fr500_check_insn_major_constraints, frv_vliw_add_insn): Likewise.
 285
 286 2018-01-13  Nick Clifton  <nickc@redhat.com>
 287
 288         2.30 branch created.
 289
 290 2017-03-15  Stafford Horne  <shorne@gmail.com>
 291
 292         * or1kcommon.cpu: Add pc set semantics to also update ppc.
 293
 294 2016-10-06  Alan Modra  <amodra@gmail.com>
 295
 296         * mep.opc (expand_string): Add fall through comment.
 297
 298 2016-03-03  Alan Modra  <amodra@gmail.com>
 299
 300         * fr30.cpu (f-m4): Replace bogus comment with a better guess
 301         at what is really going on.
 302
 303 2016-03-02  Alan Modra  <amodra@gmail.com>
 304
 305         * fr30.cpu (f-m4): Replace -1 << 4 with -16.
 306
 307 2016-02-02  Andrew Burgess  <andrew.burgess@embecosm.com>
 308
 309         * epiphany.opc (epiphany_print_insn): Set info->bytes_per_line to
 310         a constant to better align disassembler output.
 311
 312 2014-07-20  Stefan Kristiansson  <stefan.kristiansson@saunalahti.fi>
 313
 314         * or1korbis.cpu (l-msync, l-psync, l-csync): New instructions.
 315
 316 2014-06-12  Alan Modra  <amodra@gmail.com>
 317
 318         * or1k.opc: Whitespace fixes.
 319
 320 2014-05-08  Stefan Kristiansson  <stefan.kristiansson@saunalahti.fi>
 321
 322         * or1korbis.cpu (h-atomic-reserve): New hardware.
 323         (h-atomic-address): Likewise.
 324         (insn-opcode): Add opcodes for LWA and SWA.
 325         (atomic-reserve): New operand.
 326         (atomic-address): Likewise.
 327         (l-lwa, l-swa): New instructions.
 328         (l-lbs): Fix typo in comment.
 329         (store-insn): Clear atomic reserve on store to atomic-address.
 330         Fix register names in fmt field.
 331
 332 2014-04-22  Christian Svensson  <blue@cmd.nu>
 333
 334         * openrisc.cpu: Delete.
 335         * openrisc.opc: Delete.
 336         * or1k.cpu: New file.
 337         * or1k.opc: New file.
 338         * or1kcommon.cpu: New file.
 339         * or1korbis.cpu: New file.
 340         * or1korfpx.cpu: New file.
 341
 342 2013-12-07  Mike Frysinger  <vapier@gentoo.org>
 343
 344         * epiphany.opc: Remove +x file mode.
 345
 346 2013-03-08  Yann Sionneau  <yann.sionneau@gmail.com>
 347
 348         PR binutils/15241
 349         * lm32.cpu (Control and status registers): Add CFG2, PSW,
 350         TLBVADDR, TLBPADDR and TLBBADVADDR.
 351
 352 2012-11-30  Oleg Raikhman  <oleg@adapteva.com>
 353             Joern Rennecke  <joern.rennecke@embecosm.com>
 354
 355         * epiphany.cpu (keyword gr-names): Move sb/sl/ip after r9/r10/r12.
 356         (load_insn): Add NO-DIS attribute to x, p, d, dpm, dl0, dl0.l.
 357         (testset-insn): Add NO_DIS attribute to t.l.
 358         (store-insn): Add NO-DIS attribute to x.l, p.l, d.l, dpm.l, dl0.l.
 359         (move-insns): Add NO-DIS attribute to cmov.l.
 360         (op-mmr-movts): Add NO-DIS attribute to movts.l.
 361         (op-mmr-movfs): Add NO-DIS attribute to movfs.l.
 362         (op-rrr): Add NO-DIS attribute to .l.
 363         (shift-rrr): Add NO-DIS attribute to .l.
 364         (op-shift-rri): Add NO-DIS attribute to i32.l.
 365         (bitrl, movtl): Add NO-DIS attribute.
 366         (op-iextrrr): Add NO-DIS attribute to .l
 367         (op-two_operands-float, op-fabs-float): Add NO-DIS attribute to f32.l.
 368         (op-fix2float-float, op-float2fix-float, op-fextop-float): Likewise.
 369
 370 2012-02-27  Alan Modra  <amodra@gmail.com>
 371
 372         * mt.opc (print_dollarhex): Trim values to 32 bits.
 373
 374 2011-12-15  Nick Clifton  <nickc@redhat.com>
 375
 376         * frv.opc (parse_uhi16): Fix handling of %hi operator on 64-bit
 377         hosts.
 378
 379 2011-10-26  Joern Rennecke  <joern.rennecke@embecosm.com>
 380
 381         * epiphany.opc (parse_branch_addr): Fix type of valuep.
 382         Cast value before printing it as a long.
 383         (parse_postindex): Fix type of valuep.
 384
 385 2011-10-25  Joern Rennecke  <joern.rennecke@embecosm.com>
 386
 387         * cpu/epiphany.cpu: New file.
 388         * cpu/epiphany.opc: New file.
 389
 390 2011-08-22  Nick Clifton  <nickc@redhat.com>
 391
 392         * fr30.cpu: Newly contributed file.
 393         * fr30.opc: Likewise.
 394         * ip2k.cpu: Likewise.
 395         * ip2k.opc: Likewise.
 396         * mep-avc.cpu: Likewise.
 397         * mep-avc2.cpu: Likewise.
 398         * mep-c5.cpu: Likewise.
 399         * mep-core.cpu: Likewise.
 400         * mep-default.cpu: Likewise.
 401         * mep-ext-cop.cpu: Likewise.
 402         * mep-fmax.cpu: Likewise.
 403         * mep-h1.cpu: Likewise.
 404         * mep-ivc2.cpu: Likewise.
 405         * mep-rhcop.cpu: Likewise.
 406         * mep-sample-ucidsp.cpu: Likewise.
 407         * mep.cpu: Likewise.
 408         * mep.opc: Likewise.
 409         * openrisc.cpu: Likewise.
 410         * openrisc.opc: Likewise.
 411         * xstormy16.cpu: Likewise.
 412         * xstormy16.opc: Likewise.
 413
 414 2010-10-08  Pierre Muller  <muller@ics.u-strasbg.fr>
 415
 416         * frv.opc: #undef DEBUG.
 417
 418 2010-07-03  DJ Delorie  <dj@delorie.com>
 419
 420         * m32c.cpu (f-dsp-8-s24): Mask high byte after shifting it.
 421
 422 2010-02-11  Doug Evans  <dje@sebabeach.org>
 423
 424         * m32r.cpu (HASH-PREFIX): Delete.
 425         (duhpo, dshpo): New pmacros.
 426         (simm8, simm16): Delete HASH-PREFIX attribute, define with dshpo.
 427         (uimm3, uimm4, uimm5, uimm8, uimm16, imm1): Delete HASH-PREFIX
 428         attribute, define with dshpo.
 429         (uimm24): Delete HASH-PREFIX attribute.
 430         * m32r.opc (CGEN_PRINT_NORMAL): Delete.
 431         (print_signed_with_hash_prefix): New function.
 432         (print_unsigned_with_hash_prefix): New function.
 433         * xc16x.cpu (dowh): New pmacro.
 434         (upof16): Define with dowh, specify print handler.
 435         (qbit, qlobit, qhibit): Ditto.
 436         (upag16): Ditto.
 437         * xc16x.opc (CGEN_PRINT_NORMAL): Delete.
 438         (print_with_dot_prefix): New functions.
 439         (print_with_pof_prefix, print_with_pag_prefix): New functions.
 440
 441 2010-01-24  Doug Evans  <dje@sebabeach.org>
 442
 443         * frv.cpu (floating-point-conversion): Update call to fp conv op.
 444         (floating-point-dual-conversion, ne-floating-point-dual-conversion,
 445         conditional-floating-point-conversion, ne-floating-point-conversion,
 446         float-parallel-mul-add-double-semantics): Ditto.
 447
 448 2010-01-05  Doug Evans  <dje@sebabeach.org>
 449
 450         * m32c.cpu (f-dsp-32-u24): Fix mode of extract handler.
 451         (f-dsp-40-u20, f-dsp-40-u24): Ditto.
 452
 453 2010-01-02  Doug Evans  <dje@sebabeach.org>
 454
 455         * m32c.opc (parse_signed16): Fix typo.
 456
 457 2009-12-11  Nick Clifton  <nickc@redhat.com>
 458
 459         * frv.opc: Fix shadowed variable warnings.
 460         * m32c.opc: Fix shadowed variable warnings.
 461
 462 2009-11-14  Doug Evans  <dje@sebabeach.org>
 463
 464         Must use VOID expression in VOID context.
 465         * xc16x.cpu (mov4): Fix mode of `sequence'.
 466         (mov9, mov10): Ditto.
 467         (movbsrr, moveb1, jmprel, jmpseg, jmps): Fix mode of `if'.
 468         (callr, callseg, calls, trap, rets, reti): Ditto.
 469         (jb, jbc, jnb, jnbs): Fix mode of `if'.  Comment out no-op `sll'.
 470         (atomic, extr, extp, extp1, extpg1, extpr, extpr1): Fix mode of `cond'.
 471         (exts, exts1, extsr, extsr1, prior): Ditto.
 472
 473 2009-10-23  Doug Evans  <dje@sebabeach.org>
 474
 475         * m32c.opc (opc.h): cgen-types.h -> cgen/basic-modes.h.
 476         cgen-ops.h -> cgen/basic-ops.h.
 477
 478 2009-09-25  Alan Modra  <amodra@bigpond.net.au>
 479
 480         * m32r.cpu (stb-plus): Typo fix.
 481
 482 2009-09-23  Doug Evans  <dje@sebabeach.org>
 483
 484         * m32r.cpu (sth-plus): Fix address mode and calculation.
 485         (stb-plus): Ditto.
 486         (clrpsw): Fix mask calculation.
 487         (bset, bclr, btst): Make mode in bit calculation match expression.
 488
 489         * xc16x.cpu (rtl-version): Set to 0.8.
 490         (gr-names, ext-names,psw-names): Update, print-name -> enum-prefix,
 491         make uppercase.  Remove unnecessary name-prefix spec.
 492         (grb-names, conditioncode-names, extconditioncode-names): Ditto.
 493         (grb8-names, r8-names, regmem8-names, regdiv8-names): Ditto.
 494         (reg0-name, reg0-name1, regbmem8-names, memgr8-names): Ditto.
 495         (h-cr): New hardware.
 496         (muls): Comment out parts that won't compile, add fixme.
 497         (mulu, divl, divlu, jmpabs, jmpa-, jmprel, jbc, jnbs, callr): Ditto.
 498         (scxti, scxtmg, scxtm, bclear, bclr18, bset19, bitset, bmov): Ditto.
 499         (bmovn, band, bor, bxor, bcmp, bfldl, bfldh): Ditto.
 500
 501 2009-07-16  Doug Evans  <dje@sebabeach.org>
 502
 503         * cpu/simplify.inc (*): One line doc strings don't need \n.
 504         (df): Invoke define-full-ifield instead of claiming it's an alias.
 505         (dno): Define.
 506         (dnop): Mark as deprecated.
 507
 508 2009-06-22  Alan Modra  <amodra@bigpond.net.au>
 509
 510         * m32c.opc (parse_lab_5_3): Use correct enum.
 511
 512 2009-01-07  Hans-Peter Nilsson  <hp@axis.com>
 513
 514         * frv.cpu (mabshs): Explicitly sign-extend arguments of abs to DI.
 515         (DI-ext-HI, DI-ext-UHI, DI-ext-DI): New pmacros.
 516         (media-arith-sat-semantics): Explicitly sign- or zero-extend
 517         arguments of "operation" to DI using "mode" and the new pmacros.
 518
 519 2009-01-03  Hans-Peter Nilsson  <hp@axis.com>
 520
 521         * cris.cpu (cris-implemented-writable-specregs-v32): Correct size
 522         of number 2, PID.
 523
 524 2008-12-23  Jon Beniston <jon@beniston.com>
 525
 526         * lm32.cpu: New file.
 527         * lm32.opc: New file.
 528
 529 2008-01-29  Alan Modra  <amodra@bigpond.net.au>
 530
 531         * mt.opc (parse_imm16): Apply 2007-09-26 opcodes/mt-asm.c change
 532         to source.
 533
 534 2007-10-22  Hans-Peter Nilsson  <hp@axis.com>
 535
 536         * cris.cpu (movs, movu): Use result of extension operation when
 537         updating flags.
 538
 539 2007-07-04  Nick Clifton  <nickc@redhat.com>
 540
 541         * cris.cpu: Update copyright notice to refer to GPLv3.
 542         * frv.cpu, frv.opc, iq10.cpu, iq2000m.cpu, iq2000.opc, m32c.cpu,
 543         m32c.opc, m32r.cpu, m32r.opc, mt.cpu, mt.opc, sh64-compact.cpu,
 544         sh64-media.cpu, sh.cpu, sh.opc, simplify.inc, xc16x.cpu,
 545         xc16x.opc: Likewise.
 546         * iq2000.cpu: Fix copyright notice to refer to FSF.
 547
 548 2007-04-30  Mark Salter  <msalter@sadr.localdomain>
 549
 550         * frv.cpu (spr-names): Support new coprocessor SPR registers.
 551
 552 2007-04-20  Nick Clifton  <nickc@redhat.com>
 553
 554         * xc16x.cpu: Restore after accidentally overwriting this file with
 555         xc16x.opc.
 556
 557 2007-03-29  DJ Delorie  <dj@redhat.com>
 558
 559         * m32c.cpu (Imm-8-s4n): Fix print hook.
 560         (Lab-24-8, Lab-32-8, Lab-40-8): Fix.
 561         (arith-jnz-imm4-dst-defn): Make relaxable.
 562         (arith-jnz16-imm4-dst-defn): Fix encodings.
 563
 564 2007-03-20  DJ Delorie  <dj@redhat.com>
 565
 566         * m32c.cpu (f-dsp-40-u20, f-dsp-48-u20, Dsp-40-u20, Dsp-40-u20,
 567         mem20): New.
 568         (src16-16-20-An-relative-*): New.
 569         (dst16-*-20-An-relative-*): New.
 570         (dst16-16-16sa-*): New
 571         (dst16-16-16ar-*): New
 572         (dst32-16-16sa-Unprefixed-*): New
 573         (jsri): Fix operands.
 574         (setzx): Fix encoding.
 575
 576 2007-03-08  Alan Modra  <amodra@bigpond.net.au>
 577
 578         * m32r.opc: Formatting.
 579
 580 2006-05-22  Nick Clifton  <nickc@redhat.com>
 581
 582         * iq2000.cpu: Fix include paths for iq2000m.cpu and iq10.cpu.
 583
 584 2006-04-10  DJ Delorie  <dj@redhat.com>
 585
 586         * m32c.opc (parse_unsigned_bitbase): Take a new parameter which
 587         decides if this function accepts symbolic constants or not.
 588         (parse_signed_bitbase): Likewise.
 589         (parse_unsigned_bitbase8): Pass the new parameter.
 590         (parse_unsigned_bitbase11): Likewise.
 591         (parse_unsigned_bitbase16): Likewise.
 592         (parse_unsigned_bitbase19): Likewise.
 593         (parse_unsigned_bitbase27): Likewise.
 594         (parse_signed_bitbase8): Likewise.
 595         (parse_signed_bitbase11): Likewise.
 596         (parse_signed_bitbase19): Likewise.
 597
 598 2006-03-13  DJ Delorie  <dj@redhat.com>
 599
 600         * m32c.cpu (Bit3-S): New.
 601         (btst:s): New.
 602         * m32c.opc (parse_bit3_S): New.
 603
 604         * m32c.cpu (decimal-subtraction16-insn): Add second operand.
 605         (btst): Add optional :G suffix for MACH32.
 606         (or.b:S): New.
 607         (pop.w:G): Add optional :G suffix for MACH16.
 608         (push.b.imm): Fix syntax.
 609
 610 2006-03-10  DJ Delorie  <dj@redhat.com>
 611
 612         * m32c.cpu (mul.l): New.
 613         (mulu.l): New.
 614
 615 2006-03-03 Shrirang Khisti <shrirangk@kpitcummins.com)
 616
 617         * xc16x.opc (parse_hash): Return NULL if the input was parsed or
 618         an error message otherwise.
 619         (parse_dot, parse_pof, parse_pag, parse_sof, parse_seg): Likewise.
 620         Fix up comments to correctly describe the functions.
 621
 622 2006-02-24  DJ Delorie  <dj@redhat.com>
 623
 624         * m32c.cpu (RL_TYPE): New attribute, with macros.
 625         (Lab-8-24): Add RELAX.
 626         (unary-insn-defn-g, binary-arith-imm-dst-defn,
 627         binary-arith-imm4-dst-defn): Add 1ADDR attribute.
 628         (binary-arith-src-dst-defn): Add 2ADDR attribute.
 629         (jcnd16-5, jcnd16, jcnd32, jmp16.s, jmp16.b, jmp16.w, jmp16.a,
 630         jmp32.s, jmp32.b, jmp32.w, jmp32.a, jsr16.w, jsr16.a): Add JUMP
 631         attribute.
 632         (jsri16, jsri32): Add 1ADDR attribute.
 633         (jsr32.w, jsr32.a): Add JUMP attribute.
 634
 635 2006-02-17  Shrirang Khisti  <shrirangk@kpitcummins.com>
 636             Anil Paranjape   <anilp1@kpitcummins.com>
 637             Shilin Shakti    <shilins@kpitcummins.com>
 638
 639         * xc16x.cpu: New file containing complete CGEN specific XC16X CPU
 640         description.
 641         * xc16x.opc: New file containing supporting XC16C routines.
 642
 643 2006-02-10  Nick Clifton  <nickc@redhat.com>
 644
 645         * iq2000.opc (parse_hi16): Truncate shifted values to 16 bits.
 646
 647 2006-01-06  DJ Delorie  <dj@redhat.com>
 648
 649         * m32c.cpu (mov.w:q): Fix mode.
 650         (push32.b.imm): Likewise, for the comment.
 651
 652 2005-12-16  Nathan Sidwell  <nathan@codesourcery.com>
 653
 654         Second part of ms1 to mt renaming.
 655         * mt.cpu (define-arch, define-isa): Set name to mt.
 656         (define-mach): Adjust.
 657         * mt.opc (CGEN_ASM_HASH): Update.
 658         (mt_asm_hash, mt_cgen_insn_supported): Renamed.
 659         (parse_loopsize, parse_imm16): Adjust.
 660
 661 2005-12-13  DJ Delorie  <dj@redhat.com>
 662
 663         * m32c.cpu (jsri): Fix order so register names aren't treated as
 664         symbols.
 665         (indexb, indexbd, indexbs, indexl, indexld, indexls, indexw,
 666         indexwd, indexws): Fix encodings.
 667
 668 2005-12-12  Nathan Sidwell  <nathan@codesourcery.com>
 669
 670         * mt.cpu: Rename from ms1.cpu.
 671         * mt.opc: Rename from ms1.opc.
 672
 673 2005-12-06  Hans-Peter Nilsson  <hp@axis.com>
 674
 675         * cris.cpu (simplecris-common-writable-specregs)
 676         (simplecris-common-readable-specregs): Split from
 677         simplecris-common-specregs.  All users changed.
 678         (cris-implemented-writable-specregs-v0)
 679         (cris-implemented-readable-specregs-v0): Similar from
 680         cris-implemented-specregs-v0.
 681         (cris-implemented-writable-specregs-v3)
 682         (cris-implemented-readable-specregs-v3)
 683         (cris-implemented-writable-specregs-v8)
 684         (cris-implemented-readable-specregs-v8)
 685         (cris-implemented-writable-specregs-v10)
 686         (cris-implemented-readable-specregs-v10)
 687         (cris-implemented-writable-specregs-v32)
 688         (cris-implemented-readable-specregs-v32): Similar.
 689         (bdap-32-pc, move-m-pcplus-p0, move-m-spplus-p8): New
 690         insns and specializations.
 691
 692 2005-11-08  Nathan Sidwell  <nathan@codesourcery.com>
 693
 694         Add ms2
 695         * ms1.cpu (ms2, ms2bf): New architecture variant, cpu, machine and
 696         model.
 697         (f-uu8, f-uu1, f-imm16l, f-loopo, f-cb1sel, f-cb2sel, f-cb1incr,
 698         f-cb2incr, f-rc3): New fields.
 699         (LOOP): New instruction.
 700         (JAL-HAZARD): New hazard.
 701         (imm16o, loopsize, imm16l, rc3, cb1sel, cb2sel, cb1incr, cb2incr):
 702         New operands.
 703         (mul, muli, dbnz, iflush): Enable for ms2
 704         (jal, reti): Has JAL-HAZARD.
 705         (ldctxt, ldfb, stfb): Only ms1.
 706         (fbcb): Only ms1,ms1-003.
 707         (wfbinc, mefbinc, wfbincr, mwfbincr, fbcbincs, mfbcbincs,
 708         fbcbincrs, mfbcbincrs): Enable for ms2.
 709         (loop, loopu, dfbc, dwfb, fbwfb, dfbr): New ms2 insns.
 710         * ms1.opc (parse_loopsize): New.
 711         (parse_imm16): hi16/lo16 relocs are applicable to IMM16L.
 712         (print_pcrel): New.
 713
 714 2005-10-28  Dave Brolley  <brolley@redhat.com>
 715
 716         Contribute the following change:
 717         2003-09-24  Dave Brolley  <brolley@redhat.com>
 718
 719         * frv.opc: Use CGEN_ATTR_VALUE_ENUM_TYPE in place of
 720         CGEN_ATTR_VALUE_TYPE.
 721         * m32c.opc (m32c_cgen_insn_supported): Use CGEN_INSN_BITSET_ATTR_VALUE.
 722         Use cgen_bitset_intersect_p.
 723
 724 2005-10-27  DJ Delorie  <dj@redhat.com>
 725
 726         * m32c.cpu (Imm-8-s4n, Imm-12-s4n): New.
 727         (arith-jnz16-imm4-dst-defn, arith-jnz32-imm4-dst-defn,
 728         arith-jnz-imm4-dst-mach, arith-jnz-imm4-dst): Keep track of which
 729         imm operand is needed.
 730         (adjnz, sbjnz): Pass the right operands.
 731         (unary-insn-defn, unary16-defn, unary32-defn, unary-insn-mach,
 732         unary-insn): Add -g variants for opcodes that need to support :G.
 733         (not.BW:G, push.BW:G): Call it.
 734         (stzx16-imm8-imm8-dsp8sb, stzx16-imm8-imm8-dsp8fb,
 735         stzx16-imm8-imm8-abs16): Fix operand typos.
 736         * m32c.opc (m32c_asm_hash): Support bnCND.
 737         (parse_signed4n, print_signed4n): New.
 738
 739 2005-10-26  DJ Delorie  <dj@redhat.com>
 740
 741         * m32c.cpu (f-dsp-8-s24, Dsp-8-s24): New.
 742         (mov-dspsp-dst-defn, mov-src-dspsp-defn, mov16-dspsp-dst-defn,
 743         mov16-src-dspsp-defn, mov32-dspsp-dst-defn, mov32-src-dspsp-defn):
 744         dsp8[sp] is signed.
 745         (mov.WL:S #imm,A0/A1): dsp24 is signed (i.e. -0x800000..0xffffff).
 746         (mov.BW:S r0,r1): Fix typo r1l->r1.
 747         (tst): Allow :G suffix.
 748         * m32c.opc (parse_signed24): New, for -0x800000..0xffffff.
 749
 750 2005-10-26  Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
 751
 752         * m32r.opc (parse_hi16): Do not assume a 32-bit host word size.
 753
 754 2005-10-25  DJ Delorie  <dj@redhat.com>
 755
 756         * m32c.cpu (add16-bQ-sp,add16-wQ-sp): Fix to allow either width by
 757         making one a macro of the other.
 758
 759 2005-10-21  DJ Delorie  <dj@redhat.com>
 760
 761         * m32c.cpu (lde, ste): Add dsp[a0] and [a1a] addressing.
 762         (indexb, indexbd, indexbs, indexw, indexwd, indexws, indexl,
 763         indexld, indexls): .w variants have `1' bit.
 764         (rot32.b): QI, not SI.
 765         (rot32.w): HI, not SI.
 766         (xchg16): HI for .w variant.
 767
 768 2005-10-19  Nick Clifton  <nickc@redhat.com>
 769
 770         * m32r.opc (parse_slo16): Fix bad application of previous patch.
 771
 772 2005-10-18  Andreas Schwab  <schwab@suse.de>
 773
 774         * m32r.opc (parse_slo16): Better version of previous patch.
 775
 776 2005-10-14  Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
 777
 778         * cpu/m32r.opc (parse_slo16): Do not assume a 32-bit host word
 779         size.
 780
 781 2005-07-25  DJ Delorie  <dj@redhat.com>
 782
 783         * m32c.opc (parse_unsigned8): Add %dsp8().
 784         (parse_signed8): Add %hi8().
 785         (parse_unsigned16): Add %dsp16().
 786         (parse_signed16): Add %lo16() and %hi16().
 787         (parse_lab_5_3): Make valuep a bfd_vma *.
 788
 789 2005-07-18  Nick Clifton  <nickc@redhat.com>
 790
 791         * m32c.cpu (f-16-8, f-24-8, f-32-16, f-dsp-8-u24): New opcode
 792         components.
 793         (f-lab32-jmp-s): Fix insertion sequence.
 794         (Dsp-8-u24, Lab-5-3, Lab32-jmp-s): New operands.
 795         (Dsp-40-s8): Make parameter be signed.
 796         (Dsp-40-s16): Likewise.
 797         (Dsp-48-s8): Likewise.
 798         (Dsp-48-s16): Likewise.
 799         (Imm-13-u3): Likewise. (Despite its name!)
 800         (BitBase16-16-s8): Make the parameter be unsigned.
 801         (BitBase16-8-u11-S): Likewise.
 802         (Lab-8-8, Lab-8-16, Lab-16-8, jcnd16-5, jcnd16, jcnd32, jmp16.s,
 803         jmp16.b, jmp16.w, jmp32.s, jmp32.b, jmp32.w, jsp16.w, jsr32.w): Allow
 804         relaxation.
 805
 806         * m32c.opc: Fix formatting.
 807         Use safe-ctype.h instead of ctype.h
 808         Move duplicated code sequences into a macro.
 809         Fix compile time warnings about signedness mismatches.
 810         Remove dead code.
 811         (parse_lab_5_3): New parser function.
 812
 813 2005-07-16  Jim Blandy  <jimb@redhat.com>
 814
 815         * m32c.opc (m32c_cgen_insn_supported): Use int, not CGEN_BITSET,
 816         to represent isa sets.
 817
 818 2005-07-15  Jim Blandy  <jimb@redhat.com>
 819
 820         * m32c.cpu, m32c.opc: Fix copyright.
 821
 822 2005-07-14  Jim Blandy  <jimb@redhat.com>
 823
 824         * m32c.cpu, m32c.opc: Machine description for the Renesas M32C.
 825
 826 2005-07-14  Alan Modra  <amodra@bigpond.net.au>
 827
 828         * ms1.opc (print_dollarhex): Correct format string.
 829
 830 2005-07-06  Alan Modra  <amodra@bigpond.net.au>
 831
 832         * iq2000.cpu: Include from binutils cpu dir.
 833
 834 2005-07-05  Nick Clifton  <nickc@redhat.com>
 835
 836         * iq2000.opc (parse_lo16, parse_mlo16): Make value parameter
 837         unsigned in order to avoid compile time warnings about sign
 838         conflicts.
 839
 840         * ms1.opc (parse_*): Likewise.
 841         (parse_imm16): Use a "void *" as it is passed both signed and
 842         unsigned arguments.
 843
 844 2005-07-01  Nick Clifton  <nickc@redhat.com>
 845
 846         * frv.opc: Update to ISO C90 function declaration style.
 847         * iq2000.opc: Likewise.
 848         * m32r.opc: Likewise.
 849         * sh.opc: Likewise.
 850
 851 2005-06-15  Dave Brolley  <brolley@redhat.com>
 852
 853         Contributed by Red Hat.
 854         * ms1.cpu: New file.  Written by Nick Clifton, Stan Cox.
 855         * ms1.opc: New file.  Written by Stan Cox.
 856
 857 2005-05-10  Nick Clifton  <nickc@redhat.com>
 858
 859         * Update the address and phone number of the FSF organization in
 860         the GPL notices in the following files:
 861         cris.cpu, frv.cpu, frv.opc, iq10.cpu, iq2000.opc, iq2000m.cpu,
 862         m32r.cpu, m32r.opc, sh.cpu, sh.opc, sh64-compact.cpu,
 863         sh64-media.cpu, simplify.inc
 864
 865 2005-02-24  Alan Modra  <amodra@bigpond.net.au>
 866
 867         * frv.opc (parse_A): Warning fix.
 868
 869 2005-02-23  Nick Clifton  <nickc@redhat.com>
 870
 871         * frv.opc: Fixed compile time warnings about differing signed'ness
 872         of pointers passed to functions.
 873         * m32r.opc: Likewise.
 874
 875 2005-02-11  Nick Clifton  <nickc@redhat.com>
 876
 877         * iq2000.opc (parse_jtargq10): Change type of valuep argument to
 878         'bfd_vma *' in order avoid compile time warning message.
 879
 880 2005-01-28  Hans-Peter Nilsson  <hp@axis.com>
 881
 882         * cris.cpu (mstep): Add missing insn.
 883
 884 2005-01-25  Alexandre Oliva  <aoliva@redhat.com>
 885
 886         2004-11-10  Alexandre Oliva  <aoliva@redhat.com>
 887         * frv.cpu: Add support for TLS annotations in loads and calll.
 888         * frv.opc (parse_symbolic_address): New.
 889         (parse_ldd_annotation): New.
 890         (parse_call_annotation): New.
 891         (parse_ld_annotation): New.
 892         (parse_ulo16, parse_uslo16): Use parse_symbolic_address.
 893         Introduce TLS relocations.
 894         (parse_d12, parse_s12, parse_u12): Likewise.
 895         (parse_uhi16): Likewise.  Fix constant checking on 64-bit host.
 896         (parse_call_label, print_at): New.
 897
 898 2004-12-21  Mikael Starvik  <starvik@axis.com>
 899
 900         * cris.cpu (cris-set-mem): Correct integral write semantics.
 901
 902 2004-11-29  Hans-Peter Nilsson  <hp@axis.com>
 903
 904         * cris.cpu: New file.
 905
 906 2004-11-15  Michael K. Lechner <mike.lechner@gmail.com>
 907
 908         * iq2000.cpu: Added quotes around macro arguments so that they
 909         will work with newer versions of guile.
 910
 911 2004-10-27  Nick Clifton  <nickc@redhat.com>
 912
 913         * iq2000m.cpu (pkrlr1, pkrlr30, rbr1, rbr30, rxr1, rxr30, wbr1,
 914         wbr1u, wbr30, wbr30u, wxr1, wxr1u, wxr30, wxr30u): Add an index
 915         operand.
 916         * iq2000.cpu (dnop index): Rename to _index to avoid complications
 917         with guile.
 918
 919 2004-08-27  Richard Sandiford  <rsandifo@redhat.com>
 920
 921         * frv.cpu (cfmovs): Change UNIT attribute to FMALL.
 922
 923 2004-05-15  Nick Clifton  <nickc@redhat.com>
 924
 925         * iq2000.opc (iq2000_cgen_insn_supported): Make 'insn' argument const.
 926
 927 2004-03-30  Kazuhiro Inaoka  <inaoka.kazuhiro@renesas.com>
 928
 929         * m32r.opc (parse_hi16): Fixed shigh(0xffff8000) bug.
 930
 931 2004-03-01  Richard Sandiford  <rsandifo@redhat.com>
 932
 933         * frv.cpu (define-arch frv): Add fr450 mach.
 934         (define-mach fr450): New.
 935         (define-model fr450): New.  Add profile units to every fr450 insn.
 936         (define-attr UNIT): Add MDCUTSSI.
 937         (define-attr FR450-MAJOR): New enum.  Add to every fr450 insn.
 938         (define-attr AUDIO): New boolean.
 939         (f-LRAE, f-LRAD, f-LRAS, f-TLBPRopx, f-TLBPRL)
 940         (f-LRA-null, f-TLBPR-null): New fields.
 941         (scr0, scr1, scr2, scr3, imavr1, damvr1, cxnr, ttbr)
 942         (tplr, tppr, tpxr, timerh, timerl, timerd, btbr): New SPRs.
 943         (LRAE, LRAD, LRAS, TLBPRopx, TLBPRL): New operands.
 944         (LRA-null, TLBPR-null): New macros.
 945         (iacc-multiply-r-r, slass, scutss, int-arith-ss-r-r): Add AUDIO attr.
 946         (load-real-address): New macro.
 947         (lrai, lrad, tlbpr): New instructions.
 948         (media-cut-acc, media-cut-acc-ss): Add fr450-major argument.
 949         (mcut, mcuti, mcutss, mcutssi): Adjust accordingly.
 950         (mdcutssi): Change UNIT attribute to MDCUTSSI.
 951         (media-low-clear-semantics, media-scope-limit-semantics)
 952         (media-quad-limit, media-quad-shift): New macros.
 953         (mqlclrhs, mqlmths, mqsllhi, mqsrahi): New instructions.
 954         * frv.opc (frv_is_branch_major, frv_is_float_major, frv_is_media_major)
 955         (frv_is_branch_insn, frv_is_float_insn, frv_is_media_insn)
 956         (frv_vliw_reset, frv_vliw_add_insn): Handle bfd_mach_fr450.
 957         (fr450_unit_mapping): New array.
 958         (fr400_unit_mapping, fr500_unit_mapping, fr550_unit_mapping): Add entry
 959         for new MDCUTSSI unit.
 960         (fr450_check_insn_major_constraints): New function.
 961         (check_insn_major_constraints): Use it.
 962
 963 2004-03-01  Richard Sandiford  <rsandifo@redhat.com>
 964
 965         * frv.cpu (nsdiv, nudiv, nsdivi, nudivi): Remove fr400 profiling unit.
 966         (scutss): Change unit to I0.
 967         (calll, callil, ccalll): Add missing FR550-MAJOR and profile unit.
 968         (mqsaths): Fix FR400-MAJOR categorization.
 969         (media-quad-multiply-cross-acc, media-quad-cross-multiply-cross-acc)
 970         (media-quad-cross-multiply-acc): Change unit from MDUALACC to FMALL.
 971         * frv.opc (fr400_check_insn_major_constraints): Check for (M-2,M-1)
 972         combinations.
 973
 974 2004-03-01  Richard Sandiford  <rsandifo@redhat.com>
 975
 976         * frv.cpu (r-store, r-store-dual, r-store-quad): Delete.
 977         (rstb, rsth, rst, rstd, rstq): Delete.
 978         (rstbf, rsthf, rstf, rstdf, rstqf): Delete.
 979
 980 2004-02-23  Nick Clifton  <nickc@redhat.com>
 981
 982         * Apply these patches from Renesas:
 983
 984         2004-02-10  Kazuhiro Inaoka  <inaoka.kazuhiro@renesas.com>
 985
 986         * cpu/m32r.opc (my_print_insn): Fixed incorrect output when
 987         disassembling codes for 0x*2 addresses.
 988
 989         2003-12-15  Kazuhiro Inaoka  <inaoka.kazuhiro@renesas.com>
 990
 991         * cpu/m32r.cpu: Add PIPE_O attribute to "pop" instruction.
 992
 993         2003-12-03  Kazuhiro Inaoka  <inaoka.kazuhiro@renesas.com>
 994
 995         * cpu/m32r.cpu : Add new model m32r2.
 996         Add new instructions.
 997         Replace occurrances of 'Mitsubishi' with 'Renesas'.
 998         Changed PIPE attr of push from O to OS.
 999         Care for Little-endian of M32R.
1000         * cpu/m32r.opc (CGEN_DIS_HASH, my_print_insn):
1001         Care for Little-endian of M32R.
1002         (parse_slo16): signed extension for value.
1003
1004 2004-02-20  Andrew Cagney  <cagney@redhat.com>
1005
1006         * m32r.opc, m32r.cpu: New files.  Written by , Doug Evans, Nick
1007         Clifton, Ben Elliston, Matthew Green, and Andrew Haley.
1008
1009         * sh.cpu, sh.opc, sh64-compact.cpu, sh64-media.cpu: New files, all
1010         written by Ben Elliston.
1011
1012 2004-01-14  Richard Sandiford  <rsandifo@redhat.com>
1013
1014         * frv.cpu (UNIT): Add IACC.
1015         (iacc-multiply-r-r): Use it.
1016         * frv.opc (fr400_unit_mapping): Add entry for IACC.
1017         (fr500_unit_mapping, fr550_unit_mapping): Likewise.
1018
1019 2004-01-06  Alexandre Oliva  <aoliva@redhat.com>
1020
1021         2003-12-19  Alexandre Oliva  <aoliva@redhat.com>
1022         * frv.opc (parse_ulo16, parse_uhi16, parse_d12): Fix some
1023         cut&paste errors in shifting/truncating numerical operands.
1024         2003-08-08  Alexandre Oliva  <aoliva@redhat.com>
1025         * frv.opc (parse_ulo16): Parse gotofflo and gotofffuncdesclo.
1026         (parse_uslo16): Likewise.
1027         (parse_uhi16): Parse gotoffhi and gotofffuncdeschi.
1028         (parse_d12): Parse gotoff12 and gotofffuncdesc12.
1029         (parse_s12): Likewise.
1030         2003-08-04  Alexandre Oliva  <aoliva@redhat.com>
1031         * frv.opc (parse_ulo16): Parse gotlo and gotfuncdesclo.
1032         (parse_uslo16): Likewise.
1033         (parse_uhi16): Parse gothi and gotfuncdeschi.
1034         (parse_d12): Parse got12 and gotfuncdesc12.
1035         (parse_s12): Likewise.
1036
1037 2003-10-10  Dave Brolley  <brolley@redhat.com>
1038
1039         * frv.cpu (dnpmop): New p-macro.
1040         (GRdoublek): Use dnpmop.
1041         (CPRdoublek, FRdoublei, FRdoublej, FRdoublek): Ditto.
1042         (store-double-r-r): Use (.sym regtype doublek).
1043         (r-store-double): Ditto.
1044         (store-double-r-r-u): Ditto.
1045         (conditional-store-double): Ditto.
1046         (conditional-store-double-u): Ditto.
1047         (store-double-r-simm): Ditto.
1048         (fmovs): Assign to UNIT FMALL.
1049
1050 2003-10-06  Dave Brolley  <brolley@redhat.com>
1051
1052         * frv.cpu, frv.opc: Add support for fr550.
1053
1054 2003-09-24  Dave Brolley  <brolley@redhat.com>
1055
1056         * frv.cpu (u-commit): New modelling unit for fr500.
1057         (mwtaccg): Use frv_ref_SI to reference ACC40Sk as an input operand.
1058         (commit-r): Use u-commit model for fr500.
1059         (commit): Ditto.
1060         (conditional-float-binary-op): Take profiling data as an argument.
1061         Update callers.
1062         (ne-float-binary-op): Ditto.
1063
1064 2003-09-19  Michael Snyder  <msnyder@redhat.com>
1065
1066         * frv.cpu (nldqi): Delete unimplemented instruction.
1067
1068 2003-09-12  Dave Brolley  <brolley@redhat.com>
1069
1070         * frv.cpu (u-clrgr, u-clrfr): New units of model fr500.
1071         (clear-ne-flag-r): Pass insn profiling in as an argument. Call
1072         frv_ref_SI to get input register referenced for profiling.
1073         (clear-ne-flag-all): Pass insn profiling in as an argument.
1074         (clrgr,clrfr,clrga,clrfa): Add profiling information.
1075
1076 2003-09-11  Michael Snyder  <msnyder@redhat.com>
1077
1078         * frv.cpu: Typographical corrections.
1079
1080 2003-09-09  Dave Brolley  <brolley@redhat.com>
1081
1082         * frv.cpu (media-dual-complex): Change UNIT to FMALL.
1083         (conditional-media-dual-complex, media-quad-complex): Likewise.
1084
1085 2003-09-04  Dave Brolley  <brolley@redhat.com>
1086
1087         * frv.cpu (register-transfer): Pass in all attributes in on argument.
1088         Update all callers.
1089         (conditional-register-transfer): Ditto.
1090         (cache-preload): Ditto.
1091         (floating-point-conversion): Ditto.
1092         (floating-point-neg): Ditto.
1093         (float-abs): Ditto.
1094         (float-binary-op-s): Ditto.
1095         (conditional-float-binary-op): Ditto.
1096         (ne-float-binary-op): Ditto.
1097         (float-dual-arith): Ditto.
1098         (ne-float-dual-arith): Ditto.
1099
1100 2003-09-03  Dave Brolley  <brolley@redhat.com>
1101
1102         * frv.opc (parse_A, parse_A0, parse_A1): New parse handlers.
1103         * frv.cpu (UNIT): Add IALL, FMALL, FMLOW, STORE, SCAN, DCPL, MDUALACC,
1104         MCLRACC-1.
1105         (A): Removed operand.
1106         (A0,A1): New operands replace operand A.
1107         (mnop): Now a real insn
1108         (mclracc): Removed insn.
1109         (mclracc-0, mclracc-1): New insns replace mclracc.
1110         (all insns): Use new UNIT attributes.
1111
1112 2003-08-21  Nick Clifton  <nickc@redhat.com>
1113
1114         * frv.cpu (mbtoh): Replace input parameter to u-media-dual-expand
1115         and u-media-dual-btoh with output parameter.
1116         (cmbtoh): Add profiling hack.
1117
1118 2003-08-19  Michael Snyder  <msnyder@redhat.com>
1119
1120         * frv.cpu: Fix typo, Frintkeven -> FRintkeven
1121
1122 2003-06-10  Doug Evans  <dje@sebabeach.org>
1123
1124         * frv.cpu: Add IDOC attribute.
1125
1126 2003-06-06  Andrew Cagney  <cagney@redhat.com>
1127
1128         Contributed by Red Hat.
1129         * iq2000.cpu: New file.  Written by Ben Elliston, Jeff Johnston,
1130         Stan Cox, and Frank Ch. Eigler.
1131         * iq2000.opc: New file.  Written by Ben Elliston, Frank
1132         Ch. Eigler, Chris Moller, Jeff Johnston, and Stan Cox.
1133         * iq2000m.cpu: New file.  Written by Jeff Johnston.
1134         * iq10.cpu: New file.  Written by Jeff Johnston.
1135
1136 2003-06-05  Nick Clifton  <nickc@redhat.com>
1137
1138         * frv.cpu (FRintieven): New operand.  An even-numbered only
1139         version of the FRinti operand.
1140         (FRintjeven): Likewise for FRintj.
1141         (FRintkeven): Likewise for FRintk.
1142         (mdcutssi, media-dual-word-rotate-r-r, mqsaths,
1143         media-quad-arith-sat-semantics, media-quad-arith-sat,
1144         conditional-media-quad-arith-sat, mdunpackh,
1145         media-quad-multiply-semantics, media-quad-multiply,
1146         conditional-media-quad-multiply, media-quad-complex-i,
1147         media-quad-multiply-acc-semantics, media-quad-multiply-acc,
1148         conditional-media-quad-multiply-acc, munpackh,
1149         media-quad-multiply-cross-acc-semantics, mdpackh,
1150         media-quad-multiply-cross-acc, mbtoh-semantics,
1151         media-quad-cross-multiply-cross-acc-semantics,
1152         media-quad-cross-multiply-cross-acc, mbtoh, mhtob-semantics,
1153         media-quad-cross-multiply-acc-semantics, cmbtoh,
1154         media-quad-cross-multiply-acc, media-quad-complex, mhtob,
1155         media-expand-halfword-to-double-semantics, mexpdhd, cmexpdhd,
1156         cmhtob): Use new operands.
1157         * frv.opc (CGEN_VERBOSE_ASSEMBLER_ERRORS): Define.
1158         (parse_even_register): New function.
1159
1160 2003-06-03  Nick Clifton  <nickc@redhat.com>
1161
1162         * frv.cpu (media-dual-word-rotate-r-r): Use a signed 6-bit
1163         immediate value not unsigned.
1164
1165 2003-06-03  Andrew Cagney  <cagney@redhat.com>
1166
1167         Contributed by Red Hat.
1168         * frv.cpu: New file.  Written by Dave Brolley, Catherine Moore,
1169         and Eric Christopher.
1170         * frv.opc: New file.  Written by Catherine Moore, and Dave
1171         Brolley.
1172         * simplify.inc: New file.  Written by Doug Evans.
1173
1174 2003-05-02  Andrew Cagney  <cagney@redhat.com>
1175
1176         * New file.
1177
1178 \f
1179 Copyright (C) 2003-2012 Free Software Foundation, Inc.
1180
1181 Copying and distribution of this file, with or without modification,
1182 are permitted in any medium without royalty provided the copyright
1183 notice and this notice are preserved.
1184
1185 Local Variables:
1186 mode: change-log
1187 left-margin: 8
1188 fill-column: 74
1189 version-control: never
1190 End: