[deliverable/linux.git] / arch / arm / mach-s3c64xx / mach-crag6410-module.c

/* Speyside modules for Cragganmore - board data probing
 *
 * Copyright 2011 Wolfson Microelectronics plc
 *	Mark Brown <broonie@opensource.wolfsonmicro.com>
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 */

#include <linux/export.h>
#include <linux/interrupt.h>
#include <linux/i2c.h>
#include <linux/spi/spi.h>

#include <linux/mfd/wm831x/irq.h>
#include <linux/mfd/wm831x/gpio.h>
#include <linux/mfd/wm8994/pdata.h>
#include <linux/mfd/arizona/pdata.h>

#include <linux/regulator/machine.h>

#include <sound/wm0010.h>
#include <sound/wm2200.h>
#include <sound/wm5100.h>
#include <sound/wm8996.h>
#include <sound/wm8962.h>
#include <sound/wm9081.h>

#include <linux/platform_data/spi-s3c64xx.h>

#include <plat/cpu.h>
#include <mach/irqs.h>

#include "crag6410.h"

static struct s3c64xx_spi_csinfo wm0010_spi_csinfo = {
	.line = S3C64XX_GPC(3),
};

static struct wm0010_pdata wm0010_pdata = {
	.gpio_reset = S3C64XX_GPN(6),
	.reset_active_high = 1, /* Active high for Glenfarclas Rev 2 */
};

static struct spi_board_info wm1253_devs[] = {
	[0] = {
		.modalias	= "wm0010",
		.max_speed_hz	= 26 * 1000 * 1000,
		.bus_num	= 0,
		.chip_select	= 0,
		.mode		= SPI_MODE_0,
		.irq		= S3C_EINT(4),
		.controller_data = &wm0010_spi_csinfo,
		.platform_data = &wm0010_pdata,
	},
};

static struct spi_board_info balblair_devs[] = {
	[0] = {
		.modalias	= "wm0010",
		.max_speed_hz	= 26 * 1000 * 1000,
		.bus_num	= 0,
		.chip_select	= 0,
		.mode		= SPI_MODE_0,
		.irq		= S3C_EINT(4),
		.controller_data = &wm0010_spi_csinfo,
		.platform_data = &wm0010_pdata,
	},
};

static struct wm5100_pdata wm5100_pdata = {
	.ldo_ena = S3C64XX_GPN(7),
	.irq_flags = IRQF_TRIGGER_HIGH,
	.gpio_base = CODEC_GPIO_BASE,

	.in_mode = {
		WM5100_IN_DIFF,
		WM5100_IN_DIFF,
		WM5100_IN_DIFF,
		WM5100_IN_SE,
	},

	.hp_pol = CODEC_GPIO_BASE + 3,
	.jack_modes = {
		{ WM5100_MICDET_MICBIAS3, 0, 0 },
		{ WM5100_MICDET_MICBIAS2, 1, 1 },
	},

	.gpio_defaults = {
		0,
		0,
		0,
		0,
		0x2, /* IRQ: CMOS output */
		0x3, /* CLKOUT: CMOS output */
	},
};

static struct wm8996_retune_mobile_config wm8996_retune[] = {
	{
		.name = "Sub LPF",
		.rate = 48000,
		.regs = {
			0x6318, 0x6300, 0x1000, 0x0000, 0x0004, 0x2000, 0xF000,
			0x0000, 0x0004, 0x2000, 0xF000, 0x0000, 0x0004, 0x2000,
			0xF000, 0x0000, 0x0004, 0x1000, 0x0800, 0x4000
		},
	},
	{
		.name = "Sub HPF",
		.rate = 48000,
		.regs = {
			0x000A, 0x6300, 0x1000, 0x0000, 0x0004, 0x2000, 0xF000,
			0x0000, 0x0004, 0x2000, 0xF000, 0x0000, 0x0004, 0x2000,
			0xF000, 0x0000, 0x0004, 0x1000, 0x0800, 0x4000
		},
	},
};

static struct wm8996_pdata wm8996_pdata __initdata = {
	.ldo_ena = S3C64XX_GPN(7),
	.gpio_base = CODEC_GPIO_BASE,
	.micdet_def = 1,
	.inl_mode = WM8996_DIFFERRENTIAL_1,
	.inr_mode = WM8996_DIFFERRENTIAL_1,

	.irq_flags = IRQF_TRIGGER_RISING,

	.gpio_default = {
		0x8001, /* GPIO1 == ADCLRCLK1 */
		0x8001, /* GPIO2 == ADCLRCLK2, input due to CPU */
		0x0141, /* GPIO3 == HP_SEL */
		0x0002, /* GPIO4 == IRQ */
		0x020e, /* GPIO5 == CLKOUT */
	},

	.retune_mobile_cfgs = wm8996_retune,
	.num_retune_mobile_cfgs = ARRAY_SIZE(wm8996_retune),
};

static struct wm8962_pdata wm8962_pdata __initdata = {
	.gpio_init = {
		0,
		WM8962_GPIO_FN_OPCLK,
		WM8962_GPIO_FN_DMICCLK,
		0,
		0x8000 | WM8962_GPIO_FN_DMICDAT,
		WM8962_GPIO_FN_IRQ,    /* Open drain mode */
	},
	.in4_dc_measure = true,
};

static struct wm9081_pdata wm9081_pdata __initdata = {
	.irq_high = false,
	.irq_cmos = false,
};

static const struct i2c_board_info wm1254_devs[] = {
	{ I2C_BOARD_INFO("wm8996", 0x1a),
	  .platform_data = &wm8996_pdata,
	  .irq = GLENFARCLAS_PMIC_IRQ_BASE + WM831X_IRQ_GPIO_2,
	},
	{ I2C_BOARD_INFO("wm9081", 0x6c),
	  .platform_data = &wm9081_pdata, },
};

static const struct i2c_board_info wm1255_devs[] = {
	{ I2C_BOARD_INFO("wm5100", 0x1a),
	  .platform_data = &wm5100_pdata,
	  .irq = GLENFARCLAS_PMIC_IRQ_BASE + WM831X_IRQ_GPIO_2,
	},
	{ I2C_BOARD_INFO("wm9081", 0x6c),
	  .platform_data = &wm9081_pdata, },
};

static const struct i2c_board_info wm1259_devs[] = {
	{ I2C_BOARD_INFO("wm8962", 0x1a),
	  .platform_data = &wm8962_pdata,
	  .irq = GLENFARCLAS_PMIC_IRQ_BASE + WM831X_IRQ_GPIO_2,
	},
};

static struct regulator_init_data wm8994_ldo1 = {
	.supply_regulator = "WALLVDD",
};

static struct regulator_init_data wm8994_ldo2 = {
	.supply_regulator = "WALLVDD",
};

static struct wm8994_pdata wm8994_pdata = {
	.gpio_base = CODEC_GPIO_BASE,
	.micb2_delay = 150,
	.gpio_defaults = {
		0x3,          /* IRQ out, active high, CMOS */
	},
	.ldo = {
		 { .enable = S3C64XX_GPN(6), .init_data = &wm8994_ldo1, },
		 { .enable = S3C64XX_GPN(4), .init_data = &wm8994_ldo2, },
	},
};

static const struct i2c_board_info wm1277_devs[] = {
	{ I2C_BOARD_INFO("wm8958", 0x1a),  /* WM8958 is the superset */
	  .platform_data = &wm8994_pdata,
	  .irq = GLENFARCLAS_PMIC_IRQ_BASE + WM831X_IRQ_GPIO_2,
	},
};

static struct arizona_pdata wm5102_reva_pdata = {
	.ldoena = S3C64XX_GPN(7),
	.gpio_base = CODEC_GPIO_BASE,
	.irq_flags = IRQF_TRIGGER_HIGH,
	.micd_pol_gpio = CODEC_GPIO_BASE + 4,
	.micd_rate = 6,
	.gpio_defaults = {
		[2] = 0x10000, /* AIF3TXLRCLK */
		[3] = 0x4,     /* OPCLK */
	},
};

static struct s3c64xx_spi_csinfo codec_spi_csinfo = {
	.line = S3C64XX_GPN(5),
};

static struct spi_board_info wm5102_reva_spi_devs[] = {
	[0] = {
		.modalias	= "wm5102",
		.max_speed_hz	= 10 * 1000 * 1000,
		.bus_num	= 0,
		.chip_select	= 1,
		.mode		= SPI_MODE_0,
		.irq		= GLENFARCLAS_PMIC_IRQ_BASE +
				  WM831X_IRQ_GPIO_2,
		.controller_data = &codec_spi_csinfo,
		.platform_data = &wm5102_reva_pdata,
	},
};

static struct arizona_pdata wm5102_pdata = {
	.ldoena = S3C64XX_GPN(7),
	.gpio_base = CODEC_GPIO_BASE,
	.irq_flags = IRQF_TRIGGER_HIGH,
	.micd_pol_gpio = CODEC_GPIO_BASE + 2,
	.gpio_defaults = {
		[2] = 0x10000, /* AIF3TXLRCLK */
		[3] = 0x4,     /* OPCLK */
	},
};

static struct spi_board_info wm5102_spi_devs[] = {
	[0] = {
		.modalias	= "wm5102",
		.max_speed_hz	= 10 * 1000 * 1000,
		.bus_num	= 0,
		.chip_select	= 1,
		.mode		= SPI_MODE_0,
		.irq		= GLENFARCLAS_PMIC_IRQ_BASE +
				  WM831X_IRQ_GPIO_2,
		.controller_data = &codec_spi_csinfo,
		.platform_data = &wm5102_pdata,
	},
};

static struct spi_board_info wm5110_spi_devs[] = {
	[0] = {
		.modalias	= "wm5110",
		.max_speed_hz	= 10 * 1000 * 1000,
		.bus_num	= 0,
		.chip_select	= 1,
		.mode		= SPI_MODE_0,
		.irq		= GLENFARCLAS_PMIC_IRQ_BASE +
				  WM831X_IRQ_GPIO_2,
		.controller_data = &codec_spi_csinfo,
		.platform_data = &wm5102_reva_pdata,
	},
};

static const struct i2c_board_info wm6230_i2c_devs[] = {
	{ I2C_BOARD_INFO("wm9081", 0x6c),
	  .platform_data = &wm9081_pdata, },
};

static struct wm2200_pdata wm2200_pdata = {
	.ldo_ena = S3C64XX_GPN(7),
	.gpio_defaults = {
		[2] = 0x0005,  /* GPIO3 24.576MHz output clock */
	},
};

static const struct i2c_board_info wm2200_i2c[] = {
	{ I2C_BOARD_INFO("wm2200", 0x3a),
	  .platform_data = &wm2200_pdata, },
};

static const struct {
	u8 id;
	u8 rev;
	const char *name;
	const struct i2c_board_info *i2c_devs;
	int num_i2c_devs;
	const struct spi_board_info *spi_devs;
	int num_spi_devs;
} gf_mods[] = {
	{ .id = 0x01, .rev = 0xff, .name = "1250-EV1 Springbank" },
	{ .id = 0x02, .rev = 0xff, .name = "1251-EV1 Jura" },
	{ .id = 0x03, .rev = 0xff, .name = "1252-EV1 Glenlivet" },
	{ .id = 0x06, .rev = 0xff, .name = "WM8997-6721-CS96-EV1 Lapraoig" },
	{ .id = 0x07, .rev = 0xff, .name = "WM5110-6271 Deanston",
	  .spi_devs = wm5110_spi_devs,
	  .num_spi_devs = ARRAY_SIZE(wm5110_spi_devs) },
	{ .id = 0x08, .rev = 0xff, .name = "WM8903-6102 Tamdhu" },
	{ .id = 0x09, .rev = 0xff, .name = "WM1811A-6305 Adelphi" },
	{ .id = 0x0a, .rev = 0xff, .name = "WM8996-6272 Blackadder" },
	{ .id = 0x0b, .rev = 0xff, .name = "WM8994-6235 Benromach" },
	{ .id = 0x11, .rev = 0xff, .name = "6249-EV2 Glenfarclas", },
	{ .id = 0x14, .rev = 0xff, .name = "6271-EV1 Lochnagar" },
	{ .id = 0x15, .rev = 0xff, .name = "6320-EV1 Bells",
	  .i2c_devs = wm6230_i2c_devs,
	  .num_i2c_devs = ARRAY_SIZE(wm6230_i2c_devs) },
	{ .id = 0x21, .rev = 0xff, .name = "1275-EV1 Mortlach" },
	{ .id = 0x25, .rev = 0xff, .name = "1274-EV1 Glencadam" },
	{ .id = 0x31, .rev = 0xff, .name = "1253-EV1 Tomatin",
	  .spi_devs = wm1253_devs, .num_spi_devs = ARRAY_SIZE(wm1253_devs) },
	{ .id = 0x32, .rev = 0xff, .name = "XXXX-EV1 Caol Illa" },
	{ .id = 0x33, .rev = 0xff, .name = "XXXX-EV1 Oban" },
	{ .id = 0x34, .rev = 0xff, .name = "WM0010-6320-CS42 Balblair",
	  .spi_devs = balblair_devs,
	  .num_spi_devs = ARRAY_SIZE(balblair_devs) },
	{ .id = 0x39, .rev = 0xff, .name = "1254-EV1 Dallas Dhu",
	  .i2c_devs = wm1254_devs, .num_i2c_devs = ARRAY_SIZE(wm1254_devs) },
	{ .id = 0x3a, .rev = 0xff, .name = "1259-EV1 Tobermory",
	  .i2c_devs = wm1259_devs, .num_i2c_devs = ARRAY_SIZE(wm1259_devs) },
	{ .id = 0x3b, .rev = 0xff, .name = "1255-EV1 Kilchoman",
	  .i2c_devs = wm1255_devs, .num_i2c_devs = ARRAY_SIZE(wm1255_devs) },
	{ .id = 0x3c, .rev = 0xff, .name = "1273-EV1 Longmorn" },
	{ .id = 0x3d, .rev = 0xff, .name = "1277-EV1 Littlemill",
	  .i2c_devs = wm1277_devs, .num_i2c_devs = ARRAY_SIZE(wm1277_devs) },
	{ .id = 0x3e, .rev = 0, .name = "WM5102-6271-EV1-CS127 Amrut",
	  .spi_devs = wm5102_reva_spi_devs,
	  .num_spi_devs = ARRAY_SIZE(wm5102_reva_spi_devs) },
	{ .id = 0x3e, .rev = -1, .name = "WM5102-6271-EV1-CS127 Amrut",
	  .spi_devs = wm5102_spi_devs,
	  .num_spi_devs = ARRAY_SIZE(wm5102_spi_devs) },
	{ .id = 0x3f, .rev = -1, .name = "WM2200-6271-CS90-M-REV1",
	  .i2c_devs = wm2200_i2c, .num_i2c_devs = ARRAY_SIZE(wm2200_i2c) },
};

static int wlf_gf_module_probe(struct i2c_client *i2c,
			       const struct i2c_device_id *i2c_id)
{
	int ret, i, j, id, rev;

	ret = i2c_smbus_read_byte_data(i2c, 0);
	if (ret < 0) {
		dev_err(&i2c->dev, "Failed to read ID: %d\n", ret);
		return ret;
	}

	id = (ret & 0xfe) >> 2;
	rev = ret & 0x3;
	for (i = 0; i < ARRAY_SIZE(gf_mods); i++)
		if (id == gf_mods[i].id && (gf_mods[i].rev == 0xff ||
					    rev == gf_mods[i].rev))
			break;

	if (i < ARRAY_SIZE(gf_mods)) {
		dev_info(&i2c->dev, "%s revision %d\n",
			 gf_mods[i].name, rev + 1);

		for (j = 0; j < gf_mods[i].num_i2c_devs; j++) {
			if (!i2c_new_device(i2c->adapter,
					    &(gf_mods[i].i2c_devs[j])))
				dev_err(&i2c->dev,
					"Failed to register dev: %d\n", ret);
		}

		spi_register_board_info(gf_mods[i].spi_devs,
					gf_mods[i].num_spi_devs);
	} else {
		dev_warn(&i2c->dev, "Unknown module ID 0x%x revision %d\n",
			 id, rev + 1);
	}

	return 0;
}

static const struct i2c_device_id wlf_gf_module_id[] = {
	{ "wlf-gf-module", 0 },
	{ }
};

static struct i2c_driver wlf_gf_module_driver = {
	.driver = {
		.name = "wlf-gf-module"
	},
	.probe = wlf_gf_module_probe,
	.id_table = wlf_gf_module_id,
};

static int __init wlf_gf_module_register(void)
{
	if (!soc_is_s3c64xx())
		return 0;

	return i2c_add_driver(&wlf_gf_module_driver);
}
device_initcall(wlf_gf_module_register);
Commit	Line	Data
d0f0b43f MB	1	/* Speyside modules for Cragganmore - board data probing
	2	*
	3	* Copyright 2011 Wolfson Microelectronics plc
	4	* Mark Brown <broonie@opensource.wolfsonmicro.com>
	5	*
	6	* This program is free software; you can redistribute it and/or modify
	7	* it under the terms of the GNU General Public License version 2 as
	8	* published by the Free Software Foundation.
	9	*/
	10
a69e4c28	11	#include <linux/export.h>
d0f0b43f MB	12	#include <linux/interrupt.h>
d0f0b43f MB	13	#include <linux/i2c.h>
cda2349a	14	#include <linux/spi/spi.h>
d0f0b43f MB	15
	16	#include <linux/mfd/wm831x/irq.h>
	17	#include <linux/mfd/wm831x/gpio.h>
c5c32c96	18	#include <linux/mfd/wm8994/pdata.h>
853b1eb8	19	#include <linux/mfd/arizona/pdata.h>
d0f0b43f	20
719a4240 MB	21	#include <linux/regulator/machine.h>
719a4240 MB	22
c8968ad8	23	#include <sound/wm0010.h>
e6a194b7	24	#include <sound/wm2200.h>
3d19f1cd	25	#include <sound/wm5100.h>
d0f0b43f MB	26	#include <sound/wm8996.h>
	27	#include <sound/wm8962.h>
	28	#include <sound/wm9081.h>
	29
436d42c6	30	#include <linux/platform_data/spi-s3c64xx.h>
cda2349a	31
a0e157af	32	#include <plat/cpu.h>
ba279044 AB	33	#include <mach/irqs.h>
ba279044 AB	34
e6235928	35	#include "crag6410.h"
d0f0b43f	36
cda2349a	37	static struct s3c64xx_spi_csinfo wm0010_spi_csinfo = {
cda2349a MB	38	.line = S3C64XX_GPC(3),
	39	};
	40
c8968ad8 MB	41	static struct wm0010_pdata wm0010_pdata = {
	42	.gpio_reset = S3C64XX_GPN(6),
	43	.reset_active_high = 1, /* Active high for Glenfarclas Rev 2 */
	44	};
	45
cda2349a MB	46	static struct spi_board_info wm1253_devs[] = {
	47	[0] = {
	48	.modalias = "wm0010",
c8968ad8 MB	49	.max_speed_hz = 26 * 1000 * 1000,
	50	.bus_num = 0,
	51	.chip_select = 0,
	52	.mode = SPI_MODE_0,
b86dc0d8	53	.irq = S3C_EINT(4),
c8968ad8 MB	54	.controller_data = &wm0010_spi_csinfo,
	55	.platform_data = &wm0010_pdata,
	56	},
	57	};
	58
	59	static struct spi_board_info balblair_devs[] = {
	60	[0] = {
	61	.modalias = "wm0010",
	62	.max_speed_hz = 26 * 1000 * 1000,
cda2349a MB	63	.bus_num = 0,
	64	.chip_select = 0,
	65	.mode = SPI_MODE_0,
f032b49e	66	.irq = S3C_EINT(4),
cda2349a	67	.controller_data = &wm0010_spi_csinfo,
c8968ad8	68	.platform_data = &wm0010_pdata,
cda2349a MB	69	},
	70	};
	71
3d19f1cd MB	72	static struct wm5100_pdata wm5100_pdata = {
	73	.ldo_ena = S3C64XX_GPN(7),
	74	.irq_flags = IRQF_TRIGGER_HIGH,
	75	.gpio_base = CODEC_GPIO_BASE,
	76
	77	.in_mode = {
	78	WM5100_IN_DIFF,
	79	WM5100_IN_DIFF,
	80	WM5100_IN_DIFF,
	81	WM5100_IN_SE,
	82	},
	83
	84	.hp_pol = CODEC_GPIO_BASE + 3,
	85	.jack_modes = {
	86	{ WM5100_MICDET_MICBIAS3, 0, 0 },
	87	{ WM5100_MICDET_MICBIAS2, 1, 1 },
	88	},
	89
	90	.gpio_defaults = {
	91	0,
	92	0,
	93	0,
	94	0,
	95	0x2, /* IRQ: CMOS output */
	96	0x3, /* CLKOUT: CMOS output */
	97	},
	98	};
	99
d0f0b43f MB	100	static struct wm8996_retune_mobile_config wm8996_retune[] = {
	101	{
	102	.name = "Sub LPF",
	103	.rate = 48000,
	104	.regs = {
	105	0x6318, 0x6300, 0x1000, 0x0000, 0x0004, 0x2000, 0xF000,
	106	0x0000, 0x0004, 0x2000, 0xF000, 0x0000, 0x0004, 0x2000,
	107	0xF000, 0x0000, 0x0004, 0x1000, 0x0800, 0x4000
	108	},
	109	},
	110	{
	111	.name = "Sub HPF",
	112	.rate = 48000,
	113	.regs = {
	114	0x000A, 0x6300, 0x1000, 0x0000, 0x0004, 0x2000, 0xF000,
	115	0x0000, 0x0004, 0x2000, 0xF000, 0x0000, 0x0004, 0x2000,
	116	0xF000, 0x0000, 0x0004, 0x1000, 0x0800, 0x4000
	117	},
	118	},
	119	};
	120
	121	static struct wm8996_pdata wm8996_pdata __initdata = {
	122	.ldo_ena = S3C64XX_GPN(7),
	123	.gpio_base = CODEC_GPIO_BASE,
	124	.micdet_def = 1,
	125	.inl_mode = WM8996_DIFFERRENTIAL_1,
	126	.inr_mode = WM8996_DIFFERRENTIAL_1,
	127
	128	.irq_flags = IRQF_TRIGGER_RISING,
	129
	130	.gpio_default = {
	131	0x8001, /* GPIO1 == ADCLRCLK1 */
	132	0x8001, /* GPIO2 == ADCLRCLK2, input due to CPU */
	133	0x0141, /* GPIO3 == HP_SEL */
	134	0x0002, /* GPIO4 == IRQ */
	135	0x020e, /* GPIO5 == CLKOUT */
	136	},
	137
	138	.retune_mobile_cfgs = wm8996_retune,
	139	.num_retune_mobile_cfgs = ARRAY_SIZE(wm8996_retune),
	140	};
	141
	142	static struct wm8962_pdata wm8962_pdata __initdata = {
	143	.gpio_init = {
	144	0,
	145	WM8962_GPIO_FN_OPCLK,
	146	WM8962_GPIO_FN_DMICCLK,
	147	0,
	148	0x8000 \| WM8962_GPIO_FN_DMICDAT,
	149	WM8962_GPIO_FN_IRQ, /* Open drain mode */
	150	},
4b9c85f9	151	.in4_dc_measure = true,
d0f0b43f MB	152	};
	153
	154	static struct wm9081_pdata wm9081_pdata __initdata = {
	155	.irq_high = false,
	156	.irq_cmos = false,
	157	};
	158
	159	static const struct i2c_board_info wm1254_devs[] = {
	160	{ I2C_BOARD_INFO("wm8996", 0x1a),
	161	.platform_data = &wm8996_pdata,
	162	.irq = GLENFARCLAS_PMIC_IRQ_BASE + WM831X_IRQ_GPIO_2,
	163	},
	164	{ I2C_BOARD_INFO("wm9081", 0x6c),
	165	.platform_data = &wm9081_pdata, },
	166	};
	167
3aa7779c MB	168	static const struct i2c_board_info wm1255_devs[] = {
3aa7779c MB	169	{ I2C_BOARD_INFO("wm5100", 0x1a),
3d19f1cd	170	.platform_data = &wm5100_pdata,
3aa7779c MB	171	.irq = GLENFARCLAS_PMIC_IRQ_BASE + WM831X_IRQ_GPIO_2,
	172	},
	173	{ I2C_BOARD_INFO("wm9081", 0x6c),
	174	.platform_data = &wm9081_pdata, },
	175	};
	176
d0f0b43f MB	177	static const struct i2c_board_info wm1259_devs[] = {
	178	{ I2C_BOARD_INFO("wm8962", 0x1a),
	179	.platform_data = &wm8962_pdata,
	180	.irq = GLENFARCLAS_PMIC_IRQ_BASE + WM831X_IRQ_GPIO_2,
	181	},
	182	};
	183
bd155d2c MB	184	static struct regulator_init_data wm8994_ldo1 = {
	185	.supply_regulator = "WALLVDD",
	186	};
	187
	188	static struct regulator_init_data wm8994_ldo2 = {
	189	.supply_regulator = "WALLVDD",
	190	};
	191
c5c32c96 MB	192	static struct wm8994_pdata wm8994_pdata = {
c5c32c96 MB	193	.gpio_base = CODEC_GPIO_BASE,
b23bc66c	194	.micb2_delay = 150,
c5c32c96 MB	195	.gpio_defaults = {
	196	0x3, /* IRQ out, active high, CMOS */
	197	},
c5c32c96	198	.ldo = {
b23bc66c MB	199	{ .enable = S3C64XX_GPN(6), .init_data = &wm8994_ldo1, },
b23bc66c MB	200	{ .enable = S3C64XX_GPN(4), .init_data = &wm8994_ldo2, },
c5c32c96 MB	201	},
	202	};
	203
	204	static const struct i2c_board_info wm1277_devs[] = {
	205	{ I2C_BOARD_INFO("wm8958", 0x1a), /* WM8958 is the superset */
	206	.platform_data = &wm8994_pdata,
	207	.irq = GLENFARCLAS_PMIC_IRQ_BASE + WM831X_IRQ_GPIO_2,
	208	},
	209	};
d0f0b43f	210
b23bc66c	211	static struct arizona_pdata wm5102_reva_pdata = {
853b1eb8 MB	212	.ldoena = S3C64XX_GPN(7),
853b1eb8 MB	213	.gpio_base = CODEC_GPIO_BASE,
f8a0941f	214	.irq_flags = IRQF_TRIGGER_HIGH,
853b1eb8	215	.micd_pol_gpio = CODEC_GPIO_BASE + 4,
1fa86dcf	216	.micd_rate = 6,
853b1eb8 MB	217	.gpio_defaults = {
	218	[2] = 0x10000, /* AIF3TXLRCLK */
	219	[3] = 0x4, /* OPCLK */
	220	},
	221	};
	222
41830ee0	223	static struct s3c64xx_spi_csinfo codec_spi_csinfo = {
853b1eb8 MB	224	.line = S3C64XX_GPN(5),
	225	};
	226
b23bc66c MB	227	static struct spi_board_info wm5102_reva_spi_devs[] = {
	228	[0] = {
	229	.modalias = "wm5102",
	230	.max_speed_hz = 10 * 1000 * 1000,
	231	.bus_num = 0,
	232	.chip_select = 1,
	233	.mode = SPI_MODE_0,
	234	.irq = GLENFARCLAS_PMIC_IRQ_BASE +
	235	WM831X_IRQ_GPIO_2,
41830ee0	236	.controller_data = &codec_spi_csinfo,
b23bc66c MB	237	.platform_data = &wm5102_reva_pdata,
	238	},
	239	};
	240
	241	static struct arizona_pdata wm5102_pdata = {
	242	.ldoena = S3C64XX_GPN(7),
	243	.gpio_base = CODEC_GPIO_BASE,
f8a0941f	244	.irq_flags = IRQF_TRIGGER_HIGH,
b23bc66c MB	245	.micd_pol_gpio = CODEC_GPIO_BASE + 2,
	246	.gpio_defaults = {
	247	[2] = 0x10000, /* AIF3TXLRCLK */
	248	[3] = 0x4, /* OPCLK */
	249	},
	250	};
	251
853b1eb8 MB	252	static struct spi_board_info wm5102_spi_devs[] = {
	253	[0] = {
	254	.modalias = "wm5102",
	255	.max_speed_hz = 10 * 1000 * 1000,
	256	.bus_num = 0,
479535ed	257	.chip_select = 1,
853b1eb8 MB	258	.mode = SPI_MODE_0,
	259	.irq = GLENFARCLAS_PMIC_IRQ_BASE +
	260	WM831X_IRQ_GPIO_2,
41830ee0	261	.controller_data = &codec_spi_csinfo,
853b1eb8 MB	262	.platform_data = &wm5102_pdata,
853b1eb8 MB	263	},
9b6e1b0e MB	264	};
9b6e1b0e MB	265
41830ee0 MB	266	static struct spi_board_info wm5110_spi_devs[] = {
	267	[0] = {
	268	.modalias = "wm5110",
	269	.max_speed_hz = 10 * 1000 * 1000,
	270	.bus_num = 0,
	271	.chip_select = 1,
	272	.mode = SPI_MODE_0,
	273	.irq = GLENFARCLAS_PMIC_IRQ_BASE +
	274	WM831X_IRQ_GPIO_2,
	275	.controller_data = &codec_spi_csinfo,
	276	.platform_data = &wm5102_reva_pdata,
	277	},
	278	};
	279
98dcf905 MB	280	static const struct i2c_board_info wm6230_i2c_devs[] = {
	281	{ I2C_BOARD_INFO("wm9081", 0x6c),
	282	.platform_data = &wm9081_pdata, },
	283	};
	284
e6a194b7 MB	285	static struct wm2200_pdata wm2200_pdata = {
	286	.ldo_ena = S3C64XX_GPN(7),
	287	.gpio_defaults = {
	288	[2] = 0x0005, /* GPIO3 24.576MHz output clock */
	289	},
	290	};
	291
	292	static const struct i2c_board_info wm2200_i2c[] = {
	293	{ I2C_BOARD_INFO("wm2200", 0x3a),
	294	.platform_data = &wm2200_pdata, },
	295	};
	296
351a102d	297	static const struct {
d0f0b43f	298	u8 id;
64aecb4a	299	u8 rev;
d0f0b43f MB	300	const char *name;
	301	const struct i2c_board_info *i2c_devs;
	302	int num_i2c_devs;
cda2349a MB	303	const struct spi_board_info *spi_devs;
cda2349a MB	304	int num_spi_devs;
d0f0b43f	305	} gf_mods[] = {
64aecb4a MB	306	{ .id = 0x01, .rev = 0xff, .name = "1250-EV1 Springbank" },
	307	{ .id = 0x02, .rev = 0xff, .name = "1251-EV1 Jura" },
	308	{ .id = 0x03, .rev = 0xff, .name = "1252-EV1 Glenlivet" },
	309	{ .id = 0x06, .rev = 0xff, .name = "WM8997-6721-CS96-EV1 Lapraoig" },
41830ee0 MB	310	{ .id = 0x07, .rev = 0xff, .name = "WM5110-6271 Deanston",
	311	.spi_devs = wm5110_spi_devs,
	312	.num_spi_devs = ARRAY_SIZE(wm5110_spi_devs) },
64aecb4a MB	313	{ .id = 0x08, .rev = 0xff, .name = "WM8903-6102 Tamdhu" },
	314	{ .id = 0x09, .rev = 0xff, .name = "WM1811A-6305 Adelphi" },
	315	{ .id = 0x0a, .rev = 0xff, .name = "WM8996-6272 Blackadder" },
	316	{ .id = 0x0b, .rev = 0xff, .name = "WM8994-6235 Benromach" },
	317	{ .id = 0x11, .rev = 0xff, .name = "6249-EV2 Glenfarclas", },
	318	{ .id = 0x14, .rev = 0xff, .name = "6271-EV1 Lochnagar" },
	319	{ .id = 0x15, .rev = 0xff, .name = "6320-EV1 Bells",
98dcf905 MB	320	.i2c_devs = wm6230_i2c_devs,
98dcf905 MB	321	.num_i2c_devs = ARRAY_SIZE(wm6230_i2c_devs) },
64aecb4a MB	322	{ .id = 0x21, .rev = 0xff, .name = "1275-EV1 Mortlach" },
	323	{ .id = 0x25, .rev = 0xff, .name = "1274-EV1 Glencadam" },
	324	{ .id = 0x31, .rev = 0xff, .name = "1253-EV1 Tomatin",
cda2349a	325	.spi_devs = wm1253_devs, .num_spi_devs = ARRAY_SIZE(wm1253_devs) },
64aecb4a MB	326	{ .id = 0x32, .rev = 0xff, .name = "XXXX-EV1 Caol Illa" },
	327	{ .id = 0x33, .rev = 0xff, .name = "XXXX-EV1 Oban" },
	328	{ .id = 0x34, .rev = 0xff, .name = "WM0010-6320-CS42 Balblair",
c8968ad8 MB	329	.spi_devs = balblair_devs,
c8968ad8 MB	330	.num_spi_devs = ARRAY_SIZE(balblair_devs) },
64aecb4a	331	{ .id = 0x39, .rev = 0xff, .name = "1254-EV1 Dallas Dhu",
d0f0b43f	332	.i2c_devs = wm1254_devs, .num_i2c_devs = ARRAY_SIZE(wm1254_devs) },
64aecb4a	333	{ .id = 0x3a, .rev = 0xff, .name = "1259-EV1 Tobermory",
d0f0b43f	334	.i2c_devs = wm1259_devs, .num_i2c_devs = ARRAY_SIZE(wm1259_devs) },
64aecb4a	335	{ .id = 0x3b, .rev = 0xff, .name = "1255-EV1 Kilchoman",
3aa7779c	336	.i2c_devs = wm1255_devs, .num_i2c_devs = ARRAY_SIZE(wm1255_devs) },
64aecb4a MB	337	{ .id = 0x3c, .rev = 0xff, .name = "1273-EV1 Longmorn" },
64aecb4a MB	338	{ .id = 0x3d, .rev = 0xff, .name = "1277-EV1 Littlemill",
c5c32c96	339	.i2c_devs = wm1277_devs, .num_i2c_devs = ARRAY_SIZE(wm1277_devs) },
b23bc66c MB	340	{ .id = 0x3e, .rev = 0, .name = "WM5102-6271-EV1-CS127 Amrut",
	341	.spi_devs = wm5102_reva_spi_devs,
	342	.num_spi_devs = ARRAY_SIZE(wm5102_reva_spi_devs) },
64aecb4a	343	{ .id = 0x3e, .rev = -1, .name = "WM5102-6271-EV1-CS127 Amrut",
853b1eb8 MB	344	.spi_devs = wm5102_spi_devs,
853b1eb8 MB	345	.num_spi_devs = ARRAY_SIZE(wm5102_spi_devs) },
e6a194b7 MB	346	{ .id = 0x3f, .rev = -1, .name = "WM2200-6271-CS90-M-REV1",
e6a194b7 MB	347	.i2c_devs = wm2200_i2c, .num_i2c_devs = ARRAY_SIZE(wm2200_i2c) },
d0f0b43f MB	348	};
d0f0b43f MB	349
351a102d GKH	350	static int wlf_gf_module_probe(struct i2c_client *i2c,
351a102d GKH	351	const struct i2c_device_id *i2c_id)
d0f0b43f MB	352	{
	353	int ret, i, j, id, rev;
	354
	355	ret = i2c_smbus_read_byte_data(i2c, 0);
	356	if (ret < 0) {
	357	dev_err(&i2c->dev, "Failed to read ID: %d\n", ret);
	358	return ret;
	359	}
	360
	361	id = (ret & 0xfe) >> 2;
	362	rev = ret & 0x3;
	363	for (i = 0; i < ARRAY_SIZE(gf_mods); i++)
64aecb4a MB	364	if (id == gf_mods[i].id && (gf_mods[i].rev == 0xff \|\|
64aecb4a MB	365	rev == gf_mods[i].rev))
d0f0b43f MB	366	break;
	367
	368	if (i < ARRAY_SIZE(gf_mods)) {
	369	dev_info(&i2c->dev, "%s revision %d\n",
	370	gf_mods[i].name, rev + 1);
cda2349a	371
d0f0b43f MB	372	for (j = 0; j < gf_mods[i].num_i2c_devs; j++) {
	373	if (!i2c_new_device(i2c->adapter,
	374	&(gf_mods[i].i2c_devs[j])))
	375	dev_err(&i2c->dev,
	376	"Failed to register dev: %d\n", ret);
	377	}
cda2349a MB	378
	379	spi_register_board_info(gf_mods[i].spi_devs,
	380	gf_mods[i].num_spi_devs);
d0f0b43f	381	} else {
fc716894 MB	382	dev_warn(&i2c->dev, "Unknown module ID 0x%x revision %d\n",
fc716894 MB	383	id, rev + 1);
d0f0b43f MB	384	}
	385
	386	return 0;
	387	}
	388
	389	static const struct i2c_device_id wlf_gf_module_id[] = {
	390	{ "wlf-gf-module", 0 },
	391	{ }
	392	};
	393
	394	static struct i2c_driver wlf_gf_module_driver = {
	395	.driver = {
21c66101	396	.name = "wlf-gf-module"
d0f0b43f MB	397	},
	398	.probe = wlf_gf_module_probe,
	399	.id_table = wlf_gf_module_id,
	400	};
	401
	402	static int __init wlf_gf_module_register(void)
	403	{
a0e157af AB	404	if (!soc_is_s3c64xx())
	405	return 0;
	406
d0f0b43f MB	407	return i2c_add_driver(&wlf_gf_module_driver);
d0f0b43f MB	408	}
baf64abc	409	device_initcall(wlf_gf_module_register);