Commit | Line | Data |
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bbf45ba5 HB |
1 | /* |
2 | * This program is free software; you can redistribute it and/or modify | |
3 | * it under the terms of the GNU General Public License, version 2, as | |
4 | * published by the Free Software Foundation. | |
5 | * | |
6 | * This program is distributed in the hope that it will be useful, | |
7 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
8 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
9 | * GNU General Public License for more details. | |
10 | * | |
11 | * You should have received a copy of the GNU General Public License | |
12 | * along with this program; if not, write to the Free Software | |
13 | * Foundation, 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. | |
14 | * | |
15 | * Copyright IBM Corp. 2007 | |
16 | * | |
17 | * Authors: Hollis Blanchard <hollisb@us.ibm.com> | |
18 | */ | |
19 | ||
20 | #ifndef __POWERPC_KVM_HOST_H__ | |
21 | #define __POWERPC_KVM_HOST_H__ | |
22 | ||
23 | #include <linux/mutex.h> | |
544c6761 AG |
24 | #include <linux/hrtimer.h> |
25 | #include <linux/interrupt.h> | |
bbf45ba5 HB |
26 | #include <linux/types.h> |
27 | #include <linux/kvm_types.h> | |
371fefd6 PM |
28 | #include <linux/threads.h> |
29 | #include <linux/spinlock.h> | |
96bc451a | 30 | #include <linux/kvm_para.h> |
aa04b4cc PM |
31 | #include <linux/list.h> |
32 | #include <linux/atomic.h> | |
bbf45ba5 | 33 | #include <asm/kvm_asm.h> |
371fefd6 | 34 | #include <asm/processor.h> |
342d3db7 | 35 | #include <asm/page.h> |
249ba1ee | 36 | #include <asm/cacheflush.h> |
bbf45ba5 | 37 | |
371fefd6 PM |
38 | #define KVM_MAX_VCPUS NR_CPUS |
39 | #define KVM_MAX_VCORES NR_CPUS | |
bbacc0c1 | 40 | #define KVM_USER_MEM_SLOTS 32 |
0743247f | 41 | #define KVM_MEM_SLOTS_NUM KVM_USER_MEM_SLOTS |
bbf45ba5 | 42 | |
de56a948 | 43 | #ifdef CONFIG_KVM_MMIO |
588968b6 | 44 | #define KVM_COALESCED_MMIO_PAGE_OFFSET 1 |
de56a948 | 45 | #endif |
588968b6 | 46 | |
de9ba2f3 AG |
47 | /* These values are internal and can be increased later */ |
48 | #define KVM_NR_IRQCHIPS 1 | |
49 | #define KVM_IRQCHIP_NUM_PINS 256 | |
50 | ||
9b0cb3c8 | 51 | #if !defined(CONFIG_KVM_440) |
342d3db7 PM |
52 | #include <linux/mmu_notifier.h> |
53 | ||
54 | #define KVM_ARCH_WANT_MMU_NOTIFIER | |
55 | ||
56 | struct kvm; | |
57 | extern int kvm_unmap_hva(struct kvm *kvm, unsigned long hva); | |
b3ae2096 TY |
58 | extern int kvm_unmap_hva_range(struct kvm *kvm, |
59 | unsigned long start, unsigned long end); | |
342d3db7 PM |
60 | extern int kvm_age_hva(struct kvm *kvm, unsigned long hva); |
61 | extern int kvm_test_age_hva(struct kvm *kvm, unsigned long hva); | |
62 | extern void kvm_set_spte_hva(struct kvm *kvm, unsigned long hva, pte_t pte); | |
63 | ||
64 | #endif | |
65 | ||
fef093be AG |
66 | #define HPTEG_CACHE_NUM (1 << 15) |
67 | #define HPTEG_HASH_BITS_PTE 13 | |
2d27fc5e | 68 | #define HPTEG_HASH_BITS_PTE_LONG 12 |
fef093be AG |
69 | #define HPTEG_HASH_BITS_VPTE 13 |
70 | #define HPTEG_HASH_BITS_VPTE_LONG 5 | |
a4a0f252 | 71 | #define HPTEG_HASH_BITS_VPTE_64K 11 |
fef093be | 72 | #define HPTEG_HASH_NUM_PTE (1 << HPTEG_HASH_BITS_PTE) |
2d27fc5e | 73 | #define HPTEG_HASH_NUM_PTE_LONG (1 << HPTEG_HASH_BITS_PTE_LONG) |
fef093be AG |
74 | #define HPTEG_HASH_NUM_VPTE (1 << HPTEG_HASH_BITS_VPTE) |
75 | #define HPTEG_HASH_NUM_VPTE_LONG (1 << HPTEG_HASH_BITS_VPTE_LONG) | |
a4a0f252 | 76 | #define HPTEG_HASH_NUM_VPTE_64K (1 << HPTEG_HASH_BITS_VPTE_64K) |
ca95150b | 77 | |
28e83b4f AG |
78 | /* Physical Address Mask - allowed range of real mode RAM access */ |
79 | #define KVM_PAM 0x0fffffffffffffffULL | |
80 | ||
bbf45ba5 HB |
81 | struct kvm; |
82 | struct kvm_run; | |
83 | struct kvm_vcpu; | |
84 | ||
a8606e20 PM |
85 | struct lppaca; |
86 | struct slb_shadow; | |
2e25aa5f | 87 | struct dtl_entry; |
a8606e20 | 88 | |
3ff95502 PM |
89 | struct kvmppc_vcpu_book3s; |
90 | struct kvmppc_book3s_shadow_vcpu; | |
91 | ||
bbf45ba5 HB |
92 | struct kvm_vm_stat { |
93 | u32 remote_tlb_flush; | |
94 | }; | |
95 | ||
96 | struct kvm_vcpu_stat { | |
97 | u32 sum_exits; | |
98 | u32 mmio_exits; | |
99 | u32 dcr_exits; | |
100 | u32 signal_exits; | |
101 | u32 light_exits; | |
102 | /* Account for special types of light exits: */ | |
103 | u32 itlb_real_miss_exits; | |
104 | u32 itlb_virt_miss_exits; | |
105 | u32 dtlb_real_miss_exits; | |
106 | u32 dtlb_virt_miss_exits; | |
107 | u32 syscall_exits; | |
108 | u32 isi_exits; | |
109 | u32 dsi_exits; | |
110 | u32 emulated_inst_exits; | |
111 | u32 dec_exits; | |
112 | u32 ext_intr_exits; | |
45c5eb67 | 113 | u32 halt_wakeup; |
d30f6e48 SW |
114 | u32 dbell_exits; |
115 | u32 gdbell_exits; | |
00c3a37c | 116 | #ifdef CONFIG_PPC_BOOK3S |
ca95150b AG |
117 | u32 pf_storage; |
118 | u32 pf_instruc; | |
119 | u32 sp_storage; | |
120 | u32 sp_instruc; | |
121 | u32 queue_intr; | |
122 | u32 ld; | |
123 | u32 ld_slow; | |
124 | u32 st; | |
125 | u32 st_slow; | |
126 | #endif | |
bbf45ba5 HB |
127 | }; |
128 | ||
73e75b41 HB |
129 | enum kvm_exit_types { |
130 | MMIO_EXITS, | |
131 | DCR_EXITS, | |
132 | SIGNAL_EXITS, | |
133 | ITLB_REAL_MISS_EXITS, | |
134 | ITLB_VIRT_MISS_EXITS, | |
135 | DTLB_REAL_MISS_EXITS, | |
136 | DTLB_VIRT_MISS_EXITS, | |
137 | SYSCALL_EXITS, | |
138 | ISI_EXITS, | |
139 | DSI_EXITS, | |
140 | EMULATED_INST_EXITS, | |
141 | EMULATED_MTMSRWE_EXITS, | |
142 | EMULATED_WRTEE_EXITS, | |
143 | EMULATED_MTSPR_EXITS, | |
144 | EMULATED_MFSPR_EXITS, | |
145 | EMULATED_MTMSR_EXITS, | |
146 | EMULATED_MFMSR_EXITS, | |
147 | EMULATED_TLBSX_EXITS, | |
148 | EMULATED_TLBWE_EXITS, | |
149 | EMULATED_RFI_EXITS, | |
d30f6e48 | 150 | EMULATED_RFCI_EXITS, |
73e75b41 HB |
151 | DEC_EXITS, |
152 | EXT_INTR_EXITS, | |
153 | HALT_WAKEUP, | |
154 | USR_PR_INST, | |
155 | FP_UNAVAIL, | |
156 | DEBUG_EXITS, | |
157 | TIMEINGUEST, | |
d30f6e48 SW |
158 | DBELL_EXITS, |
159 | GDBELL_EXITS, | |
73e75b41 HB |
160 | __NUMBER_OF_KVM_EXIT_TYPES |
161 | }; | |
162 | ||
73e75b41 | 163 | /* allow access to big endian 32bit upper/lower parts and 64bit var */ |
7b701591 | 164 | struct kvmppc_exit_timing { |
73e75b41 HB |
165 | union { |
166 | u64 tv64; | |
167 | struct { | |
168 | u32 tbu, tbl; | |
169 | } tv32; | |
170 | }; | |
171 | }; | |
73e75b41 | 172 | |
de56a948 PM |
173 | struct kvmppc_pginfo { |
174 | unsigned long pfn; | |
175 | atomic_t refcnt; | |
176 | }; | |
177 | ||
54738c09 DG |
178 | struct kvmppc_spapr_tce_table { |
179 | struct list_head list; | |
180 | struct kvm *kvm; | |
181 | u64 liobn; | |
182 | u32 window_size; | |
183 | struct page *pages[0]; | |
184 | }; | |
185 | ||
6c45b810 AK |
186 | struct kvm_rma_info { |
187 | atomic_t use_count; | |
188 | unsigned long base_pfn; | |
aa04b4cc PM |
189 | }; |
190 | ||
bc5ad3f3 BH |
191 | /* XICS components, defined in book3s_xics.c */ |
192 | struct kvmppc_xics; | |
193 | struct kvmppc_icp; | |
194 | ||
8936dda4 PM |
195 | /* |
196 | * The reverse mapping array has one entry for each HPTE, | |
197 | * which stores the guest's view of the second word of the HPTE | |
06ce2c63 PM |
198 | * (including the guest physical address of the mapping), |
199 | * plus forward and backward pointers in a doubly-linked ring | |
200 | * of HPTEs that map the same host page. The pointers in this | |
201 | * ring are 32-bit HPTE indexes, to save space. | |
8936dda4 PM |
202 | */ |
203 | struct revmap_entry { | |
204 | unsigned long guest_rpte; | |
06ce2c63 | 205 | unsigned int forw, back; |
8936dda4 PM |
206 | }; |
207 | ||
06ce2c63 | 208 | /* |
a66b48c3 | 209 | * We use the top bit of each memslot->arch.rmap entry as a lock bit, |
06ce2c63 PM |
210 | * and bit 32 as a present flag. The bottom 32 bits are the |
211 | * index in the guest HPT of a HPTE that points to the page. | |
212 | */ | |
213 | #define KVMPPC_RMAP_LOCK_BIT 63 | |
bad3b507 PM |
214 | #define KVMPPC_RMAP_RC_SHIFT 32 |
215 | #define KVMPPC_RMAP_REFERENCED (HPTE_R_R << KVMPPC_RMAP_RC_SHIFT) | |
216 | #define KVMPPC_RMAP_CHANGED (HPTE_R_C << KVMPPC_RMAP_RC_SHIFT) | |
06ce2c63 PM |
217 | #define KVMPPC_RMAP_PRESENT 0x100000000ul |
218 | #define KVMPPC_RMAP_INDEX 0xfffffffful | |
219 | ||
a66b48c3 | 220 | /* Low-order bits in memslot->arch.slot_phys[] */ |
da9d1d7f | 221 | #define KVMPPC_PAGE_ORDER_MASK 0x1f |
9d0ef5ea PM |
222 | #define KVMPPC_PAGE_NO_CACHE HPTE_R_I /* 0x20 */ |
223 | #define KVMPPC_PAGE_WRITETHRU HPTE_R_W /* 0x40 */ | |
b2b2f165 PM |
224 | #define KVMPPC_GOT_PAGE 0x80 |
225 | ||
db3fe4eb | 226 | struct kvm_arch_memory_slot { |
9975f5e3 | 227 | #ifdef CONFIG_KVM_BOOK3S_HV_POSSIBLE |
d89cc617 | 228 | unsigned long *rmap; |
a66b48c3 | 229 | unsigned long *slot_phys; |
9975f5e3 | 230 | #endif /* CONFIG_KVM_BOOK3S_HV_POSSIBLE */ |
db3fe4eb TY |
231 | }; |
232 | ||
bbf45ba5 | 233 | struct kvm_arch { |
d30f6e48 | 234 | unsigned int lpid; |
9975f5e3 | 235 | #ifdef CONFIG_KVM_BOOK3S_HV_POSSIBLE |
de56a948 | 236 | unsigned long hpt_virt; |
8936dda4 | 237 | struct revmap_entry *revmap; |
de56a948 PM |
238 | unsigned int host_lpid; |
239 | unsigned long host_lpcr; | |
240 | unsigned long sdr1; | |
241 | unsigned long host_sdr1; | |
242 | int tlbie_lock; | |
aa04b4cc PM |
243 | unsigned long lpcr; |
244 | unsigned long rmor; | |
6c45b810 | 245 | struct kvm_rma_info *rma; |
697d3899 | 246 | unsigned long vrma_slb_v; |
c77162de | 247 | int rma_setup_done; |
342d3db7 | 248 | int using_mmu_notifiers; |
32fad281 PM |
249 | u32 hpt_order; |
250 | atomic_t vcpus_running; | |
1b400ba0 | 251 | u32 online_vcores; |
32fad281 PM |
252 | unsigned long hpt_npte; |
253 | unsigned long hpt_mask; | |
44e5f6be | 254 | atomic_t hpte_mod_interest; |
c77162de | 255 | spinlock_t slot_phys_lock; |
1b400ba0 | 256 | cpumask_t need_tlb_flush; |
371fefd6 | 257 | struct kvmppc_vcore *vcores[KVM_MAX_VCORES]; |
fa61a4e3 | 258 | int hpt_cma_alloc; |
9975f5e3 | 259 | #endif /* CONFIG_KVM_BOOK3S_HV_POSSIBLE */ |
7aa79938 | 260 | #ifdef CONFIG_KVM_BOOK3S_PR_POSSIBLE |
9308ab8e PM |
261 | struct mutex hpt_mutex; |
262 | #endif | |
f31e65e1 BH |
263 | #ifdef CONFIG_PPC_BOOK3S_64 |
264 | struct list_head spapr_tce_tables; | |
8e591cb7 | 265 | struct list_head rtas_tokens; |
f31e65e1 | 266 | #endif |
de9ba2f3 AG |
267 | #ifdef CONFIG_KVM_MPIC |
268 | struct openpic *mpic; | |
269 | #endif | |
bc5ad3f3 BH |
270 | #ifdef CONFIG_KVM_XICS |
271 | struct kvmppc_xics *xics; | |
272 | #endif | |
cbbc58d4 | 273 | struct kvmppc_ops *kvm_ops; |
bbf45ba5 HB |
274 | }; |
275 | ||
371fefd6 PM |
276 | /* |
277 | * Struct for a virtual core. | |
278 | * Note: entry_exit_count combines an entry count in the bottom 8 bits | |
279 | * and an exit count in the next 8 bits. This is so that we can | |
280 | * atomically increment the entry count iff the exit count is 0 | |
281 | * without taking the lock. | |
282 | */ | |
283 | struct kvmppc_vcore { | |
284 | int n_runnable; | |
19ccb76a | 285 | int n_busy; |
371fefd6 PM |
286 | int num_threads; |
287 | int entry_exit_count; | |
288 | int n_woken; | |
289 | int nap_count; | |
19ccb76a | 290 | int napping_threads; |
e0b7ec05 | 291 | int first_vcpuid; |
371fefd6 | 292 | u16 pcpu; |
1b400ba0 | 293 | u16 last_cpu; |
19ccb76a | 294 | u8 vcore_state; |
371fefd6 PM |
295 | u8 in_guest; |
296 | struct list_head runnable_threads; | |
297 | spinlock_t lock; | |
19ccb76a | 298 | wait_queue_head_t wq; |
0456ec4f PM |
299 | u64 stolen_tb; |
300 | u64 preempt_tb; | |
301 | struct kvm_vcpu *runner; | |
e0b7ec05 | 302 | struct kvm *kvm; |
93b0f4dc | 303 | u64 tb_offset; /* guest timebase - host timebase */ |
a0144e2a | 304 | ulong lpcr; |
388cc6e1 PM |
305 | u32 arch_compat; |
306 | ulong pcr; | |
b005255e | 307 | ulong dpdes; /* doorbell state (POWER8) */ |
371fefd6 PM |
308 | }; |
309 | ||
310 | #define VCORE_ENTRY_COUNT(vc) ((vc)->entry_exit_count & 0xff) | |
311 | #define VCORE_EXIT_COUNT(vc) ((vc)->entry_exit_count >> 8) | |
312 | ||
19ccb76a PM |
313 | /* Values for vcore_state */ |
314 | #define VCORE_INACTIVE 0 | |
2f12f034 PM |
315 | #define VCORE_SLEEPING 1 |
316 | #define VCORE_STARTING 2 | |
317 | #define VCORE_RUNNING 3 | |
318 | #define VCORE_EXITING 4 | |
19ccb76a | 319 | |
2e25aa5f PM |
320 | /* |
321 | * Struct used to manage memory for a virtual processor area | |
322 | * registered by a PAPR guest. There are three types of area | |
323 | * that a guest can register. | |
324 | */ | |
325 | struct kvmppc_vpa { | |
c35635ef | 326 | unsigned long gpa; /* Current guest phys addr */ |
2e25aa5f PM |
327 | void *pinned_addr; /* Address in kernel linear mapping */ |
328 | void *pinned_end; /* End of region */ | |
329 | unsigned long next_gpa; /* Guest phys addr for update */ | |
330 | unsigned long len; /* Number of bytes required */ | |
331 | u8 update_pending; /* 1 => update pinned_addr from next_gpa */ | |
c35635ef | 332 | bool dirty; /* true => area has been modified by kernel */ |
2e25aa5f PM |
333 | }; |
334 | ||
ca95150b | 335 | struct kvmppc_pte { |
af7b4d10 | 336 | ulong eaddr; |
ca95150b | 337 | u64 vpage; |
af7b4d10 | 338 | ulong raddr; |
3ed9c6d2 AG |
339 | bool may_read : 1; |
340 | bool may_write : 1; | |
341 | bool may_execute : 1; | |
a4a0f252 | 342 | u8 page_size; /* MMU_PAGE_xxx */ |
ca95150b AG |
343 | }; |
344 | ||
345 | struct kvmppc_mmu { | |
346 | /* book3s_64 only */ | |
347 | void (*slbmte)(struct kvm_vcpu *vcpu, u64 rb, u64 rs); | |
348 | u64 (*slbmfee)(struct kvm_vcpu *vcpu, u64 slb_nr); | |
349 | u64 (*slbmfev)(struct kvm_vcpu *vcpu, u64 slb_nr); | |
350 | void (*slbie)(struct kvm_vcpu *vcpu, u64 slb_nr); | |
351 | void (*slbia)(struct kvm_vcpu *vcpu); | |
352 | /* book3s */ | |
353 | void (*mtsrin)(struct kvm_vcpu *vcpu, u32 srnum, ulong value); | |
354 | u32 (*mfsrin)(struct kvm_vcpu *vcpu, u32 srnum); | |
93b159b4 PM |
355 | int (*xlate)(struct kvm_vcpu *vcpu, gva_t eaddr, |
356 | struct kvmppc_pte *pte, bool data, bool iswrite); | |
ca95150b AG |
357 | void (*reset_msr)(struct kvm_vcpu *vcpu); |
358 | void (*tlbie)(struct kvm_vcpu *vcpu, ulong addr, bool large); | |
af7b4d10 | 359 | int (*esid_to_vsid)(struct kvm_vcpu *vcpu, ulong esid, u64 *vsid); |
ca95150b AG |
360 | u64 (*ea_to_vp)(struct kvm_vcpu *vcpu, gva_t eaddr, bool data); |
361 | bool (*is_dcbz32)(struct kvm_vcpu *vcpu); | |
362 | }; | |
363 | ||
c4befc58 PM |
364 | struct kvmppc_slb { |
365 | u64 esid; | |
366 | u64 vsid; | |
367 | u64 orige; | |
368 | u64 origv; | |
369 | bool valid : 1; | |
370 | bool Ks : 1; | |
371 | bool Kp : 1; | |
372 | bool nx : 1; | |
373 | bool large : 1; /* PTEs are 16MB */ | |
374 | bool tb : 1; /* 1TB segment */ | |
375 | bool class : 1; | |
a4a0f252 | 376 | u8 base_page_size; /* MMU_PAGE_xxx */ |
ca95150b AG |
377 | }; |
378 | ||
6df8d3fc BB |
379 | # ifdef CONFIG_PPC_FSL_BOOK3E |
380 | #define KVMPPC_BOOKE_IAC_NUM 2 | |
381 | #define KVMPPC_BOOKE_DAC_NUM 2 | |
382 | # else | |
383 | #define KVMPPC_BOOKE_IAC_NUM 4 | |
384 | #define KVMPPC_BOOKE_DAC_NUM 2 | |
385 | # endif | |
386 | #define KVMPPC_BOOKE_MAX_IAC 4 | |
387 | #define KVMPPC_BOOKE_MAX_DAC 2 | |
388 | ||
5df554ad SW |
389 | /* KVMPPC_EPR_USER takes precedence over KVMPPC_EPR_KERNEL */ |
390 | #define KVMPPC_EPR_NONE 0 /* EPR not supported */ | |
391 | #define KVMPPC_EPR_USER 1 /* exit to userspace to fill EPR */ | |
392 | #define KVMPPC_EPR_KERNEL 2 /* in-kernel irqchip */ | |
393 | ||
eb1e4f43 SW |
394 | #define KVMPPC_IRQ_DEFAULT 0 |
395 | #define KVMPPC_IRQ_MPIC 1 | |
bc5ad3f3 | 396 | #define KVMPPC_IRQ_XICS 2 |
eb1e4f43 SW |
397 | |
398 | struct openpic; | |
399 | ||
bbf45ba5 | 400 | struct kvm_vcpu_arch { |
ca95150b | 401 | ulong host_stack; |
bbf45ba5 | 402 | u32 host_pid; |
00c3a37c | 403 | #ifdef CONFIG_PPC_BOOK3S |
c4befc58 | 404 | struct kvmppc_slb slb[64]; |
de56a948 | 405 | int slb_max; /* 1 + index of last valid entry in slb[] */ |
c4befc58 | 406 | int slb_nr; /* total number of entries in SLB */ |
ca95150b | 407 | struct kvmppc_mmu mmu; |
3ff95502 PM |
408 | struct kvmppc_vcpu_book3s *book3s; |
409 | #endif | |
410 | #ifdef CONFIG_PPC_BOOK3S_32 | |
411 | struct kvmppc_book3s_shadow_vcpu *shadow_vcpu; | |
ca95150b | 412 | #endif |
bbf45ba5 | 413 | |
5cf8ca22 | 414 | ulong gpr[32]; |
bbf45ba5 | 415 | |
efff1912 | 416 | struct thread_fp_state fp; |
180a34d2 | 417 | |
4cd35f67 SW |
418 | #ifdef CONFIG_SPE |
419 | ulong evr[32]; | |
420 | ulong spefscr; | |
421 | ulong host_spefscr; | |
422 | u64 acc; | |
423 | #endif | |
180a34d2 | 424 | #ifdef CONFIG_ALTIVEC |
efff1912 | 425 | struct thread_vr_state vr; |
180a34d2 AG |
426 | #endif |
427 | ||
d30f6e48 SW |
428 | #ifdef CONFIG_KVM_BOOKE_HV |
429 | u32 host_mas4; | |
430 | u32 host_mas6; | |
431 | u32 shadow_epcr; | |
d30f6e48 SW |
432 | u32 shadow_msrp; |
433 | u32 eplc; | |
434 | u32 epsc; | |
435 | u32 oldpir; | |
436 | #endif | |
437 | ||
62b4db00 AG |
438 | #if defined(CONFIG_BOOKE) |
439 | #if defined(CONFIG_KVM_BOOKE_HV) || defined(CONFIG_64BIT) | |
440 | u32 epcr; | |
441 | #endif | |
442 | #endif | |
443 | ||
5aa9e2f4 AG |
444 | #ifdef CONFIG_PPC_BOOK3S |
445 | /* For Gekko paired singles */ | |
446 | u32 qpr[32]; | |
447 | #endif | |
448 | ||
5cf8ca22 | 449 | ulong pc; |
5cf8ca22 HB |
450 | ulong ctr; |
451 | ulong lr; | |
e14e7a1e | 452 | #ifdef CONFIG_PPC_BOOK3S |
b005255e | 453 | ulong tar; |
e14e7a1e | 454 | #endif |
7e57cba0 | 455 | |
5cf8ca22 | 456 | ulong xer; |
7e57cba0 | 457 | u32 cr; |
bbf45ba5 | 458 | |
00c3a37c | 459 | #ifdef CONFIG_PPC_BOOK3S |
ca95150b | 460 | ulong hflags; |
180a34d2 | 461 | ulong guest_owned_ext; |
de56a948 PM |
462 | ulong purr; |
463 | ulong spurr; | |
b005255e MN |
464 | ulong ic; |
465 | ulong vtb; | |
de56a948 PM |
466 | ulong dscr; |
467 | ulong amr; | |
468 | ulong uamor; | |
b005255e | 469 | ulong iamr; |
de56a948 | 470 | u32 ctrl; |
8563bf52 | 471 | u32 dabrx; |
de56a948 | 472 | ulong dabr; |
b005255e MN |
473 | ulong dawr; |
474 | ulong dawrx; | |
475 | ulong ciabr; | |
0acb9111 | 476 | ulong cfar; |
4b8473c9 | 477 | ulong ppr; |
b005255e MN |
478 | ulong pspb; |
479 | ulong fscr; | |
616dff86 | 480 | ulong shadow_fscr; |
b005255e MN |
481 | ulong ebbhr; |
482 | ulong ebbrr; | |
483 | ulong bescr; | |
484 | ulong csigr; | |
485 | ulong tacr; | |
486 | ulong tcscr; | |
487 | ulong acop; | |
488 | ulong wort; | |
a2d56020 | 489 | ulong shadow_srr1; |
ca95150b | 490 | #endif |
eab17672 | 491 | u32 vrsave; /* also USPRG0 */ |
bbf45ba5 | 492 | u32 mmucr; |
5fd8505e | 493 | /* shadow_msr is unused for BookE HV */ |
ecee273f | 494 | ulong shadow_msr; |
5cf8ca22 HB |
495 | ulong csrr0; |
496 | ulong csrr1; | |
497 | ulong dsrr0; | |
498 | ulong dsrr1; | |
5ce941ee SW |
499 | ulong mcsrr0; |
500 | ulong mcsrr1; | |
501 | ulong mcsr; | |
bbf45ba5 | 502 | u32 dec; |
21bd000a | 503 | #ifdef CONFIG_BOOKE |
bbf45ba5 | 504 | u32 decar; |
21bd000a | 505 | #endif |
3cd60e31 AK |
506 | /* Time base value when we entered the guest */ |
507 | u64 entry_tb; | |
8f42ab27 | 508 | u64 entry_vtb; |
06da28e7 | 509 | u64 entry_ic; |
bbf45ba5 | 510 | u32 tcr; |
dfd4d47e | 511 | ulong tsr; /* we need to perform set/clr_bits() which requires ulong */ |
bb3a8a17 | 512 | u32 ivor[64]; |
5cf8ca22 | 513 | ulong ivpr; |
ca95150b | 514 | u32 pvr; |
49dd2c49 HB |
515 | |
516 | u32 shadow_pid; | |
dd9ebf1f | 517 | u32 shadow_pid1; |
bbf45ba5 | 518 | u32 pid; |
49dd2c49 HB |
519 | u32 swap_pid; |
520 | ||
bbf45ba5 HB |
521 | u32 ccr0; |
522 | u32 ccr1; | |
f7b200af | 523 | u32 dbsr; |
bbf45ba5 | 524 | |
b005255e | 525 | u64 mmcr[5]; |
9e368f29 | 526 | u32 pmc[8]; |
b005255e | 527 | u32 spmc[2]; |
14941789 PM |
528 | u64 siar; |
529 | u64 sdar; | |
b005255e | 530 | u64 sier; |
7b490411 MN |
531 | #ifdef CONFIG_PPC_TRANSACTIONAL_MEM |
532 | u64 tfhar; | |
533 | u64 texasr; | |
534 | u64 tfiar; | |
535 | ||
536 | u32 cr_tm; | |
537 | u64 lr_tm; | |
538 | u64 ctr_tm; | |
539 | u64 amr_tm; | |
540 | u64 ppr_tm; | |
541 | u64 dscr_tm; | |
542 | u64 tar_tm; | |
543 | ||
544 | ulong gpr_tm[32]; | |
545 | ||
546 | struct thread_fp_state fp_tm; | |
547 | ||
548 | struct thread_vr_state vr_tm; | |
549 | u32 vrsave_tm; /* also USPRG0 */ | |
550 | ||
551 | #endif | |
de56a948 | 552 | |
73e75b41 | 553 | #ifdef CONFIG_KVM_EXIT_TIMING |
09000adb | 554 | struct mutex exit_timing_lock; |
7b701591 HB |
555 | struct kvmppc_exit_timing timing_exit; |
556 | struct kvmppc_exit_timing timing_last_enter; | |
73e75b41 HB |
557 | u32 last_exit_type; |
558 | u32 timing_count_type[__NUMBER_OF_KVM_EXIT_TYPES]; | |
559 | u64 timing_sum_duration[__NUMBER_OF_KVM_EXIT_TYPES]; | |
560 | u64 timing_sum_quad_duration[__NUMBER_OF_KVM_EXIT_TYPES]; | |
561 | u64 timing_min_duration[__NUMBER_OF_KVM_EXIT_TYPES]; | |
562 | u64 timing_max_duration[__NUMBER_OF_KVM_EXIT_TYPES]; | |
563 | u64 timing_last_exit; | |
564 | struct dentry *debugfs_exit_timing; | |
565 | #endif | |
566 | ||
de56a948 PM |
567 | #ifdef CONFIG_PPC_BOOK3S |
568 | ulong fault_dar; | |
569 | u32 fault_dsisr; | |
e5ee5422 | 570 | unsigned long intr_msr; |
de56a948 PM |
571 | #endif |
572 | ||
0604675f | 573 | #ifdef CONFIG_BOOKE |
5cf8ca22 HB |
574 | ulong fault_dear; |
575 | ulong fault_esr; | |
daf5e271 LY |
576 | ulong queued_dear; |
577 | ulong queued_esr; | |
f61c94bb BB |
578 | spinlock_t wdt_lock; |
579 | struct timer_list wdt_timer; | |
8fdd21a2 | 580 | u32 tlbcfg[4]; |
307d9008 | 581 | u32 tlbps[4]; |
8fdd21a2 | 582 | u32 mmucfg; |
9a6061d7 | 583 | u32 eptcfg; |
d30f6e48 | 584 | u32 epr; |
15b708be | 585 | u32 crit_save; |
ce11e48b | 586 | /* guest debug registers*/ |
547465ef | 587 | struct debug_reg dbg_reg; |
ce11e48b BB |
588 | /* hardware visible debug registers when in guest state */ |
589 | struct debug_reg shadow_dbg_reg; | |
0604675f | 590 | #endif |
bbf45ba5 | 591 | gpa_t paddr_accessed; |
6020c0f6 | 592 | gva_t vaddr_accessed; |
08c9a188 | 593 | pgd_t *pgdir; |
bbf45ba5 HB |
594 | |
595 | u8 io_gpr; /* GPR used as IO source/target */ | |
596 | u8 mmio_is_bigendian; | |
3587d534 | 597 | u8 mmio_sign_extend; |
bbf45ba5 HB |
598 | u8 dcr_needed; |
599 | u8 dcr_is_write; | |
ad0a048b AG |
600 | u8 osi_needed; |
601 | u8 osi_enabled; | |
9432ba60 | 602 | u8 papr_enabled; |
f61c94bb | 603 | u8 watchdog_enabled; |
af8f38b3 AG |
604 | u8 sane; |
605 | u8 cpu_type; | |
de56a948 | 606 | u8 hcall_needed; |
5df554ad | 607 | u8 epr_flags; /* KVMPPC_EPR_xxx */ |
1c810636 | 608 | u8 epr_needed; |
bbf45ba5 HB |
609 | |
610 | u32 cpr0_cfgaddr; /* holds the last set cpr0_cfgaddr */ | |
611 | ||
544c6761 AG |
612 | struct hrtimer dec_timer; |
613 | struct tasklet_struct tasklet; | |
ca95150b | 614 | u64 dec_jiffies; |
de56a948 | 615 | u64 dec_expires; |
bbf45ba5 | 616 | unsigned long pending_exceptions; |
a8606e20 PM |
617 | u8 ceded; |
618 | u8 prodded; | |
de56a948 | 619 | u32 last_inst; |
a8606e20 | 620 | |
19ccb76a | 621 | wait_queue_head_t *wqp; |
371fefd6 PM |
622 | struct kvmppc_vcore *vcore; |
623 | int ret; | |
de56a948 | 624 | int trap; |
371fefd6 PM |
625 | int state; |
626 | int ptid; | |
19ccb76a | 627 | bool timer_running; |
371fefd6 PM |
628 | wait_queue_head_t cpu_run; |
629 | ||
96bc451a | 630 | struct kvm_vcpu_arch_shared *shared; |
5deb8e7a AG |
631 | #if defined(CONFIG_PPC_BOOK3S_64) && defined(CONFIG_KVM_BOOK3S_PR_POSSIBLE) |
632 | bool shared_big_endian; | |
633 | #endif | |
beb03f14 AG |
634 | unsigned long magic_page_pa; /* phys addr to map the magic page to */ |
635 | unsigned long magic_page_ea; /* effect. addr to map the magic page to */ | |
f3383cf8 | 636 | bool disable_kernel_nx; |
de56a948 | 637 | |
eb1e4f43 SW |
638 | int irq_type; /* one of KVM_IRQ_* */ |
639 | int irq_cpu_id; | |
640 | struct openpic *mpic; /* KVM_IRQ_MPIC */ | |
bc5ad3f3 BH |
641 | #ifdef CONFIG_KVM_XICS |
642 | struct kvmppc_icp *icp; /* XICS presentation controller */ | |
643 | #endif | |
eb1e4f43 | 644 | |
9975f5e3 | 645 | #ifdef CONFIG_KVM_BOOK3S_HV_POSSIBLE |
de56a948 | 646 | struct kvm_vcpu_arch_shared shregs; |
371fefd6 | 647 | |
697d3899 PM |
648 | unsigned long pgfault_addr; |
649 | long pgfault_index; | |
650 | unsigned long pgfault_hpte[2]; | |
651 | ||
371fefd6 PM |
652 | struct list_head run_list; |
653 | struct task_struct *run_task; | |
654 | struct kvm_run *kvm_run; | |
2e25aa5f PM |
655 | |
656 | spinlock_t vpa_update_lock; | |
657 | struct kvmppc_vpa vpa; | |
658 | struct kvmppc_vpa dtl; | |
659 | struct dtl_entry *dtl_ptr; | |
660 | unsigned long dtl_index; | |
0456ec4f | 661 | u64 stolen_logged; |
2e25aa5f | 662 | struct kvmppc_vpa slb_shadow; |
c7b67670 PM |
663 | |
664 | spinlock_t tbacct_lock; | |
665 | u64 busy_stolen; | |
666 | u64 busy_preempt; | |
de56a948 | 667 | #endif |
bbf45ba5 HB |
668 | }; |
669 | ||
efff1912 PM |
670 | #define VCPU_FPR(vcpu, i) (vcpu)->arch.fp.fpr[i][TS_FPROFFSET] |
671 | ||
19ccb76a | 672 | /* Values for vcpu->arch.state */ |
8455d79e PM |
673 | #define KVMPPC_VCPU_NOTREADY 0 |
674 | #define KVMPPC_VCPU_RUNNABLE 1 | |
c7b67670 | 675 | #define KVMPPC_VCPU_BUSY_IN_HOST 2 |
371fefd6 | 676 | |
b3c5d3c2 AG |
677 | /* Values for vcpu->arch.io_gpr */ |
678 | #define KVM_MMIO_REG_MASK 0x001f | |
679 | #define KVM_MMIO_REG_EXT_MASK 0xffe0 | |
680 | #define KVM_MMIO_REG_GPR 0x0000 | |
681 | #define KVM_MMIO_REG_FPR 0x0020 | |
682 | #define KVM_MMIO_REG_QPR 0x0040 | |
683 | #define KVM_MMIO_REG_FQPR 0x0060 | |
684 | ||
2246f8b5 | 685 | #define __KVM_HAVE_ARCH_WQP |
5df554ad | 686 | #define __KVM_HAVE_CREATE_DEVICE |
b6d33834 | 687 | |
bbf45ba5 | 688 | #endif /* __POWERPC_KVM_HOST_H__ */ |